NewPDUHardwareFile/RELAY-6路控制板灯板/Design Rule Check - LED_4.drc

Protel Design System Design Rule Check
PCB File : D:\NewPDUHardwareFile\RELAY-23A-6·¿ØÖÆ°åµÆ°å\LED_4.PcbDoc
Date     : 2025/1/21
Time     : 10:01:45

Processing Rule : Clearance Constraint (Gap=0.254mm) (All),(All)
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Un-Routed Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
Rule Violations :0

Processing Rule : Width Constraint (Min=0.1mm) (Max=10mm) (Preferred=0.254mm) (All)
Rule Violations :0

Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=5.08mm) (Air Gap=0.254mm) (Entries=4) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=25.4mm) (All)
Rule Violations :0

Processing Rule : Hole To Hole Clearance (Gap=0mm) (All),(All)
Rule Violations :0

Processing Rule : Minimum Solder Mask Sliver (Gap=0mm) (All),(All)
Rule Violations :0

Processing Rule : Silk To Solder Mask (Clearance=0mm) (IsPad),(All)
Rule Violations :0

Processing Rule : Silk to Silk (Clearance=0mm) (All),(All)
Rule Violations :0

Processing Rule : Net Antennae (Tolerance=0mm) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Rule Violations :0


Violations Detected : 0
Waived Violations : 0
Time Elapsed        : 00:00:01