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@@ -73,7 +73,7 @@ uint8_t RL_ON_flag[Output_ChN_default] = {0x00};
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uint8_t RL_OFF_flag[Output_ChN_default] = {0x00};
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uint8_t RL_OFF_flag[Output_ChN_default] = {0x00};
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uint8_t RL_last_state[Output_ChN_default] = {0x00};
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uint8_t RL_last_state[Output_ChN_default] = {0x00};
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uint8_t RL_now_state[Output_ChN_default] = {0x00};
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uint8_t RL_now_state[Output_ChN_default] = {0x00};
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-uint8_t RL_Func_statu[Output_ChN_default] = {0x00};
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+uint8_t RL_Func_statu[Output_ChN_default+1] = {0x00};
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uint8_t RL_All_Func = 0x0;
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uint8_t RL_All_Func = 0x0;
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uint32_t normal_running_time = 0;
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uint32_t normal_running_time = 0;
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@@ -291,7 +291,7 @@ static void check_jlink()
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{
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{
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RL_N_begin_delay_flag = 1;
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RL_N_begin_delay_flag = 1;
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RL_N_end_delay_flag = 0;
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RL_N_end_delay_flag = 0;
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- RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_ontime * 1000;
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+ RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_ontime * 100;
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} else {
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} else {
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RL_N_begin_delay_flag = 0;
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RL_N_begin_delay_flag = 0;
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RL_N_end_delay_flag = 1;
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RL_N_end_delay_flag = 1;
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@@ -305,7 +305,7 @@ static void check_jlink()
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{
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{
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RL_N_begin_delay_flag = 1;
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RL_N_begin_delay_flag = 1;
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RL_N_end_delay_flag = 0;
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RL_N_end_delay_flag = 0;
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- RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_offtime * 1000;
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+ RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_offtime * 100;
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}else
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}else
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{
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{
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RL_N_begin_delay_flag = 0;
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RL_N_begin_delay_flag = 0;
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@@ -339,10 +339,10 @@ static void check_jlink()
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RL_OFF_flag[k] = 0;
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RL_OFF_flag[k] = 0;
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if((AC3PPDU_RL_time[k + CH1_out].LT_state & 0x40) > 0)//有延时
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if((AC3PPDU_RL_time[k + CH1_out].LT_state & 0x40) > 0)//有延时
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{
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{
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- RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 1000;//秒转成毫秒
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+ RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 100;//秒转成毫秒
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RL_begin_delay_flag[k] = 1;
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RL_begin_delay_flag[k] = 1;
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RL_end_delay_flag[k] = 0;
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RL_end_delay_flag[k] = 0;
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- RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 1000;//秒转成毫秒
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+ RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 100;//秒转成毫秒
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}else//无延时
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}else//无延时
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{
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{
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RL_begin_delay_flag[k] = 0;
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RL_begin_delay_flag[k] = 0;
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@@ -357,7 +357,7 @@ static void check_jlink()
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{
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{
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RL_begin_delay_flag[k] = 1;
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RL_begin_delay_flag[k] = 1;
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RL_end_delay_flag[k] = 0;
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RL_end_delay_flag[k] = 0;
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- RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_offtime * 1000;//秒转成毫秒
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+ RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_offtime * 100;//秒转成毫秒
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}else//无延时
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}else//无延时
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{
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{
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RL_begin_delay_flag[k] = 0;
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RL_begin_delay_flag[k] = 0;
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@@ -527,6 +527,20 @@ static void RL_Over_Func()
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RL_All_Func = 0;
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RL_All_Func = 0;
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return;
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return;
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}
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}
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+#if SUPPORT_DOUBLE_FIRE
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+ for(int i = 0; i < Output_ChN_default / 2;i++)
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+ {
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+ if(RL_Func_statu[i+1] || RL_Func_statu[i+1+4])
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+ {
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+ RL_Func_statu[i+1] = 0;
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+ RL_Func_statu[i+1+4] = 0;
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+ AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
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+ AC3PPDU_RL_time[i + CH1_out+4].LT_state = AC3PPDU_RL_time[i + CH1_out+4].LT_state &0xffffff3e;
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+ orderFlag[i]=true;
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+ orderFlag[i+4]=true;
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+ }
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+ }
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+#else
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for(int i = 0; i < Output_ChN_default;i++)
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for(int i = 0; i < Output_ChN_default;i++)
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{
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{
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if(RL_Func_statu[i+1])
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if(RL_Func_statu[i+1])
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@@ -536,6 +550,7 @@ static void RL_Over_Func()
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RL_Func_statu[i+1] = 0;
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RL_Func_statu[i+1] = 0;
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}
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}
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}
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}
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+#endif
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}
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}
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static void key_io_control()
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static void key_io_control()
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@@ -821,6 +836,7 @@ int main(void)
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}
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}
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AT24CxxWrite(ERom_TotalWh1_Addr,(Eeprom_Rbuf + ERom_TotalWh1_Addr),4*Output_ChN_default);
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AT24CxxWrite(ERom_TotalWh1_Addr,(Eeprom_Rbuf + ERom_TotalWh1_Addr),4*Output_ChN_default);
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}
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}
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+ key_io_control();
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RL_Over_Func();
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RL_Over_Func();
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MODbus_CMD_New();
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MODbus_CMD_New();
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}
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}
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@@ -950,44 +966,57 @@ static void MODbus_CMD_New(void)
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break;
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break;
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case Mb_Dbuff_RL_Allon_Addr: //relay all on
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case Mb_Dbuff_RL_Allon_Addr: //relay all on
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{
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{
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- RL_Allon_flag = true;
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- for(i = 0;i < Output_ChN_default;i++)
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- {
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- temp_addr = i << 1;
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- Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
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- AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
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- orderFlag[i]=true;
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- }
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-#if SUPPORT_ZERO_LINE
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- orderFlag_N = true;
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+#if SUPPORT_DOUBLE_FIRE
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+ if(detection_value == 0x3)
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+#else
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+ if(detection_value == 1)
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#endif
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#endif
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- AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
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- Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x41;
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- AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
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-
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- AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
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+ {
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+ RL_Allon_flag = true;
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+ for(i = 0;i < Output_ChN_default;i++)
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+ {
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+ temp_addr = i << 1;
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+ Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
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+ AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
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+ orderFlag[i]=true;
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+ }
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+ AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
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+ #if SUPPORT_ZERO_LINE
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+ orderFlag_N = true;
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+ Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x41;
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+ AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
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+ AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
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+ #endif
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+ }
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}
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}
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break;
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break;
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case Mb_Dbuff_RL_Alloff_Addr: //relay all off
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case Mb_Dbuff_RL_Alloff_Addr: //relay all off
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{
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{
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- RL_Alloff_flag = true;
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- for(i = 0;i < Output_ChN_default;i++)
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- {
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- temp_addr = i << 1;
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- Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
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- Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
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- AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
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- orderFlag[i]=true;
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- }
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-#if SUPPORT_ZERO_LINE
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- orderFlag_N = true;
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+#if SUPPORT_DOUBLE_FIRE
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+ if(detection_value == 0x3)
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+#else
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+ if(detection_value == 1)
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#endif
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#endif
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- AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
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- Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x80;
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- Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] & 0xfe;
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- AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
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- AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
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- }
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+ {
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+ RL_Alloff_flag = true;
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+ for(i = 0;i < Output_ChN_default;i++)
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+ {
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+ temp_addr = i << 1;
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+ Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
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+ Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
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+ AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
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+ orderFlag[i]=true;
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+ }
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+ AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
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+ #if SUPPORT_ZERO_LINE
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+ orderFlag_N = true;
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+ Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x80;
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+ Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] & 0xfe;
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+ AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
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+ AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
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+ #endif
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+ }
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+ }
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break;
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break;
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case Mb_Dbuff_LT_ST_Addr: //set input status
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case Mb_Dbuff_LT_ST_Addr: //set input status
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{
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{
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@@ -1003,12 +1032,96 @@ static void MODbus_CMD_New(void)
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temp_addr = base_addr - Mb_Dbuff_CH1LT_ST_Addr;
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temp_addr = base_addr - Mb_Dbuff_CH1LT_ST_Addr;
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if(temp_addr == 9) { //Ch N
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if(temp_addr == 9) { //Ch N
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- AC3PPDU_RL_N_time.LT_state = data;
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#if SUPPORT_ZERO_LINE
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#if SUPPORT_ZERO_LINE
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+ AC3PPDU_RL_N_time.LT_state = data;
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orderFlag_N = true;
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orderFlag_N = true;
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+ temp_addr = temp_addr << 1;
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+ temp_addr +=ERom_CHNLT_ST_Addr;
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+ Eeprom_Rbuf[temp_addr] = data;
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+ AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
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#endif
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#endif
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}else{
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}else{
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-
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+ #if SUPPORT_DOUBLE_FIRE
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+ if(detection_value == 0x3)
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+ #else
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+ if(detection_value == 1)
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+ #endif
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+ {
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
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+ {
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+ data &= (Shield_Vmax_Threshould_Disable);
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+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
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+ {
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+ data &= (Shield_Vmin_Threshould_Disable);
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+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
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+ {
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+ data &= (Shield_Imax_Threshould_Disable);
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+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
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+ {
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+ data &= (Shield_Wmax_Threshould_Disable);
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+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
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+ {
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+ data &= (Shield_Kwhmax_Threshould_Disable);
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+ }
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+
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+ AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
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+ orderFlag[temp_addr]=true;
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+ LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
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+ temp_addr = temp_addr << 1;
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+ temp_addr += ERom_CH1LT_ST_Addr;
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+ Eeprom_Rbuf[temp_addr] = data;
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+ AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
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+ }
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+ }
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+ }
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+ break;
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+ case Mb_Dbuff_OUTCH1_ST_Addr ... Mb_Dbuff_OUTCH4_ST_Addr: //set output channel relay's status
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+ {
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+#if SUPPORT_DOUBLE_FIRE
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+ if(detection_value == 0x3)
|
|
|
|
|
+ {
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|
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|
+ temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
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+ for(int i = temp_addr; i < Output_ChN_default; i += 4)
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|
|
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|
+ {
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|
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|
+ uint32_t value = 0;
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|
|
|
+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
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+ {
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+ value = data & Shield_Vmax_Threshould_Disable;
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+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + i] <= THRESHOULD_JUDGMENT)
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+ {
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+ value = data & (Shield_Vmin_Threshould_Disable);
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|
+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
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+ {
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+ value = data &(Shield_Imax_Threshould_Disable);
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+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
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+ {
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+ value = data & (Shield_Wmax_Threshould_Disable);
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|
|
|
+ }
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+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
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|
|
|
|
+ {
|
|
|
|
|
+ value = data & (Shield_Kwhmax_Threshould_Disable);
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|
|
|
+ }
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|
+ AC3PPDU_RL_time[i + CH1_out].LT_state = value;
|
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|
|
|
+ orderFlag[i]=true;
|
|
|
|
|
+ LimiT_enable_check((i + CH1_out),AC3PPDU_RL_time[i + CH1_out].LT_state);
|
|
|
|
|
+ Eeprom_Rbuf[i + ERom_CH1LT_ST_Addr] = value;
|
|
|
|
|
+ AT24CxxWriteOneByte(i + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[i + ERom_CH1LT_ST_Addr]);
|
|
|
|
|
+ }
|
|
|
|
|
+ }
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|
|
|
|
+#else
|
|
|
|
|
+ if(detection_value == 1)
|
|
|
|
|
+
|
|
|
|
|
+ {
|
|
|
|
|
+ temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
|
|
|
|
|
+ //OutUnit_control_flag[temp_addr] = 1;
|
|
|
|
|
+ temp_addr *= 3;
|
|
|
if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
|
{
|
|
{
|
|
|
data &= (Shield_Vmax_Threshould_Disable);
|
|
data &= (Shield_Vmax_Threshould_Disable);
|
|
@@ -1031,64 +1144,28 @@ static void MODbus_CMD_New(void)
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
|
|
AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
|
|
|
- orderFlag[temp_addr]=true;
|
|
|
|
|
|
|
+ AC3PPDU_RL_time[temp_addr + CH2_out].LT_state = data;
|
|
|
|
|
+ AC3PPDU_RL_time[temp_addr + CH3_out].LT_state = data;
|
|
|
|
|
+ for(int i=0;i<Output_ChN_default;i++)
|
|
|
|
|
+ {
|
|
|
|
|
+ orderFlag[i]=true;
|
|
|
|
|
+ }
|
|
|
|
|
+ //orderFlag_N = true;
|
|
|
LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
|
|
LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
|
|
|
-
|
|
|
|
|
- }
|
|
|
|
|
-
|
|
|
|
|
- temp_addr = temp_addr << 1;
|
|
|
|
|
- temp_addr += ERom_CH1LT_ST_Addr;
|
|
|
|
|
- Eeprom_Rbuf[temp_addr] = data;
|
|
|
|
|
- AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
|
|
|
|
|
- }
|
|
|
|
|
- break;
|
|
|
|
|
- case Mb_Dbuff_OUTCH1_ST_Addr ... Mb_Dbuff_OUTCH3_ST_Addr: //set output channel relay's status
|
|
|
|
|
- {
|
|
|
|
|
- temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
|
|
|
|
|
- //OutUnit_control_flag[temp_addr] = 1;
|
|
|
|
|
- temp_addr *= 3;
|
|
|
|
|
- if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
|
|
|
- {
|
|
|
|
|
- data &= (Shield_Vmax_Threshould_Disable);
|
|
|
|
|
- }
|
|
|
|
|
- if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
|
|
|
- {
|
|
|
|
|
- data &= (Shield_Vmin_Threshould_Disable);
|
|
|
|
|
- }
|
|
|
|
|
- if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
|
|
|
- {
|
|
|
|
|
- data &= (Shield_Imax_Threshould_Disable);
|
|
|
|
|
- }
|
|
|
|
|
- if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
|
|
|
- {
|
|
|
|
|
- data &= (Shield_Wmax_Threshould_Disable);
|
|
|
|
|
- }
|
|
|
|
|
- if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
|
|
|
|
|
- {
|
|
|
|
|
- data &= (Shield_Kwhmax_Threshould_Disable);
|
|
|
|
|
- }
|
|
|
|
|
-
|
|
|
|
|
- AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
|
|
|
|
|
- AC3PPDU_RL_time[temp_addr + CH2_out].LT_state = data;
|
|
|
|
|
- AC3PPDU_RL_time[temp_addr + CH3_out].LT_state = data;
|
|
|
|
|
- for(int i=0;i<Output_ChN_default;i++)
|
|
|
|
|
- {
|
|
|
|
|
- orderFlag[i]=true;
|
|
|
|
|
|
|
+ LimiT_enable_check((temp_addr + CH2_out),AC3PPDU_RL_time[temp_addr + CH2_out].LT_state);
|
|
|
|
|
+ LimiT_enable_check((temp_addr + CH3_out),AC3PPDU_RL_time[temp_addr + CH3_out].LT_state);
|
|
|
|
|
+
|
|
|
|
|
+ temp_addr = temp_addr << 1;
|
|
|
|
|
+ Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr] = data;
|
|
|
|
|
+ Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr] = data;
|
|
|
|
|
+ Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr] = data;
|
|
|
|
|
+
|
|
|
|
|
+ AT24CxxWriteOneByte(temp_addr + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr]);
|
|
|
|
|
+ AT24CxxWriteOneByte(temp_addr + ERom_CH2LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr]);
|
|
|
|
|
+ AT24CxxWriteOneByte(temp_addr + ERom_CH3LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr]);
|
|
|
|
|
+
|
|
|
}
|
|
}
|
|
|
- //orderFlag_N = true;
|
|
|
|
|
- LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
|
|
|
|
|
- LimiT_enable_check((temp_addr + CH2_out),AC3PPDU_RL_time[temp_addr + CH2_out].LT_state);
|
|
|
|
|
- LimiT_enable_check((temp_addr + CH3_out),AC3PPDU_RL_time[temp_addr + CH3_out].LT_state);
|
|
|
|
|
-
|
|
|
|
|
- temp_addr = temp_addr << 1;
|
|
|
|
|
- Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr] = data;
|
|
|
|
|
- Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr] = data;
|
|
|
|
|
- Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr] = data;
|
|
|
|
|
-
|
|
|
|
|
- AT24CxxWriteOneByte(temp_addr + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr]);
|
|
|
|
|
- AT24CxxWriteOneByte(temp_addr + ERom_CH2LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr]);
|
|
|
|
|
- AT24CxxWriteOneByte(temp_addr + ERom_CH3LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr]);
|
|
|
|
|
-
|
|
|
|
|
|
|
+#endif
|
|
|
}
|
|
}
|
|
|
break;
|
|
break;
|
|
|
case Mb_Dbuff_RL_Ton1_Addr ... Mb_Dbuff_RL_TonN_Addr: //set on status delay for 1,2,3,4,5,6,7,8,9,N channels
|
|
case Mb_Dbuff_RL_Ton1_Addr ... Mb_Dbuff_RL_TonN_Addr: //set on status delay for 1,2,3,4,5,6,7,8,9,N channels
|