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@@ -6,6 +6,76 @@
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+#define DEV_CHN_REG (4000)
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+#define OUT_INFO_REG (4001)
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+#define IN_TOTAL_REG (4768)
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+#define TEM_HUMAN_REG (4777)
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+#define CHN_SWITCH_REG (4779)
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+#define CHN_OPEN_DLA_REG (4843)
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+#define CHN_CLOSE_DLA_REG (4907)
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+#define CHN_SET_OPEN_DLA_REG (5000)
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+#define CHN_SET_CLOSE_DLA_REG (5064)
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+#define CHN_SET_SWITCH_STA_REG (5128)
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+#define ALL_SET_SWITCH_REG (5192)
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+
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+
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+
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+enum{
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+ TYPE_U16,
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+ TYPE_U32
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+};
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+
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+
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+enum {
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+ DS_R_DEV_CHN = 0,
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+ DS_R_OUT_INFO,
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+ DS_R_IN_TOTAL,
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+ DS_R_TEMP_HUM,
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+ DS_R_SWITCH_STA,
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+ DS_R_OPEN_DELAY,
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+ DS_R_CLOSE_DELAY,
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+ DS_W_OPEN_DELAY,
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+ DS_W_CLOSE_DELAY,
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+ DS_W_CHN_SWITCH_STA,
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+ DS_W_ALL_CHN_STA
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+};
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+
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+
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+#define TREE_DEV_CHN_REG (6000)
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+#define TREE_INPUT_A_REG (6001)
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+#define TREE_INPUT_B_REG (6009)
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+#define TREE_INPUT_C_REG (6017)
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+#define TREE_CHN_TOTAL_REG (6025)
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+#define TREE_CHN_PH_REG (6665)
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+#define TREE_TEMP_HUM_REG (8585)
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+#define TREE_CHN_SWITCH_STA_REG (8587)
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+#define TREE_CHN_OPEN_DLA_REG (8651)
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+#define TREE_CHN_CLOSE_DLA_REG (8715)
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+#define TREE_CHN_SET_OPEN_DLA_REG (9000)
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+#define TREE_CHN_SET_CLOSE_DLA_REG (9064)
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+#define TREE_CHN_SET_SWITCH_STA_REG (9128)
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+#define TREE_ALL_SET_SWITCH_REG (9192)
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+
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+enum {
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+ TREE_R_DEV_CHN,
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+ TREE_R_INPUT_ALL_A,
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+ TREE_R_INPUT_ALL_B,
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+ TREE_R_INPUT_ALL_C,
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+ TREE_R_CHN_TOTAL,
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+ TREE_R_CHN_PH_INFO,
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+ TREE_R_TEMP_HUM,
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+ TREE_R_SWITCH_STA,
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+ TREE_R_OPEN_DELAY,
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+ TREE_R_CLOSE_DELAY,
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+ TREE_W_OPEN_DELAY,
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+ TREE_W_CLOSE_DELAY,
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+ TREE_W_CHN_SWITCH_STA,
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+ TREE_W_ALL_CHN_STA
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+};
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+
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+
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+
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+
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static inline GlobalDeviceManager* get_dm(void)
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{
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return &__globalDeviceManage;
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@@ -16,19 +86,35 @@ static inline GlobalDeviceManager* get_dm2(void)
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}
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static mmap_modbus_t modbus_single[] = {
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- {.offset = 4000},
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- {.offset = 4001},
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- {.offset = 4769},
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- {.offset = 4779},
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- {.offset = 4843},
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- {.offset = 4971},
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- {.offset = 5000},
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- {.offset = 5064},
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- {.offset = 5128},
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- {.offset = 5192},
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+ [DS_R_DEV_CHN ]{.offset = DEV_CHN_REG },
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+ [DS_R_OUT_INFO ]{.offset = OUT_INFO_REG },
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+ [DS_R_IN_TOTAL ]{.offset = IN_TOTAL_REG },
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+ [DS_R_TEMP_HUM ]{.offset = TEM_HUMAN_REG },
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+ [DS_R_SWITCH_STA ]{.offset = CHN_SWITCH_REG },
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+ [DS_R_OPEN_DELAY ]{.offset = CHN_OPEN_DLA_REG },
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+ [DS_R_CLOSE_DELAY ]{.offset = CHN_CLOSE_DLA_REG },
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+ [DS_W_OPEN_DELAY ]{.offset = CHN_SET_OPEN_DLA_REG },
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+ [DS_W_CLOSE_DELAY ]{.offset = CHN_SET_CLOSE_DLA_REG },
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+ [DS_W_CHN_SWITCH_STA]{.offset = CHN_SET_SWITCH_STA_REG },
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+ [DS_W_ALL_CHN_STA ]{.offset = ALL_SET_SWITCH_REG },
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};
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-
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+static mmap_modbus_t modbus_three[] = {
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+ [TREE_R_DEV_CHN ]{.offset = TREE_DEV_CHN_REG},
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+ [TREE_R_INPUT_ALL_A ]{.offset = TREE_INPUT_A_REG },
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+ [TREE_R_INPUT_ALL_B ]{.offset = TREE_INPUT_B_REG },
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+ [TREE_R_INPUT_ALL_C ]{.offset = TREE_INPUT_C_REG },
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+ [TREE_R_CHN_TOTAL ]{.offset = TREE_CHN_TOTAL_REG },
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+ [TREE_R_CHN_PH_INFO ]{.offset = TREE_CHN_PH_REG },
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+ [TREE_R_TEMP_HUM ]{.offset = TREE_TEMP_HUM_REG },
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+ [TREE_R_SWITCH_STA ]{.offset = TREE_CHN_SWITCH_STA_REG},
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+ [TREE_R_OPEN_DELAY ]{.offset = TREE_CHN_OPEN_DLA_REG },
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+ [TREE_R_CLOSE_DELAY ]{.offset = TREE_CHN_CLOSE_DLA_REG },
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+ [TREE_W_OPEN_DELAY ]{.offset = TREE_CHN_SET_OPEN_DLA_REG},
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+ [TREE_W_CLOSE_DELAY ]{.offset = TREE_CHN_SET_CLOSE_DLA_REG},
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+ [TREE_W_CHN_SWITCH_STA ]{.offset = TREE_CHN_SET_SWITCH_STA_REG},
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+ [TREE_W_ALL_CHN_STA ]{.offset = TREE_ALL_SET_SWITCH_REG }
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+};
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int cascade_slave_map_init(cascade_handle_t *cas)
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{
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@@ -37,187 +123,184 @@ int cascade_slave_map_init(cascade_handle_t *cas)
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if(mgr->_global_device_info->product_pwr_type == SmartPDU_AC ||
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mgr->_global_device_info->product_pwr_type == SmartPDU_DC) // single AC
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{
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- cas->map = modbus_mapping_new_start_address(0,0,0,0,4000,5000,0,0); //3000 ge
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- modbus_single[0].addr = &mgr->single_mmap->dev_chn;
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- modbus_single[1].addr = &mgr->single_mmap->all_ch;
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- modbus_single[2].addr = &mgr->single_mmap->total_valtage;
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- modbus_single[3].addr = &mgr->single_mmap->chn_status;
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- modbus_single[4].addr = &mgr->single_mmap->open_delay;
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- modbus_single[5].addr = &mgr->single_mmap->close_delay;
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- modbus_single[6].addr = &mgr->single_mmap->set_chn_open_delay;
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- modbus_single[7].addr = &mgr->single_mmap->set_chn_close_delay;
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- modbus_single[8].addr = &mgr->single_mmap->set_chn_switch_status;
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- modbus_single[9].addr = &mgr->single_mmap->set_chn_all_switch_status;
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+ cas->map = modbus_mapping_new_start_address(0,0,0,0,DEV_CHN_REG,5000,0,0); //3000 ge
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+ modbus_single[DS_R_DEV_CHN ].addr = &mgr->single_mmap->dev_chn;
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+ modbus_single[DS_R_OUT_INFO ].addr = &mgr->single_mmap->all_ch;
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+ modbus_single[DS_R_IN_TOTAL ].addr = &mgr->single_mmap->total_valtage;
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+ modbus_single[DS_R_TEMP_HUM ].addr = &mgr->single_mmap->total_temp;
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+ modbus_single[DS_R_SWITCH_STA ].addr = &mgr->single_mmap->chn_status;
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+ modbus_single[DS_R_OPEN_DELAY ].addr = &mgr->single_mmap->open_delay;
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+ modbus_single[DS_R_CLOSE_DELAY ].addr = &mgr->single_mmap->close_delay;
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+ modbus_single[DS_W_OPEN_DELAY ].addr = &mgr->single_mmap->set_chn_open_delay;
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+ modbus_single[DS_W_CLOSE_DELAY ].addr = &mgr->single_mmap->set_chn_close_delay;
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+ modbus_single[DS_W_CHN_SWITCH_STA ].addr = &mgr->single_mmap->set_chn_switch_status;
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+ modbus_single[DS_W_ALL_CHN_STA ].addr = &mgr->single_mmap->set_chn_all_switch_status;
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printf("single dc address init 4000\n");
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}else
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{
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- return -1;
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+
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+ cas->map = modbus_mapping_new_start_address(0,0,0,0,TREE_R_DEV_CHN,7000,0,0);
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+ modbus_three[TREE_R_DEV_CHN ].addr = &mgr->triphasic_mmap->dev_chn;
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+ modbus_three[TREE_R_INPUT_ALL_A ].addr = &mgr->triphasic_mmap->i_total.pw_i_total[0];
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+ modbus_three[TREE_R_INPUT_ALL_B ].addr = &mgr->triphasic_mmap->i_total.pw_i_total[1];
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+ modbus_three[TREE_R_INPUT_ALL_C ].addr = &mgr->triphasic_mmap->i_total.pw_i_total[2];
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+ modbus_three[TREE_R_CHN_TOTAL ].addr = &mgr->triphasic_mmap->chn_info;
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+ modbus_three[TREE_R_CHN_PH_INFO ].addr = &mgr->triphasic_mmap->pw_o_chn;
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+ modbus_three[TREE_R_TEMP_HUM ].addr = &mgr->triphasic_mmap->temperature;
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+ modbus_three[TREE_R_SWITCH_STA ].addr = &mgr->triphasic_mmap->chn_status;
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+ modbus_three[TREE_R_OPEN_DELAY ].addr = &mgr->triphasic_mmap->open_delay;
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+ modbus_three[TREE_R_CLOSE_DELAY ].addr = &mgr->triphasic_mmap->close_delay;
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+ modbus_three[TREE_W_OPEN_DELAY ].addr = &mgr->triphasic_mmap->set_chn_open_delay;
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+ modbus_three[TREE_W_CLOSE_DELAY ].addr = &mgr->triphasic_mmap->set_chn_close_delay;
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+ modbus_three[TREE_W_CHN_SWITCH_STA ].addr = &mgr->triphasic_mmap->set_chn_switch_status;
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+ modbus_three[TREE_W_ALL_CHN_STA ].addr = &mgr->triphasic_mmap->set_chn_all_switch_status;
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+ printf("triphasic address init 6000\n");
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+ //return -1;
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}
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return 0;
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}
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-void cascade_slave_read(cascade_handle_t *cas,uint32_t addr,uint32_t lenth)
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-{
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+
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+static void slave_read(cascade_handle_t *cas,uint32_t addr,int num,uint32_t reg_type,uint32_t type)
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+{
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GlobalDeviceManager* mgr = get_dm();
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if(mgr->_global_device_info->product_pwr_type == SmartPDU_AC ||
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- mgr->_global_device_info->product_pwr_type == SmartPDU_DC)
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- {
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- switch (addr)
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+ mgr->_global_device_info->product_pwr_type == SmartPDU_DC){
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+ if(addr >= DEV_CHN_REG && addr <= ALL_SET_SWITCH_REG)
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{
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- case 4000:
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- {
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- uint16_t *base_addr = (uint16_t *)modbus_single[0].addr;
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- uint32_t step = addr - cas->map->start_registers;
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- base_addr = base_addr + (addr - modbus_single[0].offset);
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- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
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- printf("step = %d base_addr = 0x%x map_addr = 0x%x\n", step,base_addr,map_addr);
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- if(lenth < 126)
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- {
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- pthread_mutex_lock(&cas->mutex);
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- memcpy(map_addr, base_addr,2*lenth);
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- pthread_mutex_unlock(&cas->mutex);
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- }
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- }
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- break;
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- case 4001 ... 4768:
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+ if(type == TYPE_U16)
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{
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- uint32_t *base_addr = (uint32_t *)modbus_single[1].addr;
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+ uint16_t *base_addr = (uint16_t *)modbus_single[reg_type].addr;
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uint32_t step = addr - cas->map->start_registers;
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- base_addr = base_addr + (addr - modbus_single[1].offset);
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+ base_addr = base_addr + (addr - modbus_single[reg_type].offset);
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uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
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- printf("step = %d base_addr = 0x%x map_addr = 0x%x\n", step,base_addr,map_addr);
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- if(lenth < 126)
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+ if(num < 126)
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{
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- pthread_mutex_lock(&cas->mutex);
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- memcpy(map_addr, base_addr,2*lenth);
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- pthread_mutex_unlock(&cas->mutex);
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+ pthread_mutex_lock(&cas->mutex);
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+ memcpy(map_addr, base_addr,2*num);
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+ pthread_mutex_unlock(&cas->mutex);
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}
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- }
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- break;
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- case 4769 ... 4778:
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+ }else
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{
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- uint32_t *base_addr = (uint32_t *)modbus_single[2].addr;
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+ uint32_t *base_addr = (uint32_t *)modbus_single[reg_type].addr;
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uint32_t step = addr - cas->map->start_registers;
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- base_addr = base_addr + (addr - modbus_single[2].offset);
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- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
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- if(lenth < 126)
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+ base_addr = base_addr + (addr - modbus_single[reg_type].offset);
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+ uint32_t *map_addr = (uint32_t *)&(cas->map->tab_registers[step]);
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+ if(num < 126)
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{
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- pthread_mutex_lock(&cas->mutex);
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- memcpy(map_addr, base_addr,2*lenth);
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- pthread_mutex_unlock(&cas->mutex);
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+ pthread_mutex_lock(&cas->mutex);
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+ memcpy(map_addr, base_addr,2*num);
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+ pthread_mutex_unlock(&cas->mutex);
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}
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}
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- break;
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- case 4779 ... 4842:
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- {
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- uint16_t *base_addr = (uint16_t *)modbus_single[3].addr;
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- uint32_t step = addr - cas->map->start_registers;
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- base_addr = base_addr + (addr - modbus_single[3].offset);
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- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
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- if(lenth < 126)
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- {
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- pthread_mutex_lock(&cas->mutex);
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- memcpy(map_addr, base_addr,2*lenth);
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- pthread_mutex_unlock(&cas->mutex);
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- }
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- }
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- break;
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- case 4843 ... 4906:
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+ }
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+ }else
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+ {
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+ if(addr >= TREE_DEV_CHN_REG && addr <= TREE_ALL_SET_SWITCH_REG) {
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+ if(type == TYPE_U16)
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{
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- uint16_t *base_addr = (uint16_t *)modbus_single[4].addr;
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+ uint16_t *base_addr = (uint16_t *)modbus_three[reg_type].addr;
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uint32_t step = addr - cas->map->start_registers;
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- base_addr = base_addr + (addr - modbus_single[4].offset);
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+ base_addr = base_addr + (addr - modbus_three[reg_type].offset);
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uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
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- if (lenth < 126)
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+ if(num < 126)
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{
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pthread_mutex_lock(&cas->mutex);
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- memcpy(map_addr, base_addr, 2 * lenth);
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+ memcpy(map_addr, base_addr,2*num);
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pthread_mutex_unlock(&cas->mutex);
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}
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- }
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- break;
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- case 4907 ... 4970:
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+ }else
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{
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- uint16_t *base_addr = (uint16_t *)modbus_single[5].addr;
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+ uint32_t *base_addr = (uint32_t *)modbus_three[reg_type].addr;
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uint32_t step = addr - cas->map->start_registers;
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- base_addr = base_addr + (addr - modbus_single[5].offset);
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- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
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- if (lenth < 126)
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+ base_addr = base_addr + (addr - modbus_three[reg_type].offset);
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+ uint32_t *map_addr = (uint32_t *)&(cas->map->tab_registers[step]);
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+ if(num < 126)
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{
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pthread_mutex_lock(&cas->mutex);
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- memcpy(map_addr, base_addr, 2 * lenth);
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+ memcpy(map_addr, base_addr,2*num);
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pthread_mutex_unlock(&cas->mutex);
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}
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}
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+ }
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+ }
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+}
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+
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+void cascade_slave_read(cascade_handle_t *cas,uint32_t addr,uint32_t lenth)
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+{
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+
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+ switch (addr)
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+ {
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+ case 4000:
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+ slave_read(cas,addr,lenth,DS_R_DEV_CHN,TYPE_U16);
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|
break;
|
|
|
- case 4971 ... 4999:
|
|
|
- {
|
|
|
-
|
|
|
- }
|
|
|
+ case 4001 ... 4768:
|
|
|
+ slave_read(cas,addr,lenth,DS_R_OUT_INFO,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 4769 ... 4776:
|
|
|
+ slave_read(cas,addr,lenth,DS_R_IN_TOTAL,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 4777 ... 4778:
|
|
|
+ slave_read(cas,addr,lenth,DS_R_TEMP_HUM,TYPE_U32);
|
|
|
+ case 4779 ... 4842:
|
|
|
+ slave_read(cas,addr,lenth,DS_R_SWITCH_STA,TYPE_U16);
|
|
|
+ break;
|
|
|
+ case 4843 ... 4906:
|
|
|
+ slave_read(cas,addr,lenth,DS_R_OPEN_DELAY,TYPE_U16);
|
|
|
+ break;
|
|
|
+ case 4907 ... 4970:
|
|
|
+ slave_read(cas,addr,lenth,DS_R_CLOSE_DELAY,TYPE_U16);
|
|
|
break;
|
|
|
case 5000 ... 5063:
|
|
|
- {
|
|
|
- uint16_t *base_addr = (uint16_t *)modbus_single[6].addr;
|
|
|
- uint32_t step = addr - cas->map->start_registers;
|
|
|
- base_addr = base_addr + (addr - modbus_single[6].offset);
|
|
|
- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
|
|
|
- if (lenth < 126)
|
|
|
- {
|
|
|
- pthread_mutex_lock(&cas->mutex);
|
|
|
- memcpy(map_addr, base_addr, 2 * lenth);
|
|
|
- pthread_mutex_unlock(&cas->mutex);
|
|
|
- }
|
|
|
- }
|
|
|
+ slave_read(cas,addr,lenth,DS_W_OPEN_DELAY,TYPE_U16);
|
|
|
break;
|
|
|
case 5064 ... 5127:
|
|
|
- {
|
|
|
- uint16_t *base_addr = (uint16_t *)modbus_single[7].addr;
|
|
|
- uint32_t step = addr - cas->map->start_registers;
|
|
|
- base_addr = base_addr + (addr - modbus_single[7].offset);
|
|
|
- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
|
|
|
- if (lenth < 126)
|
|
|
- {
|
|
|
- pthread_mutex_lock(&cas->mutex);
|
|
|
- memcpy(map_addr, base_addr, 2 * lenth);
|
|
|
- pthread_mutex_unlock(&cas->mutex);
|
|
|
- }
|
|
|
- }
|
|
|
+ slave_read(cas,addr,lenth,DS_W_OPEN_DELAY,TYPE_U16);
|
|
|
break;
|
|
|
case 5128 ... 5191:
|
|
|
- {
|
|
|
- uint16_t *base_addr = (uint16_t *)modbus_single[8].addr;
|
|
|
- uint32_t step = addr - cas->map->start_registers;
|
|
|
- base_addr = base_addr + (addr - modbus_single[8].offset);
|
|
|
- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
|
|
|
- if (lenth < 126)
|
|
|
- {
|
|
|
- pthread_mutex_lock(&cas->mutex);
|
|
|
- memcpy(map_addr, base_addr, 2 * lenth);
|
|
|
- pthread_mutex_unlock(&cas->mutex);
|
|
|
- }
|
|
|
- }
|
|
|
+ slave_read(cas,addr,lenth,DS_W_CHN_SWITCH_STA,TYPE_U16);
|
|
|
break;
|
|
|
case 5192 :
|
|
|
- {
|
|
|
- uint16_t *base_addr = (uint16_t *)modbus_single[9].addr;
|
|
|
- uint32_t step = addr - cas->map->start_registers;
|
|
|
- base_addr = base_addr + (addr - modbus_single[9].offset);
|
|
|
- uint16_t *map_addr = (uint16_t *)&(cas->map->tab_registers[step]);
|
|
|
- if (lenth < 126)
|
|
|
- {
|
|
|
- pthread_mutex_lock(&cas->mutex);
|
|
|
- memcpy(map_addr, base_addr, 2 * lenth);
|
|
|
- pthread_mutex_unlock(&cas->mutex);
|
|
|
- }
|
|
|
- }
|
|
|
+ slave_read(cas,addr,lenth,DS_W_ALL_CHN_STA,TYPE_U16);
|
|
|
+ break;
|
|
|
+
|
|
|
+ // triple
|
|
|
+ case 6000:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_DEV_CHN,TYPE_U16);
|
|
|
+ break;
|
|
|
+ case 6001 ... 6008:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_INPUT_ALL_A,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 6009 ... 6016:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_INPUT_ALL_B,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 6017 ... 6024:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_INPUT_ALL_C,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 6025 ... 6664:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_CHN_TOTAL,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 6665 ... 8584:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_CHN_PH_INFO,TYPE_U32);
|
|
|
+ break;
|
|
|
+ case 8585 ... 8586:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_TEMP_HUM,TYPE_U16);
|
|
|
+ break;
|
|
|
+ case 8587 ... 8650:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_SWITCH_STA,TYPE_U16);
|
|
|
+ break;
|
|
|
+ case 8651 ... 8714:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_OPEN_DELAY,TYPE_U16);
|
|
|
+ break;
|
|
|
+ case 8715 ... 8778:
|
|
|
+ slave_read(cas,addr,lenth,TREE_R_CLOSE_DELAY,TYPE_U16);
|
|
|
break;
|
|
|
default:
|
|
|
break;
|
|
|
}
|
|
|
- }
|
|
|
}
|
|
|
|
|
|
|
|
|
@@ -226,13 +309,14 @@ void cascade_slave_write(cascade_handle_t *cas, uint32_t addr, uint16_t val)
|
|
|
{
|
|
|
GlobalDeviceManager* mgr = get_dm();
|
|
|
uint16_t buff[128] = {0};
|
|
|
- if(mgr->_global_device_info->product_pwr_type == SmartPDU_AC || mgr->_global_device_info->product_pwr_type == SmartPDU_DC)
|
|
|
+ if(mgr->_global_device_info->product_pwr_type == SmartPDU_AC
|
|
|
+ || mgr->_global_device_info->product_pwr_type == SmartPDU_DC)
|
|
|
{
|
|
|
switch(addr)
|
|
|
{
|
|
|
case 5000 ... 5063:
|
|
|
{
|
|
|
- int start_chn = addr - modbus_single[6].offset;
|
|
|
+ int start_chn = addr - modbus_single[DS_W_OPEN_DELAY].offset;
|
|
|
GlobalPowerManger* _globalPowerMangerTemp = NULL ;
|
|
|
list_for_each_entry(_globalPowerMangerTemp, &__globalDeviceManage._globalPowerManger.list, list)
|
|
|
{
|
|
|
@@ -263,7 +347,7 @@ void cascade_slave_write(cascade_handle_t *cas, uint32_t addr, uint16_t val)
|
|
|
break;
|
|
|
case 5064 ... 5127:
|
|
|
{
|
|
|
- int start_chn = addr - modbus_single[7].offset;
|
|
|
+ int start_chn = addr - modbus_single[DS_W_CLOSE_DELAY].offset;
|
|
|
GlobalPowerManger* _globalPowerMangerTemp = NULL ;
|
|
|
list_for_each_entry(_globalPowerMangerTemp, &__globalDeviceManage._globalPowerManger.list, list)
|
|
|
{
|
|
|
@@ -295,7 +379,7 @@ void cascade_slave_write(cascade_handle_t *cas, uint32_t addr, uint16_t val)
|
|
|
break;
|
|
|
case 5128 ... 5191:
|
|
|
{
|
|
|
- int start_chn = addr - modbus_single[8].offset;
|
|
|
+ int start_chn = addr - modbus_single[DS_W_CHN_SWITCH_STA].offset;
|
|
|
GlobalPowerManger* _globalPowerMangerTemp = NULL ;
|
|
|
if (val == 0 || val == 1)
|
|
|
{
|
|
|
@@ -310,7 +394,7 @@ void cascade_slave_write(cascade_handle_t *cas, uint32_t addr, uint16_t val)
|
|
|
_globalPowerMangerTemp->product_ch_addr,
|
|
|
val, false);
|
|
|
// printf("ret = %d 0x%x\n",ret,val);
|
|
|
- *(uint16_t *)((uint16_t *)(modbus_single[8].addr) + start_chn) = val;
|
|
|
+ *(uint16_t *)((uint16_t *)(modbus_single[DS_W_CHN_SWITCH_STA].addr) + start_chn) = val;
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
@@ -329,11 +413,180 @@ void cascade_slave_write(cascade_handle_t *cas, uint32_t addr, uint16_t val)
|
|
|
int rec = g_switch_set_all_ctrl(&__globalDeviceManage._globalRelaySampManger, _globalPowerMangerTemp->product_ch_type, _globalPowerMangerTemp->product_saddr, val);
|
|
|
// printf("rec = %d 0x%x\n",rec,val);
|
|
|
}
|
|
|
- *(uint16_t *)(modbus_single[9].addr) = val;
|
|
|
+ *(uint16_t *)(modbus_single[DS_W_ALL_CHN_STA].addr) = val;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }else{
|
|
|
+ switch(addr)
|
|
|
+ {
|
|
|
+ case 9000 ... 9063:
|
|
|
+ {
|
|
|
+ int start_chn = addr - modbus_three[TREE_W_OPEN_DELAY].offset;
|
|
|
+ GlobalPowerManger* _globalPowerMangerTemp = NULL ;
|
|
|
+ list_for_each_entry(_globalPowerMangerTemp, &__globalDeviceManage._globalPowerManger.list, list){
|
|
|
+ if(_globalPowerMangerTemp==NULL)
|
|
|
+ break;
|
|
|
+ if((start_chn+1) == _globalPowerMangerTemp->product_ch_id)
|
|
|
+ {
|
|
|
+ int ret = 0;
|
|
|
+ if (__globalDeviceManage._global_device_info->product_pwr_type == SmartPDU_Tree_AC_Tree)
|
|
|
+ {
|
|
|
+ ret = g_switch_set_t_ac_start_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3, val / 1000);
|
|
|
+ ret = g_switch_set_t_ac_start_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3 + 1, val / 1000);
|
|
|
+ ret = g_switch_set_t_ac_start_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3 + 2, val / 1000);
|
|
|
+ }
|
|
|
+ else
|
|
|
+ {
|
|
|
+ ret = g_switch_set_t_ac_start_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3, val / 1000);
|
|
|
+ }
|
|
|
+ if (dev_update_power_manage_genera_info(__globalDeviceManage.db, _globalPowerMangerTemp->product_id, _globalPowerMangerTemp->product_ch_id, _globalPowerMangerTemp) != 0)
|
|
|
+ {
|
|
|
+ log_e("update pwr general data err.");
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case 9064 ... 9127:
|
|
|
+ {
|
|
|
+ int start_chn = addr - modbus_three[TREE_W_CLOSE_DELAY].offset;
|
|
|
+ GlobalPowerManger* _globalPowerMangerTemp = NULL ;
|
|
|
+ list_for_each_entry(_globalPowerMangerTemp, &__globalDeviceManage._globalPowerManger.list, list)
|
|
|
+ {
|
|
|
+ if(_globalPowerMangerTemp==NULL)
|
|
|
+ break;
|
|
|
+ if((start_chn+1) == _globalPowerMangerTemp->product_ch_id)
|
|
|
+ {
|
|
|
+ int ret = 0;
|
|
|
+ if (__globalDeviceManage._global_device_info->product_pwr_type == SmartPDU_Tree_AC_Tree)
|
|
|
+ {
|
|
|
+ ret = g_switch_set_t_ac_stop_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3, val / 1000);
|
|
|
+ ret = g_switch_set_t_ac_stop_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3 + 1, val / 1000);
|
|
|
+ ret = g_switch_set_t_ac_stop_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3 + 2, val / 1000);
|
|
|
+ }
|
|
|
+ else
|
|
|
+ {
|
|
|
+ ret = g_switch_set_t_ac_stop_time_delay(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr, (_globalPowerMangerTemp->product_ch_addr - 1) * 3, val / 1000);
|
|
|
+ }
|
|
|
+ if (dev_update_power_manage_genera_info(__globalDeviceManage.db, _globalPowerMangerTemp->product_id, _globalPowerMangerTemp->product_ch_id, _globalPowerMangerTemp) != 0)
|
|
|
+ {
|
|
|
+ log_e("update pwr general data err.");
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case 9128 ... 9191:
|
|
|
+ {
|
|
|
+ int start_chn = addr - modbus_three[TREE_W_CLOSE_DELAY].offset;
|
|
|
+ GlobalPowerManger* _globalPowerMangerTemp = NULL ;
|
|
|
+ list_for_each_entry(_globalPowerMangerTemp, &__globalDeviceManage._globalPowerManger.list, list){
|
|
|
+ if(_globalPowerMangerTemp==NULL)
|
|
|
+ break;
|
|
|
+ if((start_chn+1) == _globalPowerMangerTemp->product_ch_id)
|
|
|
+ {
|
|
|
+ int t_ac_CtrlType=0;
|
|
|
+ int nRet = 0;
|
|
|
+ GlobalTreeACManager *_globalTACManager = NULL;
|
|
|
+ list_for_each_entry(_globalTACManager, &_globalPowerMangerTemp->list_Tree_AC, list_Tree_AC)
|
|
|
+ {
|
|
|
+ t_ac_CtrlType=_globalTACManager->product_ph_outputType;
|
|
|
+ }
|
|
|
+ if (t_ac_CtrlType == 2&&__globalDeviceManage._global_device_info->product_pwr_type == SmartPDU_Tree_AC_Tree)
|
|
|
+ {
|
|
|
+ unsigned short phsts=0;
|
|
|
+ list_for_each_entry(_globalTACManager, &_globalPowerMangerTemp->list_Tree_AC, list_Tree_AC)
|
|
|
+ {
|
|
|
+ if (val == 1 && _globalTACManager->product_ph_outputStatus==1)
|
|
|
+ {
|
|
|
+ phsts=1;
|
|
|
+ if (_globalTACManager->global_over_manager->product_vol_upper_enable == 1)
|
|
|
+ phsts |= ENABLE_TAC_V_UP;
|
|
|
+ if (_globalTACManager->global_over_manager->product_vol_lower_enable == 1)
|
|
|
+ phsts |= ENABLE_TAC_V_DOWN;
|
|
|
+ if (_globalTACManager->global_over_manager->product_cur_upper_enable == 1)
|
|
|
+ phsts |= ENABLE_TAC_A_UP;
|
|
|
+ if (_globalTACManager->global_over_manager->product_pwr_upper_enable == 1)
|
|
|
+ phsts |= ENABLE_TAC_W_UP;
|
|
|
+ if (_globalTACManager->global_over_manager->product_pwrcon_upper_enable == 1)
|
|
|
+ phsts |= ENABLE_TAC_P_UP;
|
|
|
+ }else{
|
|
|
+ phsts=0;
|
|
|
+ }
|
|
|
+ nRet= g_switch_set_t_ac_phchn_ctrl(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalTACManager->product_saddr,
|
|
|
+ _globalTACManager->product_ch_addr - 1,
|
|
|
+ phsts);
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ }else
|
|
|
+ {
|
|
|
+ if (val == 1)
|
|
|
+ {
|
|
|
+ if (_globalPowerMangerTemp->global_over_manager->product_vol_upper_enable == 1)
|
|
|
+ val |= ENABLE_TAC_V_UP;
|
|
|
+ if (_globalPowerMangerTemp->global_over_manager->product_vol_lower_enable == 1)
|
|
|
+ val |= ENABLE_TAC_V_DOWN;
|
|
|
+ if (_globalPowerMangerTemp->global_over_manager->product_cur_upper_enable == 1)
|
|
|
+ val |= ENABLE_TAC_A_UP;
|
|
|
+ if (_globalPowerMangerTemp->global_over_manager->product_pwr_upper_enable == 1)
|
|
|
+ val |= ENABLE_TAC_W_UP;
|
|
|
+ if (_globalPowerMangerTemp->global_over_manager->product_pwrcon_upper_enable == 1)
|
|
|
+ val |= ENABLE_TAC_P_UP;
|
|
|
+ }
|
|
|
+ /*
|
|
|
+ if (isgroup)
|
|
|
+ {
|
|
|
+ sts |= ENABLE_TAC_STIME;
|
|
|
+ sts |= ENABLE_TAC_ETIME;
|
|
|
+ }*/
|
|
|
+ if (__globalDeviceManage._global_device_info->product_pwr_type == SmartPDU_Tree_AC_One)
|
|
|
+ {
|
|
|
+ g_switch_set_t_ac_phchn_ctrl(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr,
|
|
|
+ _globalPowerMangerTemp->product_ch_addr - 1,
|
|
|
+ val);
|
|
|
+ }else{
|
|
|
+ g_switch_set_t_ac_chn_ctrl(&__globalDeviceManage._globalRelaySampManger,
|
|
|
+ _globalPowerMangerTemp->product_saddr,
|
|
|
+ _globalPowerMangerTemp->product_ch_addr - 1,
|
|
|
+ val);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case 9192:
|
|
|
+ {
|
|
|
+ if (val == 0 || val == 1)
|
|
|
+ {
|
|
|
+ GlobalPowerManger *_globalPowerMangerTemp = NULL;
|
|
|
+ list_for_each_entry(_globalPowerMangerTemp, &__globalDeviceManage._globalPowerManger.list, list)
|
|
|
+ {
|
|
|
+ if (_globalPowerMangerTemp == NULL)
|
|
|
+ break;
|
|
|
+ int rec = g_switch_set_all_ctrl(&__globalDeviceManage._globalRelaySampManger, _globalPowerMangerTemp->product_ch_type, _globalPowerMangerTemp->product_saddr, val);
|
|
|
+ // printf("rec = %d 0x%x\n",rec,val);
|
|
|
+ }
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
-
|
|
|
default:
|
|
|
break;
|
|
|
}
|