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@@ -1024,36 +1024,483 @@ static void b_dc_set_all_consumer_clear(uint8_t addr)
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static void b_3_3_ac_power_get(uint8_t addr)
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{
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-
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+ power_handle_new_t *h = &pwr_Handle;
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+ power_t *pwr=NULL,power={0};
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+ uint16_t offset,tmp[144]={0};
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+ power_ch_new_t *pch=NULL;
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+ alarm_all_t alarm_stat = {0};
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+ int r = 0;
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+ offset = POWER_AC3_OUT_INFO;
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+ uint32_t val = 0;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*3*16);
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+ if (r== 0) {
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+ for(int k = 0; k < h->board[addr].board_new.cnt;k++)
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+ {
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+ for (int i=0; i < 3; i++) {
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+
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+ int idx = i*16;
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+ pwr = &h->board[addr].board_new.p_ch[k].power[i];
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+
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+ val = (tmp[1 + idx] << 16) | tmp[0 + idx];
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+ pwr->voltage = val / 1000.0;
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+
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+ val = (tmp[3 + idx] << 16) | tmp[2 + idx];
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+ pwr->current = val / 1000.0;
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+
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+ val = (tmp[5 + idx] << 16) | tmp[4 + idx];
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+ pwr->power = val / 1000.0;
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+
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+ val = (tmp[11 + idx] << 16) | tmp[10 + idx];
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+ pwr->freq = val / 1000.0;
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+
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+ val = (tmp[13 + idx] << 16) | tmp[13 + idx];
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+ pwr->consump = val / 1000.0;
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+
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+ val = (tmp[15 + idx] << 16) | tmp[14 + idx];
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+ pwr->factor = val / 1000.0;
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+ if(pwr->factor >0.01)
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+ {
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+ pwr->app_power = pwr->power / pwr->factor;
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+ }else
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+ {
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+ pwr->app_power = pwr->power;
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+ }
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+
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+ if(pwr->factor >0.01)
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+ {
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+ float app_power2 = pwr->app_power * pwr->app_power;
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+ float power2 = pwr->power * pwr->power;
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+
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+ double f = (double)(app_power2) - power2;
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+ if(f < 0.0)
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+ pwr->reactive_power = 0;
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+ else
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+ pwr->reactive_power = (float)sqrt(f);
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+ }else
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+ {
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+ pwr->reactive_power = 0;
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+ }
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+ pwr->power /= 1000.0;
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+ pwr->app_power /= 1000.0;
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+ pwr->reactive_power /= 1000.0;
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+ }
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+ offset = POWER_AC3_OUT_ENABLE;
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+ memset(tmp,0,sizeof(tmp));
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if (r== 0) {
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+ for(int k = 0;k < h->board[addr].board_new.cnt;k++)
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+ {
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+ pch = &h->board[addr].board_new.p_ch[k];
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+ for (int i=0; i < 3; i++) {
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+ int index = i * 2;
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+ pch->info.status = (tmp[0+index] & BIT(0)) ? 1 : 0;
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+ }
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+
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+ offset = POWER_AC3_OUT_ERROR;
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+ memset(tmp,0,sizeof(tmp));
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ p_alar_t alarm = {0};
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+ p_alar_t alarm_old = {0};
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+ if (r== 0) {
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+ for(int k = 0;k < h->board[addr].board_new.cnt;k++)
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+ {
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+ alarm_old.ala_all = h->board[addr].board_new.p_ch[k].info.alarm;
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+ for (int i=0; i < 3; i++) {
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+ int index = i * 2;
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+ alarm.ala[i].l_v_upper = (tmp[0+index] & BIT(0))?1:0;
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+ alarm.ala[i].l_v_lower = (tmp[0+index] & BIT(1))?1:0;
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+ alarm.ala[i].l_c_upper = (tmp[0+index] & BIT(2))?1:0;
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+ alarm.ala[i].l_p_upper = (tmp[0+index] & BIT(3))?1:0;
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+ alarm.ala[i].l_w_upper = (tmp[0+index] & BIT(4))?1:0;
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+ op_wanning_info info={0};
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+ info.ph_info = (i+1);
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+ if(!alarm_old.ala[i].l_v_upper && alarm.ala[i].l_v_upper)
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+ {
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+ info.ele_info = STR_POWER_ID_VOL;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!alarm_old.ala[i].l_v_lower && alarm.ala[i].l_v_lower)
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+ {
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+ info.ele_info = STR_POWER_ID_VOL;
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+ info.max_min = STR_POWER_ID_MIN;
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+ info.over = STR_POWER_ID_LOW;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!alarm_old.ala[i].l_c_upper && alarm.ala[i].l_c_upper)
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+ {
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+ info.ele_info = STR_POWER_ID_CUR;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+ if(!alarm_old.ala[i].l_p_upper && alarm.ala[i].l_p_upper)
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+ {
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+ info.ele_info = STR_POWER_ID_POWER;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+ if(!alarm_old.ala[i].l_w_upper && alarm.ala[i].l_w_upper)
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+ {
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+ info.ele_info = STR_POWER_ID_CONSUMER;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+ }
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+ h->board[addr].board_new.p_ch[k].info.alarm = alarm.ala_all;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+
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+ offset = POWER_AC3_ALARM_MISSING_PH;
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+ memset(tmp,0,sizeof(tmp));
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+ r = read_reg(NULL, addr, offset, tmp, 6);
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+
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+ if(r == 0)
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+ {
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+ for(int k = 0;k < h->board[addr].board_new.cnt;k++)
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+ {
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+ int value[3] = {0};
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+ for(int i = 0; i < 3; i++)
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+ {
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+ if(tmp[i * 2]>0)
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+ {
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+ value[i]=1;
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+ }
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+ }
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+ alarm.ala[3].l_v_upper = value[0]; //lost 1 phase
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+ alarm.ala[3].l_v_lower = value[1]; //lost 2 phase
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+ alarm.ala[3].l_c_upper = value[2]; //lost 3 phase
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+ op_wanning_info info={0};
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+
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+ if(!alarm_old.ala[3].l_v_upper && alarm.ala[3].l_v_upper)
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+ {
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+ lose_operation(pch->info.name,1,1);
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+ }
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+
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+ if(!alarm_old.ala[3].l_v_lower && alarm.ala[3].l_v_lower)
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+ {
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+ lose_operation(pch->info.name,2,2);
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+ }
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+
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+ if(!alarm_old.ala[3].l_c_upper && alarm.ala[3].l_c_upper)
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+ {
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+ lose_operation(pch->info.name,3,3);
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+ }
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+ h->board[addr].board_new.p_ch[k].info.alarm = alarm.ala_all;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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}
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+
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static void b_3_3_ac_delay_get(uint8_t addr)
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{
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-
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+ power_handle_new_t *h = &pwr_Handle;
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+ power_t *pwr=NULL,power={0};
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+ uint16_t offset,tmp[20]={0};
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+ power_ch_new_t *pch=NULL;
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+ int r = 0;
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+ offset = POWER_AC3_OPEN_DELAY_TIME;
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+ uint32_t val = 0;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for(int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ int index = i * 2 * 3;
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+ val = (tmp[1+index] << 16) | tmp[0+index];
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+ pch->info.open_delay = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+ offset = POWER_AC3_CLOSE_DELAY_TIME;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for(int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ int index = i * 2 * 3;
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+ val = (tmp[1+index] << 16) | tmp[0+index];
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+ pch->info.close_delay = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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}
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static void b_3_3_ac_thr_get(uint8_t addr)
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{
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-
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+ power_handle_new_t *h = &pwr_Handle;
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+ power_t *pwr=NULL,power={0};
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+ uint16_t offset,tmp[144]={0};
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+ power_ch_new_t *pch=NULL;
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+ int r = 0;
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+ offset = POWER_AC3_THRESHOLD_VOL_MAX;
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+ uint32_t val = 0;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for( int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ int index = i*2*3;
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ val = tmp[1+ index] << 16 | tmp[0+index] ;
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+ pch->thr.v_upper = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+ offset = POWER_AC3_THRESHOLD_VOL_MIN;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for( int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ int index = i*2*3;
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ val = tmp[1+ index] << 16 | tmp[0+index];
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+ pch->thr.v_lower = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+ offset = POWER_AC3_THRESHOLD_CUR_MAX;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for( int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ int index = i*2*3;
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ val = tmp[1+ index] << 16 | tmp[0+index];
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+ pch->thr.c_upper = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+
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+ offset = POWER_AC3_THRESHOLD_PWR_MAX;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for( int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ int index = i*2*3;
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ val = tmp[1+ index] << 16 | tmp[0+index];
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+ pch->thr.p_upper = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+
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+ offset = POWER_AC3_THRESHOLD_PWRCON_MAX;
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+ r = read_reg(NULL, addr, offset, tmp, h->board[addr].board_new.cnt*2*3);
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+ if(r == 0)
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+ {
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+ for( int i = 0; i < h->board[addr].board_new.cnt;i++)
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+ {
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+ int index = i*2*3;
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+ pch = &h->board[addr].board_new.p_ch[i];
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+ val = tmp[1+ index] << 16 | tmp[0+index];
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+ pch->thr.w_upper = val / 1000.0;
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+ }
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+ }else
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+ {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", addr, offset, offset, h->board[addr].board_new.cnt);
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+ }
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+
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+
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}
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static void b_3_3_ac_set_delay(uint8_t addr,uint8_t b_addr,uint16_t delay_open, uint16_t delay_close)
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{
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+ power_handle_new_t *h = &pwr_Handle;
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+ power_t *pwr=NULL,power={0};
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+ uint16_t offset,tmp[6]={0};
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+ power_ch_new_t *pch=NULL;
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+ int r = 0;
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+ offset = POWER_AC3_OPEN_DELAY_TIME;
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+ pch = &h->board[addr].board_new.p_ch[b_addr];
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+ uint32_t delay = delay_open * 1000;
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+
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+ tmp[0] = delay & 0xFFFF;
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+ tmp[1] = (delay >> 16) & 0xFFFF;
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+
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+ tmp[2] = delay & 0xFFFF;
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+ tmp[3] = (delay >> 16) & 0xFFFF;
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+
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+ tmp[4] = delay & 0xFFFF;
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+ tmp[5] = (delay >> 16) & 0xFFFF;
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+
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+ r = write_reg(NULL, addr, offset, tmp, 6);
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+
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+ offset = POWER_AC3_CLOSE_DELAY_TIME;
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+ delay = delay_close * 1000;
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+
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+ tmp[0] = delay & 0xFFFF;
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+ tmp[1] = (delay >> 16) & 0xFFFF;
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+
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+ tmp[2] = delay & 0xFFFF;
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+ tmp[3] = (delay >> 16) & 0xFFFF;
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+
|
|
|
+ tmp[4] = delay & 0xFFFF;
|
|
|
+ tmp[5] = (delay >> 16) & 0xFFFF;
|
|
|
+
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 6);
|
|
|
+
|
|
|
+ pch->info.open_delay = delay_open;
|
|
|
+ pch->info.close_delay = delay_close;
|
|
|
+
|
|
|
}
|
|
|
static void b_3_3_ac_set_thr(uint8_t addr,uint8_t b_addr,thr_t *th)
|
|
|
{
|
|
|
+ power_handle_new_t *h = &pwr_Handle;
|
|
|
+ power_t *pwr=NULL,power={0};
|
|
|
+ uint16_t offset,tmp[6]={0};
|
|
|
+ power_ch_new_t *pch=NULL;
|
|
|
+ int r = 0;
|
|
|
+ offset = POWER_AC3_THRESHOLD_VOL_MAX+(b_addr * 3);
|
|
|
+ pch = &h->board[addr].board_new.p_ch[b_addr];
|
|
|
+ uint32_t value = th->v_upper * 1000;
|
|
|
+ tmp[0] = value & 0xffff;
|
|
|
+ tmp[1] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[2] = value & 0xffff;
|
|
|
+ tmp[3] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[4] = value & 0xffff;
|
|
|
+ tmp[5] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 6);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_VOL_MIN+(b_addr * 3);
|
|
|
+ value = th->v_lower * 1000;
|
|
|
+ tmp[0] = value & 0xffff;
|
|
|
+ tmp[1] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[2] = value & 0xffff;
|
|
|
+ tmp[3] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[4] = value & 0xffff;
|
|
|
+ tmp[5] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 6);
|
|
|
+
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_CUR_MAX+(b_addr * 3);
|
|
|
+ value = th->c_upper * 1000;
|
|
|
+ tmp[0] = value & 0xffff;
|
|
|
+ tmp[1] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[2] = value & 0xffff;
|
|
|
+ tmp[3] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[4] = value & 0xffff;
|
|
|
+ tmp[5] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 6);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_PWR_MAX+(b_addr * 3);
|
|
|
+ value = th->p_upper * 1000;
|
|
|
+ tmp[0] = value & 0xffff;
|
|
|
+ tmp[1] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[2] = value & 0xffff;
|
|
|
+ tmp[3] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[4] = value & 0xffff;
|
|
|
+ tmp[5] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 6);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_PWRCON_MAX+(b_addr * 3);
|
|
|
+ value = th->w_upper * 1000;
|
|
|
+ tmp[0] = value & 0xffff;
|
|
|
+ tmp[1] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[2] = value & 0xffff;
|
|
|
+ tmp[3] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ tmp[4] = value & 0xffff;
|
|
|
+ tmp[5] = (value >> 16) & 0xffff;
|
|
|
+
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 6);
|
|
|
+
|
|
|
+ pch->thr = *th;
|
|
|
}
|
|
|
static void b_3_3_ac_set_status(uint8_t addr,uint8_t b_addr,uint8_t status)
|
|
|
{
|
|
|
+ uint16_t offset,tmp[6]={0};
|
|
|
+ int r = 0;
|
|
|
+ tmp[0] = status;
|
|
|
+ tmp[1] = status;
|
|
|
+ tmp[2] = status;
|
|
|
+ offset = POWER_AC3_CH_OUT_ENABLE + (b_addr*3);
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 3);
|
|
|
}
|
|
|
static void b_3_3_ac_set_consumer_clear(uint8_t addr,uint8_t b_addr)
|
|
|
{
|
|
|
+ uint16_t offset,tmp[6]={0};
|
|
|
+ int r = 0;
|
|
|
+ offset = POWER_AC3_RESET_CONSUMP + (b_addr*3);
|
|
|
+ tmp[0] = 1;
|
|
|
+ tmp[1] = 1;
|
|
|
+ tmp[2] = 1;
|
|
|
+ r = write_reg(NULL, addr, offset, tmp, 3);
|
|
|
}
|
|
|
static void b_3_3_ac_set_all_status(uint8_t status)
|
|
|
{
|
|
|
+ power_handle_new_t *h = &pwr_Handle;
|
|
|
+ power_t *pwr=NULL,power={0};
|
|
|
+ uint16_t offset,tmp[6]={0};
|
|
|
+ power_ch_new_t *pch=NULL;
|
|
|
+ int r = 0;
|
|
|
+ tmp[0] = 1;
|
|
|
+ if(status)
|
|
|
+ offset = POWER_AC3_ALL_OPEN_INFO;
|
|
|
+ else
|
|
|
+ offset = POWER_AC3_ALL_CLOSE_INFO;
|
|
|
+ r = write_reg(NULL, 0, offset, tmp, 1);
|
|
|
+ r = write_reg(NULL, 0, offset, tmp, 1);
|
|
|
}
|
|
|
static void b_3_3_ac_set_all_consumer_clear(uint8_t addr)
|
|
|
{
|
|
|
+ uint16_t offset,tmp[6]={0};
|
|
|
+ int r = 0;
|
|
|
+ tmp[0] = 1;
|
|
|
+ offset = POWER_AC3_RESET_CONSUMP_ALL;
|
|
|
+ r = write_reg(NULL, 0, offset, tmp, 1);
|
|
|
+ r = write_reg(NULL, 0, offset, tmp, 1);
|
|
|
}
|
|
|
|
|
|
static void b_3_2_ac_power_get(uint8_t addr)
|