|
@@ -10,8 +10,9 @@
|
|
|
#define PRJ_ADC_V_DC_8 0
|
|
#define PRJ_ADC_V_DC_8 0
|
|
|
#define PRJ_ADC_V_DC_7_1 0
|
|
#define PRJ_ADC_V_DC_7_1 0
|
|
|
#define PRJ_ADC_V_DC_4_4 0
|
|
#define PRJ_ADC_V_DC_4_4 0
|
|
|
-#define PRJ_ADC_V_DC_NEW_8 1
|
|
|
|
|
-
|
|
|
|
|
|
|
+#define PRJ_ADC_V_DC_NEW_8 0
|
|
|
|
|
+#define PRJ_ADC_V_DC_NEW_7 0
|
|
|
|
|
+#define PRJ_ADC_V_DC_NEW_6 1
|
|
|
#if PRJ_BASE_DC_8
|
|
#if PRJ_BASE_DC_8
|
|
|
#define RELAY_ChN_default 8
|
|
#define RELAY_ChN_default 8
|
|
|
#define SUPPORT_IM1253E 1
|
|
#define SUPPORT_IM1253E 1
|
|
@@ -39,6 +40,16 @@
|
|
|
#define SURPPOT_ALL_ON_ALL_OFF 1
|
|
#define SURPPOT_ALL_ON_ALL_OFF 1
|
|
|
#define SUPPORT_DETECTION 1
|
|
#define SUPPORT_DETECTION 1
|
|
|
#define SUPPORT_STM32_ADC 1
|
|
#define SUPPORT_STM32_ADC 1
|
|
|
|
|
+#elif PRJ_ADC_V_DC_NEW_7
|
|
|
|
|
+ #define RELAY_ChN_default 7
|
|
|
|
|
+ #define SURPPOT_ALL_ON_ALL_OFF 1
|
|
|
|
|
+ #define SUPPORT_DETECTION 1
|
|
|
|
|
+ #define SUPPORT_STM32_ADC 1
|
|
|
|
|
+#elif PRJ_ADC_V_DC_NEW_6
|
|
|
|
|
+ #define RELAY_ChN_default 6
|
|
|
|
|
+ #define SURPPOT_ALL_ON_ALL_OFF 1
|
|
|
|
|
+ #define SUPPORT_DETECTION 1
|
|
|
|
|
+ #define SUPPORT_STM32_ADC 1
|
|
|
#endif
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|