双火线匹配单相控制。

truing_control/PDU-Triphasic_IO/HARDWARE/ReadEeprom/ReadEeprom.c

@@ -259,6 +259,14 @@ void  ReadEeprom(void)
 		{
 				AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] = 0;			
 		}
+		for(int i = 0 ; i < 4;i++)
+		{
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] = Eeprom_Rbuf[ERom_SINGLE_OUT_CH_Addr+i];
+			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] > 3)
+			{
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] = 0;
+			}
+		}
 }
 
 /*********************************************************************************************************

truing_control/PDU-Triphasic_IO/USER/board_cfg.h

@@ -22,6 +22,7 @@
 	#define SUPPORT_DETECTION     	1
 	#define SUPPORT_DETECT_REMENBER 1
 	#define SUPPORT_DOUBLE_FIRE     1
+	#define PH_STEP                 4
 #endif
 
 #endif

truing_control/PDU-Triphasic_IO/USER/main.c

@@ -67,6 +67,7 @@ bool orderFlag[Output_ChN_default] ={0};
 #endif
 
 
+
 uint8_t RL_begin_delay_flag[Output_ChN_default] 	= {0x00};
 uint8_t RL_end_delay_flag[Output_ChN_default] 		= {0x00};
 uint8_t RL_ON_flag[Output_ChN_default] 						= {0x00};
@@ -93,7 +94,12 @@ uint8_t write_kwh2Eeprom_flag 													= 0;
 
 #if SUPPORT_DETECT_REMENBER
 	uint8_t handle_status[Output_ChN_default] = {0};
-	uint8_t handle_detection[1] = {1};
+	
+#if SUPPORT_DOUBLE_FIRE
+		uint8_t handle_detection[2] = {1,1};
+#else
+		uint8_t handle_detection[1] = {1};
+#endif 
 	#if SUPPORT_ZERO_LINE
 		uint8_t handle_status_N = 0;
 	#endif
@@ -372,8 +378,8 @@ static void  check_jlink()
 						RL_OFF_flag[k] = 0;
 					
 					}
+					orderFlag[k]=false;
 				}
-				orderFlag[k]=false;
 				AC3PPDU_RL_time[k + CH1_out].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + k];
 			}
 			
@@ -529,16 +535,30 @@ static void RL_Over_Func()
 		return;
 	}
 #if SUPPORT_DOUBLE_FIRE
-	for(int i = 0; i < Output_ChN_default / 2;i++)
+	
+	for(int i = 0; i < PH_STEP;i++)
 	{
-		if(RL_Func_statu[i+1] || RL_Func_statu[i+1+4])
+		if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+		{
+			if(RL_Func_statu[i+1] || RL_Func_statu[i+1+PH_STEP])
+			{
+				RL_Func_statu[i+1] = 0;
+				RL_Func_statu[i+1+PH_STEP] = 0;
+				AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
+				AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state = AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state &0xffffff3e;
+				orderFlag[i]=true;
+				orderFlag[i+PH_STEP]=true;
+			}
+		}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
 		{
 			RL_Func_statu[i+1] = 0;
-			RL_Func_statu[i+1+4] = 0;
 			AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
-			AC3PPDU_RL_time[i + CH1_out+4].LT_state = AC3PPDU_RL_time[i + CH1_out+4].LT_state &0xffffff3e;
 			orderFlag[i]=true;
-			orderFlag[i+4]=true;
+		}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+		{
+			RL_Func_statu[i+1+PH_STEP] = 0;
+			AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state = AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state &0xffffff3e;
+			orderFlag[i+PH_STEP]=true;			
 		}
 	}
 #else
@@ -561,35 +581,141 @@ static void key_io_control()
 #endif
 }
 
+
+
 void switch_recode()
 {
 #if SUPPORT_DETECTION
 #if SUPPORT_DETECT_REMENBER
 	#if SUPPORT_DOUBLE_FIRE
+	
+	uint8_t sync_buff[PH_STEP] = {0};
+	
 	if(detection_value != 0x3)
 	{
-		if(handle_detection[0] == 1)
+		if((detection_value & 0x1) == 0)
 		{
-			for(int i = 0; i < Output_ChN_default;i++)
-			{	
-				handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
-				AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
-				orderFlag[i]=true;	
+			if(handle_detection[0] == 1)
+			{
+				for(int i= 0; i < PH_STEP;i++)
+				{
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+					{
+						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+						AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+						orderFlag[i]=true;	
+						handle_status[i+PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
+						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state &= 0xffffff7e;
+						orderFlag[i+PH_STEP]=true;		
+						sync_buff[i] = 1;
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+					{
+						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+						AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+						orderFlag[i]=true;	
+						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state &= 0xffffff7e;
+						orderFlag[i+PH_STEP]=true;						
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+					{
+						AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+						orderFlag[i]=true;
+					}
+				}
+				handle_detection[0] = 0;
 			}
-			handle_detection[0] = 0;			
 		}
+
+		if((detection_value & 0x2) == 0)
+		{
+			if(handle_detection[1] == 1)
+			{
+				for(int i= 0; i < PH_STEP;i++)
+				{
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+					{
+						if(sync_buff[i])
+						{
+						}else
+						{
+							handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+							AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+							orderFlag[i]=true;	
+							handle_status[i+PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
+							AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state &= 0xffffff7e;
+							orderFlag[i+PH_STEP]=true;		
+						}
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+					{
+						AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+						orderFlag[i]=true;					
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+					{
+						handle_status[i + PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
+						AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state &= 0xffffff7e;
+						orderFlag[i+PH_STEP]=true;
+						AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+						orderFlag[i]=true;						
+					}
+				}
+				handle_detection[1] = 0;
+			}
+		}		
 	}else
 	{
 		if(handle_detection[0] == 0)
 		{
-			for(int i = 0; i < Output_ChN_default;i++)
+			handle_detection[0] = 1;
+			for(int i = 0; i < PH_STEP;i++)
 			{
-				//uint32_t data = (AC3PPDU_RL_time[i + CH1_out].LT_state & (~0x40));
-				AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
-				AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
-				orderFlag[i]=true;
+				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+				{
+					AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
+					AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
+					orderFlag[i]=true;
+					AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= 0x40;
+					AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= handle_status[i+PH_STEP];
+					orderFlag[i+PH_STEP]=true;
+					sync_buff[i] = 1;					
+				}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+				{
+					AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
+					AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
+					orderFlag[i]=true;					
+				}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+				{
+					
+				}
+			}
+		}
+		if(handle_detection[1] == 0)
+		{
+			handle_detection[1] = 1;
+			for(int i = 0; i < PH_STEP;i++)
+			{
+				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+				{
+					if(sync_buff[i])
+					{
+					
+					}else
+					{
+						AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
+						AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
+						orderFlag[i]=true;
+						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= 0x40;
+						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= handle_status[i+PH_STEP];
+						orderFlag[i+PH_STEP]=true;						
+					}
+				}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+				{
+					
+				}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+				{
+					AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= 0x40;
+					AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= handle_status[i+PH_STEP];
+					orderFlag[i + PH_STEP]=true;								
+				}
 			}
-			handle_detection[0] = 1;	
 		}
 	}
 	#else
@@ -785,10 +911,79 @@ int main(void)
 	// switch_recode();
 #if SUPPORT_DETECTION
 #if SUPPORT_DOUBLE_FIRE
+
 	if(detection_value != 0x3)
+	{
+		if((detection_value & 0x1) == 0)
+		{
+			if(handle_detection[0])
+			{
+				for(int i = 0; i < PH_STEP; i++)
+				{
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+					{
+						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
+						handle_status[i + PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+					{
+						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+					{
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
+					}
+				}
+				handle_detection[0] = 0;
+			}else
+			{
+				;;;
+			}
+		}
+		if((detection_value & 0x2) == 0)
+		{
+			if(handle_detection[1])
+			{
+				for(int i = 0; i < PH_STEP; i++)
+				{
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+					{
+						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
+						handle_status[i + PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;						
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+					{
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;						
+					}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+					{
+						handle_status[i+PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i+PH_STEP] & 0x1);
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;						
+					}
+				}
+			}
+			handle_detection[1] = 0;
+		}
+	}else
+	{
+		for(int i = 0; i < PH_STEP; i++)
+		{
+			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+			{
+				;;
+			}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+			{
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;		
+			}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+			{
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;		
+			}
+		}
+	}
+
 #else
 	if(detection_value == 0)
-#endif
 	{
 		if(handle_detection[0] == 1)
 		{
@@ -804,6 +999,7 @@ int main(void)
 		handle_detection[0] = 0;	
 		}
 	}
+#endif
 	
 #endif
 
@@ -1020,11 +1216,118 @@ static void MODbus_CMD_New(void)
 			{
 #if SUPPORT_DETECTION
 	#if SUPPORT_DOUBLE_FIRE
-					if(detection_value == 0x3)
+					RL_Allon_flag = true;
+					if(detection_value != 0x3)
+					{
+						uint8_t sync_buff[PH_STEP] = {0};
+						
+						if(detection_value & 0x1)
+						{
+							for(i = 0;i < PH_STEP;i++)
+							{
+								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+								{
+									temp_addr = i << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
+									//AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+									temp_addr = (i+PH_STEP) << 1;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
+									//AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+									RL_Allon_flag = false;
+									sync_buff[i] = 1;
+								}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+								{
+									temp_addr = i << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
+									AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+									orderFlag[i]=true;		
+									temp_addr = (i+PH_STEP) << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;									
+								}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+								{
+									;;
+
+								}
+							}							
+						}
+						if(detection_value & 0x2)
+						{
+							for(i = 0;i < PH_STEP;i++)
+							{
+								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+								{
+									
+									if(sync_buff[i])
+									{
+									}else
+									{
+										temp_addr = i << 1; 
+										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
+										//AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+										temp_addr = (i+PH_STEP) << 1;
+										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;	
+										RL_Allon_flag = false;
+									}
+								}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+								{
+
+									
+								}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+								{
+									temp_addr = i << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
+									
+									temp_addr = (i+PH_STEP) << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
+									AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+									orderFlag[i+PH_STEP]=true;										
+								}
+							}
+						}
+					}else
+					{
+						for(i = 0;i < PH_STEP;i++)
+						{
+							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 0)
+							{
+								temp_addr = i << 1; 
+								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
+								AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+								orderFlag[i]=true;
+								temp_addr = (i+PH_STEP) << 1;
+								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
+								AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+								orderFlag[i+PH_STEP]=true;								
+							}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 1)
+							{
+									temp_addr = i << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
+									AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+									orderFlag[i]=true;
+									temp_addr = (i+PH_STEP) << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;								
+							}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+i] == 2)
+							{
+									temp_addr = i << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
+									temp_addr = (i+PH_STEP) << 1; 
+									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
+									AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
+									orderFlag[i+PH_STEP]=true;									
+							}
+						}		
+					}
+					AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));	
 	#else
-					if(detection_value == 1)
-	#endif
-#endif
+				if(detection_value == 1)
 				{
 					RL_Allon_flag = true;
 					for(i = 0;i < Output_ChN_default;i++)
@@ -1042,17 +1345,29 @@ static void MODbus_CMD_New(void)
 					AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
 	#endif
 				}
+	#endif
+#endif
 			}
 				break;
 			case Mb_Dbuff_RL_Alloff_Addr:																					//relay all off
 			{
-#if SUPPORT_DETECTION
-	#if SUPPORT_DOUBLE_FIRE
-					if(detection_value == 0x3)
-	#else
-					if(detection_value == 1)
-	#endif
-#endif
+//#if SUPPORT_DETECTION
+//	#if SUPPORT_DOUBLE_FIRE
+//					if(detection_value != 0x3)
+//					{
+//						
+//					}
+//				{
+//					RL_Alloff_flag = true;
+//					for(i = 0;i < PH_STEP;i++)
+//					{
+//						
+//					}
+//				}
+//	#else
+//				if(detection_value == 1)
+	
+
 				{	
 					RL_Alloff_flag = true;
 					for(i = 0;i < Output_ChN_default;i++)
@@ -1072,7 +1387,10 @@ static void MODbus_CMD_New(void)
 					AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
 		#endif
 				}
+//	#endif
+//#endif
 		 }
+
 				break;
 			case Mb_Dbuff_LT_ST_Addr:																							//set input status
 			{
@@ -1096,36 +1414,105 @@ static void MODbus_CMD_New(void)
 					Eeprom_Rbuf[temp_addr] = data;
 					AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
 #endif
-				}else{
+				}else
+				{
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+					{
+						data &= (Shield_Vmax_Threshould_Disable);
+					}
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+					{
+						data &= (Shield_Vmin_Threshould_Disable);
+					}
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+					{
+						data &= (Shield_Imax_Threshould_Disable);
+					}
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+					{
+						data &= (Shield_Wmax_Threshould_Disable);
+					}
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+					{
+						data &= (Shield_Kwhmax_Threshould_Disable);
+					}
 #if SUPPORT_DETECTION
 	#if SUPPORT_DOUBLE_FIRE
-					if(detection_value == 0x3)
-	#else 
-					if(detection_value == 1)
-	#endif	
-#endif					
+					if(detection_value != 0x3)
 					{
-						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+						if(detection_value & 0x1)
 						{
-							data &= (Shield_Vmax_Threshould_Disable);
+							if(temp_addr < PH_STEP)
+							{
+								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] == 1)
+								{
+
+										AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
+										orderFlag[temp_addr]=true;
+										LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
+										temp_addr = temp_addr << 1;
+										temp_addr += ERom_CH1LT_ST_Addr;
+										Eeprom_Rbuf[temp_addr] = data;
+										AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
+								}
+							}	
 						}
-						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+						if(detection_value & 0x2)
 						{
-							data &= (Shield_Vmin_Threshould_Disable);
+							if(temp_addr >= PH_STEP)
+							{
+								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] == 2)
+								{
+									AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
+									orderFlag[temp_addr]=true;
+									LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
+									temp_addr = temp_addr << 1;
+									temp_addr += ERom_CH1LT_ST_Addr;
+									Eeprom_Rbuf[temp_addr] = data;
+									AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);												
+								}		
+							}
 						}
-						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+					}else
+					{
+						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] == 0)
 						{
-							data &= (Shield_Imax_Threshould_Disable);
-						}
-						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+							AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
+							orderFlag[temp_addr]=true;
+							LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
+							temp_addr = temp_addr << 1;
+							temp_addr += ERom_CH1LT_ST_Addr;
+							Eeprom_Rbuf[temp_addr] = data;
+							AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);								
+						}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] == 1)
 						{
-							data &= (Shield_Wmax_Threshould_Disable);
-						}
-						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
+							if(temp_addr < PH_STEP)
+							{
+								AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
+								orderFlag[temp_addr]=true;
+								LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
+								temp_addr = temp_addr << 1;
+								temp_addr += ERom_CH1LT_ST_Addr;
+								Eeprom_Rbuf[temp_addr] = data;
+								AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);								
+							}
+						}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] == 2)
 						{
-							data &= (Shield_Kwhmax_Threshould_Disable);
+							if(temp_addr >= PH_STEP)
+							{
+								AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
+								orderFlag[temp_addr]=true;
+								LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
+								temp_addr = temp_addr << 1;
+								temp_addr += ERom_CH1LT_ST_Addr;
+								Eeprom_Rbuf[temp_addr] = data;
+								AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);														
+							}
 						}
-						
+					}
+	#else 
+					if(detection_value == 1)
+					{
 						AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
 						orderFlag[temp_addr]=true;
 						LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
@@ -1134,6 +1521,8 @@ static void MODbus_CMD_New(void)
 						Eeprom_Rbuf[temp_addr] = data;
 						AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
 					}
+	#endif	
+#endif
 				}
 			}
 				break;
@@ -1275,6 +1664,24 @@ static void MODbus_CMD_New(void)
 				AT24CxxWriteOneByte(ERom_RL_ToffN_Addr,Eeprom_Rbuf[ERom_RL_ToffN_Addr]);
 			}
 				break;
+			case Mb_Dbuff_RL_SET_SINGLE_OUT_CH1 ... Mb_Dbuff_RL_SET_SINGLE_OUT_CH4:
+			{
+				temp_addr = base_addr - Mb_Dbuff_RL_SET_SINGLE_OUT_CH1;
+				uint8_t dat_ = data;
+#if SUPPORT_DOUBLE_FIRE
+			if(data < 3){
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] = data;
+				AT24CxxWriteOneByte(ERom_SINGLE_OUT_CH_Addr+temp_addr,dat_);
+			}
+#else
+			if(data <= 3){
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] = data;
+				AT24CxxWriteOneByte(ERom_SINGLE_OUT_CH_Addr+temp_addr,dat_);
+			}				
+				
+#endif
+			}
+			break;
 			case Mb_Dbuff_RL_Over_Ch1_Func ... Mb_Dbuff_RL_Over_Ch9_Func:					//threod over limit operation
 			{
 				temp_addr = base_addr - Mb_Dbuff_RL_Over_Ch1_Func;

truing_control/PDU-Triphasic_IO/USER/main.h

@@ -202,6 +202,11 @@
 #define Mb_Dbuff_RL_LackB_Addr				231						// add by liyi
 #define Mb_Dbuff_RL_LackC_Addr				232						// add by liyi
 
+#define Mb_Dbuff_RL_SET_SINGLE_OUT_CH1       233    //add by liyi
+#define Mb_Dbuff_RL_SET_SINGLE_OUT_CH2       234		//add by liyi
+#define Mb_Dbuff_RL_SET_SINGLE_OUT_CH3       235    //add by liyi
+#define Mb_Dbuff_RL_SET_SINGLE_OUT_CH4       236    //add by liyi
+
 #define Mb_Dbuff_RL_Over_Ch1_Func    	240
 #define Mb_Dbuff_RL_Over_Ch2_Func    	241
 #define Mb_Dbuff_RL_Over_Ch3_Func    	242
@@ -645,6 +650,17 @@
 #define AC3PPDU_RL_LackC_ByteN     1
 
 
+
+
+
+
+#define AC3PPDU_SINGLE_OUT_CH1											(AC3PPDU_Modbus_RegStAd+Mb_Dbuff_RL_SET_SINGLE_OUT_CH1)  //add by liyi
+#define AC3PPDU_SINGLE_OUT_CH2											(AC3PPDU_Modbus_RegStAd+Mb_Dbuff_RL_SET_SINGLE_OUT_CH2)  //add by liyi
+#define AC3PPDU_SINGLE_OUT_CH3											(AC3PPDU_Modbus_RegStAd+Mb_Dbuff_RL_SET_SINGLE_OUT_CH3)  //add by liyi
+#define AC3PPDU_SINGLE_OUT_CH4											(AC3PPDU_Modbus_RegStAd+Mb_Dbuff_RL_SET_SINGLE_OUT_CH4)  //add by liyi
+
+
+
 #define AC3PPDU_RL_Over_Ch1_Addr   (AC3PPDU_Modbus_RegStAd + Mb_Dbuff_RL_Over_Ch1_Func)				//add by liyi
 #define AC3PPDU_RL_Over_Ch1_ByteN     1
 
@@ -730,7 +746,7 @@
 
 //Eeprom?????????????????????
 
-#define RELAY_para_sum          400
+#define RELAY_para_sum          410
 #define ERom_RL_RegStAd         0000
 
 #define ERom_RL_Ch_N_addr       ERom_RL_RegStAd
@@ -1068,6 +1084,11 @@
 #define ERom_ALL_Over_Func_ByteN   	1														  // add by liyi
 
 
+#define ERom_SINGLE_OUT_CH_Addr     (ERom_RL_RegStAd + 400)
+#define ERom_SINGLE_OUT_CH_ByteN    (4)
+
+
+