三相整型，以及跳转bug

truing_control/PDU-Triphasic_IO/HARDWARE/IO/key_io.c

@@ -41,7 +41,7 @@ void key_io_init(void * value)
 	gpio_mode_set(KEY_IO_TEST, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, KEY_TEST);
 	
 	
-	//ConfigDetection();
+	ConfigDetection();
 }
 
 static void   ConfigDetection(void)

truing_control/PDU-Triphasic_IO/USER/board_cfg.h

@@ -4,32 +4,21 @@
 
 
 
-#define PRJ_3_P_4_LINE  1
-#define PRJ_3_P_3_LINE  0
+#define PRJ_3_P_4_LINE  0
+#define PRJ_3_P_3_LINE  1
  
 
 #if PRJ_3_P_3_LINE
-	#define SUPPORT_ZERO_LINE			0
-	#define SUPPORT_KEY_CTRL      1
-	#define SUPPORT_DETECTION     1
+	#define SUPPORT_ZERO_LINE				0
+	#define SUPPORT_KEY_CTRL      	1
+	#define SUPPORT_DETECTION     	1
+	#define SUPPORT_DETECT_REMENBER 1
 #elif PRJ_3_P_4_LINE
 	#define SUPPORT_ZERO_LINE			1
 	#define SUPPORT_KEY_CTRL      0
 	#define SUPPORT_DETECTION     0
-
 #endif
 
-
-
-
-
-
-
-
-
-
-
-
 #endif
 
 

truing_control/PDU-Triphasic_IO/USER/cfg.h

@@ -18,7 +18,7 @@
 #define PROGRAME_APP1_SIZE								(48*1024)													//App1 programe Max size
 
 
-#define VERSION                          		"V1.0.0.0"
+#define VERSION                          		"V1.0.0.20"
 
 #define MODBUS_HEAD                        	"GOWONE_UPGRADE"
 

truing_control/PDU-Triphasic_IO/USER/main.c

@@ -44,6 +44,7 @@ information_t infomation;
 uint32_t 			hlw8110_base[Output_ChN_default + 1] = {0}; //add by liyi
 uint8_t 			Wr_eeprom_cnt = 0;
 
+uint8_t 		read_ele_flag = 0;
 
 
 bool orderFlag[Output_ChN_default] ={0};
@@ -90,6 +91,17 @@ META_DATA_S meta_data 																	= {0};
 uint8_t write_kwh2Eeprom_flag 													= 0;
 
 
+#if SUPPORT_DETECT_REMENBER
+	uint8_t handle_status[Output_ChN_default] = {0};
+	uint8_t handle_detection[1] = {1};
+	#if SUPPORT_ZERO_LINE
+		uint8_t handle_status_N = 0;
+	#endif
+#endif
+
+
+
+
 extern float 										hlw8110_store[Output_ChN_default + 1];
 extern uint32_t 								Modbus_Wr_buff[Mb_Wcmd_Width][Mb_Wcmd_len];
 
@@ -491,9 +503,54 @@ static void key_io_control()
 	}
 }
 
+void switch_recode()
+{
+#if SUPPORT_DETECT_REMENBER
+	if(detection_value == 0)
+	{
+		if(handle_detection[0] == 1)
+		{
+			for(int i = 0; i < Output_ChN_default;i++)
+			{
+				handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
+				AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
+				orderFlag[i]=true;
+			}
+#if SUPPORT_ZERO_LINE
+			handle_status_N = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x1);
+#endif
+			handle_detection[0] = 0;
+		}
+	}else
+	{
+		if(handle_detection[0] == 0)
+		{
+			for(int i = 0; i < Output_ChN_default;i++)
+			{
+				uint32_t data = (AC3PPDU_RL_time[i + CH1_out].LT_state & (~0x40));
+				AC3PPDU_RL_time[i + CH1_out].LT_state  = (data & 0x40);
+				AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
+				orderFlag[i]=true;
+			}
+#if SUPPORT_ZERO_LINE
+		uint32_t data = (AC3PPDU_RL_N_time.LT_state & (~0x40));
+		AC3PPDU_RL_time[i + CH1_out].LT_state  = (data & 0x40);
+		AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
+			orderFlag_N = true;
+#endif
+			handle_detection[0] = 1;			
+		}
+	}
+#endif
+}
+
+
+
+
+
 int main(void)
 {
-	AC3PPDU_active_chn = Output_ChN_default;
+	
 	app_init(&meta_data);
 	InitSysTick();
 	InitLED();
@@ -508,6 +565,7 @@ int main(void)
 	eMBInit(MB_RTU, AC3PPDU_SlaveAddress, 0, 115200, MB_PAR_NONE);
 	eMBEnable();
 	key_io_init(NULL);
+	AC3PPDU_active_chn = Output_ChN_default;
 	for(int i = 1; i <= AC3PPDU_active_chn;i++)
 	{
 		hlw8110_init(i);
@@ -579,10 +637,29 @@ int main(void)
 #endif
 			for(int j = 0 ; j < Hlw8110_CS;j++)
 				read_Hlw8110(j,0);
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
+			
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
+			
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
+			
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] =	hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
+			AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
+			for(int i = 0;i < (Output_ChN_default + 1);i++)
+			{
+				Fault_state_process(i);
+			}	
 			normal_running_time+=2;
 			write_eep_count ++;
 		}
-		
+		switch_recode();
 		if(write_eep_count >= 120)			// 120 second recode
 		{
 			write_eep_count = 0;
@@ -596,26 +673,6 @@ int main(void)
 			}
 			AT24CxxWrite(ERom_TotalWh1_Addr,(Eeprom_Rbuf + ERom_TotalWh1_Addr),4*Output_ChN_default);
 		}
-		
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
-		
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
-		
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
-		
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] =	hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
-		AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
-		for(int i = 0;i < (Output_ChN_default + 1);i++)
-		{
-			Fault_state_process(i);
-		}
 		RL_Over_Func();
 		MODbus_CMD_New();
 	}
@@ -753,7 +810,9 @@ static void MODbus_CMD_New(void)
 					AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
 					orderFlag[i]=true;
 				}		
+#if SUPPORT_ZERO_LINE
 				orderFlag_N = true;
+#endif
 				AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
 				Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x41;
 				AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
@@ -772,7 +831,9 @@ static void MODbus_CMD_New(void)
 					AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
 					orderFlag[i]=true;
 				}
+#if SUPPORT_ZERO_LINE
 				orderFlag_N = true;
+#endif
 				AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
 				Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x80;
 				Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] & 0xfe;
@@ -795,7 +856,9 @@ static void MODbus_CMD_New(void)
 
 				if(temp_addr == 9) {					//Ch N
 					AC3PPDU_RL_N_time.LT_state = data;
+#if SUPPORT_ZERO_LINE
 					orderFlag_N = true;
+#endif
 				}else{
 
 					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
@@ -894,6 +957,7 @@ static void MODbus_CMD_New(void)
 				Eeprom_Rbuf[temp_addr] = data;
 				Eeprom_Rbuf[ERom_RL_TonN_Addr] = data;
 				
+				
 				AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
 				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr] = Eeprom_Rbuf[ERom_RL_TonN_Addr];
 				
@@ -1089,6 +1153,7 @@ static void MODbus_CMD_New(void)
 //		Wr_eeprom_cnt = 0;
 //	}
 //}
+static uint16_t count = 0;
 static void Fault_state_process(uint8_t ch_x)
 {
 	uint16_t i = 0;
@@ -1099,39 +1164,45 @@ static void Fault_state_process(uint8_t ch_x)
 	
 	if(ch_x == CH_in)
 	{
-		uint32_t sort_buff[3] = {0};
-		uint32_t Vmax = 0;
-		uint32_t Vmin = 0;
-		sort_buff[0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
-		sort_buff[1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
-		sort_buff[2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr];
-		Vmax = (sort_buff[0] >= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
-		Vmax = (Vmax >= sort_buff[2]) ? Vmax : sort_buff[2];
-		
-		Vmin = (sort_buff[0] <= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
-		Vmin = (Vmin <= sort_buff[2]) ? Vmin : sort_buff[2];
-		
-		if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
-		{
-			uint32_t v_mid = AC3PPDU_Lack_Voltage *2; 
-			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
-			{
-				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
-			}
-			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
+			uint32_t sort_buff[3] = {0};
+			uint32_t Vmax = 0;
+			uint32_t Vmin = 0;
+			sort_buff[0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
+			sort_buff[1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
+			sort_buff[2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr];
+			Vmax = (sort_buff[0] >= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
+			Vmax = (Vmax >= sort_buff[2]) ? Vmax : sort_buff[2];
+			
+			Vmin = (sort_buff[0] <= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
+			Vmin = (Vmin <= sort_buff[2]) ? Vmin : sort_buff[2];
+			
+			if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
 			{
-					AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
-			}
-			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
+				uint32_t v_mid = AC3PPDU_Lack_Voltage *2; 
+				count ++;
+				if(count == 4)
+				{
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
+					{
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
+					}
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
+					{
+							AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
+					}
+					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
+					{
+						AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] =1;
+					}
+					count = 0;
+				}
+			}else 
 			{
-				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] =1;
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
+				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
+				count = 0;
 			}
-		}else 
-		{
-			AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
-			AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
-			AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
-		}
 		
 		if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr]  & Shield_Vmax_Threshould_enable) > 0)
 		{