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@@ -29,6 +29,8 @@ enum
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enum{
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CTRL_3_3 = 8,
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+ CTRL_3_2,
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+
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};
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@@ -310,7 +312,6 @@ static int get_key(power_handle_t *h, uint8_t addr, board_key_t *key)
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{
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key->chs /= 2;
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}
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-
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return 0;
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}
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}
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@@ -1462,82 +1463,474 @@ static int board_read(power_handle_t *h, board_data_t *pbrd,uint8_t flag)
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pch = &pbrd->pch[i];
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pch->info.close_delay = ((tmp[j+1+index] << 16) + (tmp[j+0+index]));
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}
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+
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+ }
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+ }
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+ break;
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+
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+ case AC_MULTI_S_TYPE:
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+ case AC_MULTI_B_TYPE:
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+ case DC_OUT_TYPE:
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+ case DC_IN_TYPE:
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+ break;
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+ case TREE_AC_DUBL:
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+ {
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+ offset = POWER_AC3_OUT_INFO;
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+ r = read_reg(h, pbrd->addr, offset, tmp, 80);
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+ if (r < 0) {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", pbrd->addr, offset, offset, 80);
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+ break;
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+ }
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+ offset = POWER_AC3_OUT_INFO+40;
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+ uint16_t* ptmp=tmp+80;
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+ r = read_reg(h, pbrd->addr, offset, ptmp, 64);
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+ if (r < 0) {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", pbrd->addr, offset, offset, 64);
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+ break;
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+ }
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+ for (i=0; i<pbrd->chs; i++)
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+ {
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+ int index_2 = 0;
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+ uint8_t left = pbrd->pch[i].info.ph_id; //双火线左端
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+ uint8_t right = pbrd->pch[i].info.ph_val; //双火线右端
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+ pwr = &pbrd->pch[i].power[left];
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+ index_2 = i*16;
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+ pwr->voltage = ((tmp[1+index_2] << 16) + tmp[0+index_2])/10;
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+ pwr->current = ((tmp[3+index_2] << 16) + tmp[2+index_2])/10;
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+ pwr->power = ((tmp[5+index_2] << 16) + tmp[4+index_2])/10;
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+ pwr->freq = ((tmp[11+index_2] << 16) + tmp[10+index_2])/10;
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+ pwr->consump = ((tmp[13+index_2] << 16) + tmp[12+index_2])/10;
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+ pwr->factor = ((tmp[15+index_2] << 16) + tmp[14+index_2])/10;
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- /*
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- offset = POWER_AC3_THRESHOLD_VOL_MIN;
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- r = read_reg(h, pch->info.addr, offset, tmp, 18);
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- for (i=0; i<pbrd->chs; i++)
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+ pwr = &pbrd->pch[i].power[right];
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+ index_2 = i*16 + 16 * pbrd->chs;
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+
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+ pwr->voltage = ((tmp[1+index_2] << 16) + tmp[0+index_2])/10;
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+ pwr->current = ((tmp[3+index_2] << 16) + tmp[2+index_2])/10;
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+ pwr->power = ((tmp[5+index_2] << 16) + tmp[4+index_2])/10;
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+ pwr->freq = ((tmp[11+index_2] << 16) + tmp[10+index_2])/10;
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+ pwr->consump = ((tmp[13+index_2] << 16) + tmp[12+index_2])/10;
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+ pwr->factor = ((tmp[15+index_2] << 16) + tmp[14+index_2])/10;
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+ }
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+
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+ //获取相错误告警
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+ offset = POWER_AC3_OUT_ERROR;
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+ r = read_reg(h, pbrd->addr, offset, tmp, 18);
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+ if (r < 0) {
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+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", pbrd->addr, offset, offset, 18);
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+ break;
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+ }
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+ op_wanning_info info={0};
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+ for (i=0; i<pbrd->chs; i++)
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+ {
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+ uint8_t left = pbrd->pch[i].info.ph_id;
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+ uint8_t right = pbrd->pch[i].info.ph_val;
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+ int Index = i*2;
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+ switch(left)
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{
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-
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- if(h->prod->type==PDU_AC_I3O3) {
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- int Index = i * 3;
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- int ch_idx = pbrd->ch0-1+i/3;
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- pch = &pbrd->pch[ch_idx];
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- pch->thr.v_lower = ((tmp[Index+1] << 16) + (tmp[Index+0])) / 10;
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+ case 1:
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+ {
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+ old_l1_v_upper = pch->alarm.l1_v_upper;
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+ old_l1_v_lower = pch->alarm.l1_v_lower;
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+ old_l1_c_upper = pch->alarm.l1_c_upper;
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+ old_l1_p_upper = pch->alarm.l1_p_upper;
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+ old_l1_w_upper = pch->alarm.l1_w_upper;
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+ pch->alarm.l1_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l1_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l1_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l1_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l1_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ Index += (2 * pbrd->chs);
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+ switch(right)
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+ {
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+ case 2:
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+ {
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+
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+ old_l2_v_upper = pch->alarm.l2_v_upper;
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+ old_l2_v_lower = pch->alarm.l2_v_lower;
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+ old_l2_c_upper = pch->alarm.l2_c_upper;
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+ old_l2_p_upper = pch->alarm.l2_p_upper;
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+ old_l2_w_upper = pch->alarm.l2_w_upper;
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+ pch->alarm.l2_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l2_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l2_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l2_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l2_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ }
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+ break;
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+ case 3:
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+ {
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+ old_l3_v_upper = pch->alarm.l3_v_upper;
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+ old_l3_v_lower = pch->alarm.l3_v_lower;
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+ old_l3_c_upper = pch->alarm.l3_c_upper;
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+ old_l3_p_upper = pch->alarm.l3_p_upper;
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+ old_l3_w_upper = pch->alarm.l3_w_upper;
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+ pch->alarm.l3_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l3_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l3_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l3_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l3_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ }
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+ break;
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+ default:
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+ break;
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}
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- else {
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- pch = &pbrd->pch[i];
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- pch->thr.v_lower = ((tmp[i+1] << 16) + (tmp[i+0])) / 10;
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+ }
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+ break;
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+ case 2:
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+ {
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+ old_l2_v_upper = pch->alarm.l2_v_upper;
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+ old_l2_v_lower = pch->alarm.l2_v_lower;
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+ old_l2_c_upper = pch->alarm.l2_c_upper;
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+ old_l2_p_upper = pch->alarm.l2_p_upper;
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+ old_l2_w_upper = pch->alarm.l2_w_upper;
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+ pch->alarm.l2_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l2_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l2_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l2_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l2_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ Index += (2 * pbrd->chs);
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+ switch(right)
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+ {
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+ case 1:
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+ {
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+ old_l1_v_upper = pch->alarm.l1_v_upper;
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+ old_l1_v_lower = pch->alarm.l1_v_lower;
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+ old_l1_c_upper = pch->alarm.l1_c_upper;
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+ old_l1_p_upper = pch->alarm.l1_p_upper;
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+ old_l1_w_upper = pch->alarm.l1_w_upper;
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+ pch->alarm.l1_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l1_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l1_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l1_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l1_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ }
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+ break;
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+ case 3:
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+ {
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+ old_l3_v_upper = pch->alarm.l3_v_upper;
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+ old_l3_v_lower = pch->alarm.l3_v_lower;
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+ old_l3_c_upper = pch->alarm.l3_c_upper;
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+ old_l3_p_upper = pch->alarm.l3_p_upper;
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+ old_l3_w_upper = pch->alarm.l3_w_upper;
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+ pch->alarm.l3_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l3_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l3_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l3_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l3_w_upper = (tmp[Index] & BIT(4))?1:0;
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+
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+ }
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+ break;
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+ default:
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+ break;
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}
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- }
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- offset = POWER_AC3_THRESHOLD_CUR_MAX;
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- r = read_reg(h, pch->info.addr, offset, tmp, 18);
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+ }
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+ break;
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+ case 3:
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+ {
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+ old_l3_v_upper = pch->alarm.l3_v_upper;
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+ old_l3_v_lower = pch->alarm.l3_v_lower;
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+ old_l3_c_upper = pch->alarm.l3_c_upper;
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+ old_l3_p_upper = pch->alarm.l3_p_upper;
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+ old_l3_w_upper = pch->alarm.l3_w_upper;
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+ pch->alarm.l3_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l3_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l3_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l3_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l3_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ Index += (2 * pbrd->chs);
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+ switch(right)
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+ {
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+ case 1:
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+ {
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+ old_l1_v_upper = pch->alarm.l1_v_upper;
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+ old_l1_v_lower = pch->alarm.l1_v_lower;
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+ old_l1_c_upper = pch->alarm.l1_c_upper;
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+ old_l1_p_upper = pch->alarm.l1_p_upper;
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+ old_l1_w_upper = pch->alarm.l1_w_upper;
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+ pch->alarm.l1_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l1_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l1_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l1_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l1_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ }
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+ break;
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+ case 2:
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+ {
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+ old_l2_v_upper = pch->alarm.l2_v_upper;
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+ old_l2_v_lower = pch->alarm.l2_v_lower;
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+ old_l2_c_upper = pch->alarm.l2_c_upper;
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+ old_l2_p_upper = pch->alarm.l2_p_upper;
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+ old_l2_w_upper = pch->alarm.l2_w_upper;
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+ pch->alarm.l2_v_upper = (tmp[Index] & BIT(0))?1:0;
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+ pch->alarm.l2_v_lower = (tmp[Index] & BIT(1))?1:0;
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+ pch->alarm.l2_c_upper = (tmp[Index] & BIT(2))?1:0;
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+ pch->alarm.l2_p_upper = (tmp[Index] & BIT(3))?1:0;
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+ pch->alarm.l2_w_upper = (tmp[Index] & BIT(4))?1:0;
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+ }
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+ break;
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+ default:
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+ break;
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+ }
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+ break;
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+ default:
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+ break;
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+ }
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+ }
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+ info.id = i;
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+ info.wanning_type = ALARM_TYPE_POWER;
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+ info.power_type = h->prod->type;
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+ if(!old_l1_v_upper && pch->alarm.l1_v_upper)
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+ {
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+ info.ph_info = 1;
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+ info.ele_info = STR_POWER_ID_VOL;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!old_l1_v_lower && pch->alarm.l1_v_lower)
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+ {
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+ info.ph_info = 1;
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+ info.ele_info = STR_POWER_ID_VOL;
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+ info.max_min = STR_POWER_ID_MIN;
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+ info.over = STR_POWER_ID_LOW;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!old_l1_c_upper && pch->alarm.l1_c_upper)
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+ {
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+ info.ph_info = 1;
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+ info.ele_info = STR_POWER_ID_CUR;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!old_l1_p_upper && pch->alarm.l1_p_upper)
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+ {
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+ info.ph_info = 1;
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+ info.ele_info = STR_POWER_ID_POWER;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!old_l1_w_upper && pch->alarm.l1_w_upper)
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+ {
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+ info.ph_info = 1;
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+ info.ele_info = STR_POWER_ID_CONSUMER;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+
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+ if(!old_l2_v_upper && pch->alarm.l2_v_upper)
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+ {
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+ info.ph_info = 2;
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+ info.ele_info = STR_POWER_ID_VOL;
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+ info.max_min = STR_POWER_ID_MAXS;
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+ info.over = STR_POWER_ID_OVER;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!old_l2_v_lower && pch->alarm.l2_v_lower)
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+ {
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+ info.ph_info = 2;
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+ info.ele_info = STR_POWER_ID_VOL;
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+ info.max_min = STR_POWER_ID_MIN;
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+ info.over = STR_POWER_ID_LOW;
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+ wanning_operation(&info,pch->info.name);
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+ }
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+
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+ if(!old_l2_c_upper && pch->alarm.l2_c_upper)
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+ {
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+ info.ph_info = 2;
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+ info.ele_info = STR_POWER_ID_CUR;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l2_p_upper && pch->alarm.l2_p_upper)
|
|
|
+ {
|
|
|
+ info.ph_info = 2;
|
|
|
+ info.ele_info = STR_POWER_ID_POWER;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l2_w_upper && pch->alarm.l2_w_upper)
|
|
|
+ {
|
|
|
+ info.ph_info = 2;
|
|
|
+ info.ele_info = STR_POWER_ID_CONSUMER;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l3_v_upper && pch->alarm.l3_v_upper)
|
|
|
+ {
|
|
|
+ info.ph_info = 3;
|
|
|
+ info.ele_info = STR_POWER_ID_VOL;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l3_v_lower && pch->alarm.l3_v_lower)
|
|
|
+ {
|
|
|
+ info.ph_info = 3;
|
|
|
+ info.ele_info = STR_POWER_ID_VOL;
|
|
|
+ info.max_min = STR_POWER_ID_MIN;
|
|
|
+ info.over = STR_POWER_ID_LOW;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l3_c_upper && pch->alarm.l3_c_upper)
|
|
|
+ {
|
|
|
+ info.ph_info = 3;
|
|
|
+ info.ele_info = STR_POWER_ID_CUR;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l3_p_upper && pch->alarm.l3_p_upper)
|
|
|
+ {
|
|
|
+ info.ph_info = 3;
|
|
|
+ info.ele_info = STR_POWER_ID_POWER;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+
|
|
|
+ if(!old_l3_w_upper && pch->alarm.l3_w_upper)
|
|
|
+ {
|
|
|
+ info.ph_info = 3;
|
|
|
+ info.ele_info = STR_POWER_ID_CONSUMER;
|
|
|
+ info.max_min = STR_POWER_ID_MAXS;
|
|
|
+ info.over = STR_POWER_ID_OVER;
|
|
|
+ wanning_operation(&info,pch->info.name);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+
|
|
|
+ ///
|
|
|
+ offset = POWER_AC3_ALARM_MISSING_PH;
|
|
|
+ r = read_reg(h, pbrd->addr, offset, tmp, 6);
|
|
|
+ if (r < 0) {
|
|
|
+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", pbrd->addr, offset, offset, pbrd->chs);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ uint8_t v;
|
|
|
+ v = 0;
|
|
|
+ for(i = 0; i < 3; i++) {
|
|
|
+ if(tmp[i * 2]>0) {
|
|
|
+ v |= 1<<i;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ pbrd->ph_loss = v;
|
|
|
+
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ uint8_t old_lose_l1 = pch->alarm.ph_1_lose;
|
|
|
+ uint8_t old_lose_l2 = pch->alarm.ph_2_lose;
|
|
|
+ uint8_t old_lose_l3 = pch->alarm.ph_3_lose;
|
|
|
+
|
|
|
+ pch->alarm.ph_1_lose = (pbrd->ph_loss & 1) ? 1: 0;
|
|
|
+ pch->alarm.ph_2_lose = (pbrd->ph_loss & 2) ? 1: 0;
|
|
|
+ pch->alarm.ph_3_lose = (pbrd->ph_loss & 4) ? 1: 0;
|
|
|
+
|
|
|
+ if(!old_lose_l1 && pch->alarm.ph_1_lose)
|
|
|
+ {
|
|
|
+ lose_operation( pch->info.name,pch->info.ch,1);
|
|
|
+ }
|
|
|
+ if(!old_lose_l2 && pch->alarm.ph_2_lose)
|
|
|
+ {
|
|
|
+ lose_operation( pch->info.name,pch->info.ch,2);
|
|
|
+ }
|
|
|
+ if(!old_lose_l3 && pch->alarm.ph_3_lose)
|
|
|
+ {
|
|
|
+ lose_operation( pch->info.name,pch->info.ch,3);
|
|
|
+ }
|
|
|
+ if(flag)
|
|
|
+ {
|
|
|
+ offset = POWER_AC3_BREAKER_INFO;
|
|
|
+ r = read_reg(h, pch->info.addr, offset, tmp, 1);
|
|
|
+ if (r < 0) {
|
|
|
+ LOGE("read_reg failed, addr:%d reg:0x%04x/%d cnt:%d\n", pbrd->addr, offset, offset, pbrd->chs);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ pbrd->brk[0].samp.sw = (tmp[0]&BIT(0))?1:0;
|
|
|
+ pbrd->brk[1].samp.sw = (tmp[0]&BIT(1))?1:0;
|
|
|
+ //pbrd->brk[0].samp.time = tm;
|
|
|
+
|
|
|
+ // read v max //all read 80 register
|
|
|
+ offset = POWER_AC3_THRESHOLD_VOL_MAX;
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+ r = read_reg(h, pch->info.addr, offset, tmp, 80);
|
|
|
+ int j = 0;
|
|
|
for (i=0; i<pbrd->chs; i++)
|
|
|
{
|
|
|
-
|
|
|
- if(h->prod->type==PDU_AC_I3O3) {
|
|
|
- int Index = i * 3;
|
|
|
- int ch_idx = pbrd->ch0-1+i/3;
|
|
|
- pch = &pbrd->pch[ch_idx];
|
|
|
- pch->thr.c_upper = ((tmp[Index+1] << 16) + (tmp[Index+0])) / 10;
|
|
|
- }
|
|
|
- else {
|
|
|
- pch = &pbrd->pch[i];
|
|
|
- pch->thr.c_upper = ((tmp[i+1] << 16) + (tmp[i+0])) / 10;
|
|
|
- }
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->thr.v_upper = ((tmp[j+1+index] << 16) + (tmp[j+0+index])) / 10;
|
|
|
+ }
|
|
|
+ j+=16;
|
|
|
+ for (i=0; i<pbrd->chs; i++)
|
|
|
+ {
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->thr.v_lower = ((tmp[j+1+index] << 16) + (tmp[j+0+index])) / 10;
|
|
|
}
|
|
|
- offset = POWER_AC3_THRESHOLD_PWR_MAX;
|
|
|
- r = read_reg(h, pch->info.addr, offset, tmp, 18);
|
|
|
+ j+=16;
|
|
|
for (i=0; i<pbrd->chs; i++)
|
|
|
{
|
|
|
-
|
|
|
- if(h->prod->type==PDU_AC_I3O3) {
|
|
|
- int Index = i * 3;
|
|
|
- int ch_idx = pbrd->ch0-1+i/3;
|
|
|
- pch = &pbrd->pch[ch_idx];
|
|
|
- pch->thr.p_upper = ((tmp[Index+1] << 16) + (tmp[Index+0])) / 10;
|
|
|
- }
|
|
|
- else {
|
|
|
- pch = &pbrd->pch[i];
|
|
|
- pch->thr.p_upper = ((tmp[i+1] << 16) + (tmp[i+0])) / 10;
|
|
|
- }
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->thr.c_upper = ((tmp[j+1+index] << 16) + (tmp[j+0+index])) / 10;
|
|
|
+ }
|
|
|
+ j+=16;
|
|
|
+ for (i=0; i<pbrd->chs; i++)
|
|
|
+ {
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->thr.p_upper = ((tmp[j+1+index] << 16) + (tmp[j+0+index])) / 10;
|
|
|
+ }
|
|
|
+
|
|
|
+ j+=16;
|
|
|
+ for (i=0; i<pbrd->chs; i++)
|
|
|
+ {
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->thr.w_upper = ((tmp[j+1+index] << 16) + (tmp[j+0+index])) / 10;
|
|
|
+ }
|
|
|
+ //get delay
|
|
|
+ offset = POWER_AC3_OPEN_DELAY_TIME;
|
|
|
+ r = read_reg(h, pch->info.addr, offset, tmp, 32);
|
|
|
+ j=0;
|
|
|
+ for (i=0; i<pbrd->chs; i++)
|
|
|
+ {
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->info.open_delay = ((tmp[j+1+index] << 16) + (tmp[j+0+index])) ;
|
|
|
}
|
|
|
- offset = POWER_AC3_THRESHOLD_PWRCON_MAX;
|
|
|
- r = read_reg(h, pch->info.addr, offset, tmp, 18);
|
|
|
+ j+=16;
|
|
|
for (i=0; i<pbrd->chs; i++)
|
|
|
{
|
|
|
-
|
|
|
- if(h->prod->type==PDU_AC_I3O3) {
|
|
|
- int Index = i * 3;
|
|
|
- int ch_idx = pbrd->ch0-1+i/3;
|
|
|
- pch = &pbrd->pch[ch_idx];
|
|
|
- pch->thr.w_upper = ((tmp[Index+1] << 16) + (tmp[Index+0])) / 10;
|
|
|
- }
|
|
|
- else {
|
|
|
- pch = &pbrd->pch[i];
|
|
|
- pch->thr.w_upper = ((tmp[i+1] << 16) + (tmp[i+0])) / 10;
|
|
|
- }
|
|
|
- } */
|
|
|
- }
|
|
|
- }
|
|
|
- break;
|
|
|
-
|
|
|
- case AC_MULTI_S_TYPE:
|
|
|
- case AC_MULTI_B_TYPE:
|
|
|
- case DC_OUT_TYPE:
|
|
|
- case DC_IN_TYPE:
|
|
|
+ int index = i*2;
|
|
|
+ pch = &pbrd->pch[i];
|
|
|
+ pch->info.close_delay = ((tmp[j+1+index] << 16) + (tmp[j+0+index]));
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
default:
|
|
|
- r = -1;
|
|
|
+ r = -1;
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
@@ -1809,7 +2202,7 @@ int power_scan(void)
|
|
|
if(pkey->type == 1 || pkey->type == 2)
|
|
|
{
|
|
|
pbrd->fn = board_fn_ac;
|
|
|
- }else if(pkey->type == CTRL_3_3)
|
|
|
+ }else if(pkey->type == CTRL_3_3 || CTRL_3_2 == pkey->type)
|
|
|
{
|
|
|
pbrd->fn = board_fn_ac3;
|
|
|
}else
|
|
|
@@ -1842,14 +2235,14 @@ int power_scan(void)
|
|
|
}else if(h->prod->type == PDU_AC_I3O2)
|
|
|
{
|
|
|
pch[j].info.ch = ch_idx+j;
|
|
|
- pch[j].info.ph_id = p->phase_seq_2.phase_left[ch_idx] -'0';
|
|
|
- pch[j].info.ph_val = p->phase_seq_2.phase_right[ch_idx] -'0'; //作为双火线的右边相
|
|
|
+ pch[j].info.ph_id = p->phase_seq_2.phase_left[ch_idx-1] -'0';
|
|
|
+ pch[j].info.ph_val = p->phase_seq_2.phase_right[ch_idx-1] -'0'; //作为双火线的右边相
|
|
|
}
|
|
|
else {
|
|
|
pch[j].info.ch = ch_idx+j; //序号从1开始, 发给控制板需从0开始
|
|
|
if(h->prod->type==PDU_AC_I3O1 || h->prod->type == PDU_AC_I3O1_H)
|
|
|
{
|
|
|
- pch[j].info.ph_id = p->phase_seq.phase_seq[ch_idx] -'0';
|
|
|
+ pch[j].info.ph_id = p->phase_seq.phase_seq[ch_idx-1] -'0';
|
|
|
} else
|
|
|
pch[j].info.ph_id = 0;
|
|
|
}
|
|
|
@@ -2009,9 +2402,9 @@ int power_set_ch_sw_n(power_ch_t *pch)
|
|
|
//获取状态。
|
|
|
r = read_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
|
|
|
- mask = ~(1 << (pch->info.ch-1));
|
|
|
+ mask = ~(1 << (pch->info.sch));
|
|
|
tmp[0] &= mask;
|
|
|
- tmp[0] |= (st << (pch->info.ch-1));
|
|
|
+ tmp[0] |= (st << (pch->info.sch));
|
|
|
r = write_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
}
|
|
|
break;
|
|
|
@@ -2028,10 +2421,19 @@ int power_set_ch_sw_n(power_ch_t *pch)
|
|
|
}
|
|
|
|
|
|
tmp[0] = st;
|
|
|
- offset = reg+pch->info.ch-1;
|
|
|
+ offset = reg+pch->info.sch;
|
|
|
r = write_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
}
|
|
|
break;
|
|
|
+ case TREE_AC_DUBL:
|
|
|
+ {
|
|
|
+ uint16_t reg;
|
|
|
+ reg = POWER_AC3_CH_OUT_ENABLE;
|
|
|
+ tmp[0] = st;
|
|
|
+ offset = reg+pch->info.sch;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
lock_off(h->lck);
|
|
|
}
|
|
|
@@ -2097,10 +2499,18 @@ int power_set_ch_sw(uint8_t ch, uint8_t on)
|
|
|
}
|
|
|
|
|
|
tmp[0] = st;
|
|
|
- offset = reg + +pch->info.sch;
|
|
|
+ offset = reg+pch->info.sch;
|
|
|
r = write_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
}
|
|
|
break;
|
|
|
+ case TREE_AC_DUBL:
|
|
|
+ {
|
|
|
+ uint16_t reg;
|
|
|
+ reg = POWER_AC3_CH_OUT_ENABLE+pch->info.sch;
|
|
|
+ tmp[0] = st;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
lock_off(h->lck);
|
|
|
|
|
|
@@ -2526,11 +2936,57 @@ int power_set_threshold(power_ch_t *pch)
|
|
|
offset +=1;
|
|
|
r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
offset +=1;
|
|
|
- r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
-
|
|
|
-
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
}
|
|
|
break;
|
|
|
+ case TREE_AC_DUBL:
|
|
|
+ {
|
|
|
+ uint16_t data_temp[4];
|
|
|
+ uint32_t value;
|
|
|
+ uint8_t chs = h->pbrd[pch->info.addr]->chs;
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_VOL_MAX+pch->info.sch;
|
|
|
+ value = pch->thr.v_upper * 10;
|
|
|
+ data_temp[0] = value & 0XFFFF;
|
|
|
+ data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+ offset+=chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_VOL_MIN+pch->info.sch;
|
|
|
+ value = pch->thr.v_lower * 10;
|
|
|
+ data_temp[0] = value & 0XFFFF;
|
|
|
+ data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
+
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+ offset+=chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_CUR_MAX+pch->info.sch;
|
|
|
+ value = pch->thr.c_upper * 10;
|
|
|
+ data_temp[0] = value & 0XFFFF;
|
|
|
+ data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+ offset+=chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_PWR_MAX+pch->info.sch;
|
|
|
+ value = pch->thr.p_upper*10;
|
|
|
+ data_temp[0] = value & 0XFFFF;
|
|
|
+ data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+ offset+=chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+
|
|
|
+ offset = POWER_AC3_THRESHOLD_PWRCON_MAX+pch->info.sch;
|
|
|
+ value = pch->thr.w_upper*10;
|
|
|
+ data_temp[0] = value & 0XFFFF;
|
|
|
+ data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+ offset+=chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
+ }
|
|
|
+ break;
|
|
|
|
|
|
default:
|
|
|
r = -1;
|
|
|
@@ -2585,6 +3041,23 @@ int power_set_open_delay(power_ch_t *pch)
|
|
|
if(r) break;
|
|
|
}
|
|
|
break;
|
|
|
+ case TREE_AC_DUBL:
|
|
|
+ {
|
|
|
+ uint32_t time=pch->info.open_delay;
|
|
|
+ uint8_t chs = h->pbrd[pch->info.addr]->chs;
|
|
|
+
|
|
|
+
|
|
|
+ tmp[0] = time & 0xffff;
|
|
|
+ tmp[1] = (time >> 16) & 0xffff;
|
|
|
+ offset = POWER_AC3_OPEN_DELAY_TIME+pch->info.sch;
|
|
|
+ r = write_reg(h, pch->info.addr, offset+0, tmp, 2);
|
|
|
+ if(r) break;
|
|
|
+
|
|
|
+ offset+= chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, tmp, 2);
|
|
|
+ if(r) break;
|
|
|
+ }
|
|
|
+ break;
|
|
|
|
|
|
case AC_MULTI_S_TYPE:
|
|
|
case AC_MULTI_B_TYPE:
|
|
|
@@ -2597,6 +3070,41 @@ int power_set_open_delay(power_ch_t *pch)
|
|
|
|
|
|
return r;
|
|
|
}
|
|
|
+int power_set_ph_cfg(power_ch_t *pch)
|
|
|
+{
|
|
|
+ int r=-1;
|
|
|
+ uint16_t tmp[2],reg,offset;
|
|
|
+ power_handle_t *h=&pwrHandle;
|
|
|
+ paras_data_t *p=paras_get();
|
|
|
+ lock_on(h->lck);
|
|
|
+ switch(h->prod->type)
|
|
|
+ {
|
|
|
+ case PDU_AC_I3O1:
|
|
|
+ {
|
|
|
+ h->pbrd[pch->info.addr]->pch[pch->info.sch].info.ph_id = pch->info.ph_id; //ph
|
|
|
+ p->phase_seq.phase_seq[pch->info.ch-1] = pch->info.ph_id+'0';
|
|
|
+ paras_save();
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case PDU_AC_I3O2:
|
|
|
+ {
|
|
|
+ h->pbrd[pch->info.addr]->pch[pch->info.sch].info.ph_id = pch->info.ph_id; //left ph
|
|
|
+ h->pbrd[pch->info.addr]->pch[pch->info.sch].info.ph_val = pch->info.ph_val; //right ph
|
|
|
+ p->phase_seq_2.phase_left[pch->info.ch-1] = pch->info.ph_id+'0';
|
|
|
+ p->phase_seq_2.phase_right[pch->info.ch-1] = pch->info.ph_val+'0';
|
|
|
+ paras_save();
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ lock_off(h->lck);
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
|
|
|
int power_set_clear_consumer(power_ch_t *pch)
|
|
|
{
|
|
|
@@ -2624,10 +3132,26 @@ int power_set_clear_consumer(power_ch_t *pch)
|
|
|
case TREE_AC_TYPE:
|
|
|
{
|
|
|
uint32_t val = 1;
|
|
|
- offset = POWER_AC3_RESET_CONSUMP + pch->info.sch;
|
|
|
+ offset = POWER_AC3_RESET_CONSUMP;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, (uint16_t*)&val, 1);
|
|
|
+ offset+=1;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, (uint16_t*)&val, 1);
|
|
|
+ offset+=1;
|
|
|
r = write_reg(h, pch->info.addr, offset, (uint16_t*)&val, 1);
|
|
|
}
|
|
|
- break;
|
|
|
+ break;
|
|
|
+ case TREE_AC_DUBL:
|
|
|
+ {
|
|
|
+ uint32_t val = 1;
|
|
|
+ offset = POWER_AC3_RESET_CONSUMP;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, (uint16_t*)&val, 1);
|
|
|
+ uint8_t chs = h->pbrd[pch->info.addr]->chs;
|
|
|
+ offset += chs;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, (uint16_t*)&val, 1);
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
}
|
|
|
lock_off(h->lck);
|
|
|
|