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@@ -19,7 +19,7 @@ typedef struct {
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lock_t lck;
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}power_handle_t;
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-static power_handle_t pwrHandle={0};
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+power_handle_t pwrHandle={0};
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static void memswap(uint8_t *buf, int len)
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{
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@@ -33,26 +33,26 @@ static void memswap(uint8_t *buf, int len)
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}
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static int read_reg(power_handle_t *h, uint8_t addr, uint16_t reg, uint16_t *data, int cnt)
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{
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- return mb_read(h->mb, addr, reg, data, cnt, 100);
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+ return mb_read(h->mb, addr, reg, data, cnt, 800);
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}
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static int write_reg(power_handle_t *h, uint8_t addr, uint16_t reg, uint16_t *data, int cnt)
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{
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return mb_write(h->mb, addr, reg, data, cnt);
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}
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////////////////////////////////////////////////////////////////////
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-static int get_info(power_handle_t *h, int addr, ch_info_t *info)
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+static int get_info(power_handle_t *h, uint8_t addr, board_key_t *info)
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{
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int i,r=-1;
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uint16_t tmp=0;
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- r = read_reg(h->mb, addr, POWER_AC_GET_INFO, &tmp, 1);
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+ r = read_reg(h, addr, POWER_DC_INFO, &tmp, 1);
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if(r==0) {
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info->type = (tmp>>8)&0xFF;
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info->chs = tmp&0xFF;
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return 0;
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}
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-
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- r = read_reg(h->mb, addr, POWER_DC_INFO, &tmp, 1);
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+
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+ r = read_reg(h, addr, POWER_AC_GET_INFO, &tmp, 1);
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if(r==0) {
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info->type = (tmp>>8)&0xFF;
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info->chs = tmp&0xFF;
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@@ -73,78 +73,69 @@ static int get_ch(power_handle_t *h, int ch, power_ch_t *pch)
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////////////////////////////////////////////////////////////////
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-static int set_open_delay(power_handle_t *h, int type, int addr, uint16_t delay)
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-{
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- switch(type) {
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- case AC_SINGLE_S_TYPE:
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- case AC_SINGLE_B_TYPE:
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- {
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-
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- }
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- break;
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- case DCPDU_TYPE:
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- {
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-
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- }
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- break;
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-
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- case TREE_AC_TYPE:
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- {
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-
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- }
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- break;
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-
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- case AC_MULTI_S_TYPE:
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- case AC_MULTI_B_TYPE:
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- case DC_OUT_TYPE:
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- case DC_IN_TYPE:
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- default:
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- return -1;
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- }
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-}
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-static int set_close_delay(power_handle_t *h, int type, int addr, uint16_t delay)
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+static int set_kb_value(power_handle_t *h, int type, int addr, kb_val_t *kv)
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{
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switch(type) {
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case AC_SINGLE_S_TYPE:
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- case AC_SINGLE_B_TYPE:
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- {
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-
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- }
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- break;
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-
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- case DCPDU_TYPE:
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{
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-
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- }
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- break;
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- case TREE_AC_TYPE:
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- {
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-
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+ /*
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+ unsigned int offset = 0;
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+ unsigned int rval = 0 ;
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+ unsigned short data_temp[8] = {0};
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+ if(chn>=8)
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+ return -1;
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+ offset = _SWITCH_AC_SINGLE_S_KB_VAL+chn*8;
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+ data_temp[0] = (unsigned short)_kb_val->voltage_k;
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+ data_temp[1] = (unsigned short)((_kb_val->voltage_k-data_temp[0])*1000);
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+ data_temp[2] = (unsigned short)_kb_val->voltage_b;
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+ data_temp[3] = (unsigned short)((_kb_val->voltage_b-data_temp[2])*1000);
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+ data_temp[4] = (unsigned short)_kb_val->current_k;
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+ data_temp[5] = (unsigned short)((_kb_val->current_k-data_temp[4])*1000);
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+ data_temp[6] = (unsigned short)_kb_val->current_b;
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+ data_temp[7] = (unsigned short)((_kb_val->current_b-data_temp[6])*1000);
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+ g_modbus_write_x_reg(manger,saddr,offset,8,data_temp);
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+ */
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}
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break;
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- case AC_MULTI_S_TYPE:
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- case AC_MULTI_B_TYPE:
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- case DC_OUT_TYPE:
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- case DC_IN_TYPE:
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- default:
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- return -1;
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- }
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-}
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-static int set_kb_value(power_handle_t *h, int type, int addr, kb_val_t *kv)
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-{
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- switch(type) {
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- case AC_SINGLE_S_TYPE:
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case AC_SINGLE_B_TYPE:
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{
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-
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+ /*
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+ unsigned int offset = 0;
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+ unsigned int rval = 0 ;
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+ unsigned short data_temp[8] = {0};
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+ if(pch->info.>=4)
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+ return -1;
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+ offset = _SWITCH_AC_SINGLE_B_KB_VAL+chn*8;
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+ data_temp[0] = (unsigned short)_kb_val->voltage_k;
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+ data_temp[1] = (unsigned short)((_kb_val->voltage_k-data_temp[0])*1000);
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+ data_temp[2] = (unsigned short)_kb_val->voltage_b;
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+ data_temp[3] = (unsigned short)((_kb_val->voltage_b-data_temp[2])*1000);
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+ data_temp[4] = (unsigned short)_kb_val->current_k;
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+ data_temp[5] = (unsigned short)((_kb_val->current_k-data_temp[4])*1000);
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+ data_temp[6] = (unsigned short)_kb_val->current_b;
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+ data_temp[7] = (unsigned short)((_kb_val->current_b-data_temp[6])*1000);
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+ g_modbus_write_x_reg(manger,saddr,offset,8,data_temp);
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+ */
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}
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break;
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case DCPDU_TYPE:
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- {
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-
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+ {/*
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+ unsigned short offset = 0;
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+ unsigned short data_temp[8] = {0};
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+ offset = _SWITCH_DC_KB_VAL;
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+ data_temp[0] = (unsigned short)_kb_val->voltage_k;
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+ data_temp[1] = (unsigned short)((_kb_val->voltage_k-data_temp[0])*1000);
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+ data_temp[2] = (unsigned short)_kb_val->voltage_b;
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+ data_temp[3] = (unsigned short)((_kb_val->voltage_b-data_temp[2])*1000);
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+ data_temp[4] = (unsigned short)_kb_val->current_k;
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+ data_temp[5] = (unsigned short)((_kb_val->current_k-data_temp[4])*1000);
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+ data_temp[6] = (unsigned short)_kb_val->current_b;
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+ data_temp[7] = (unsigned short)((_kb_val->current_b-data_temp[6])*1000);
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+ g_modbus_write_x_reg(manger,saddr,offset,8, data_temp);
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+ */
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}
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break;
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@@ -193,137 +184,6 @@ static int reset_consump(power_handle_t *h, int type, int addr)
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return -1;
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}
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}
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-static int get_switch(power_handle_t *h, power_ch_t *pch)
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-{
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- int r=-1;
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-
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- switch(pch->info.type) {
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- case AC_SINGLE_S_TYPE:
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- {
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-
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- }
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- break;
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-
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- case DCPDU_TYPE:
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- {
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-
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- }
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- break;
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-
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- case TREE_AC_TYPE:
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- {
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-
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- }
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- break;
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-
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- case AC_MULTI_S_TYPE:
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- case AC_MULTI_B_TYPE:
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- case DC_OUT_TYPE:
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- case DC_IN_TYPE:
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- default:
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- return -1;
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- }
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-
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- return r;
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-}
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-static int set_switch(power_handle_t *h, power_ch_t *pch)
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-{
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- int r=-1;
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- uint16_t offset,tmp[2]={0},st=pch->power[0].status;
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-
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- if (pch->thr.v_upper.en == 1)
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- st |= ENABLE_AC3_V_UP;
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- if (pch->thr.v_lower.en == 1)
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- st |= ENABLE_AC3_V_DOWN;
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- if (pch->thr.c_upper.en == 1)
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- st |= ENABLE_AC3_C_UP;
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- if (pch->thr.p_upper.en == 1)
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- st |= ENABLE_AC3_P_UP;
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- if (pch->thr.w_upper.en == 1)
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- st |= ENABLE_AC3_W_UP;
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-
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- switch(pch->info.type) {
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- case AC_SINGLE_S_TYPE:
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- case AC_SINGLE_B_TYPE:
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- {
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- offset = POWER_AC_CH_STAT_L+pch->info.ch;
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- r = write_reg(h, pch->info.addr, offset, &st, 1);
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- }
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- break;
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-
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- case AC_MULTI_S_TYPE:
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- case AC_MULTI_B_TYPE:
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- case DC_OUT_TYPE:
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- case DC_IN_TYPE:
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- {
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- }
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- break;
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-
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- case DCPDU_TYPE:
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- {
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- uint16_t mask;
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- offset = POWER_DC_STAT_INFO+pch->info.ch;
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-
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- mask = ~(1 << pch->info.ch);
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- tmp[0] &= mask;
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- tmp[0] |= (st << pch->info.ch);
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- write_reg(h, pch->info.addr, offset, tmp, 2);
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- }
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- break;
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-
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- case TREE_AC_TYPE:
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- {
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- uint16_t reg;
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- uint8_t pwr_type=paras_get()->prod.pwr_type;
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- if(pwr_type==PDU_AC_I3O3 || pwr_type==PDU_AC_I3O1) {
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- reg = POWER_AC3_OUT_ENABLE;
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- }
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- else {
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- reg = POWER_AC3_CH_OUT_ENABLE;
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- }
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-
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- tmp[0] = st;
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- offset = reg + +pch->info.ch;
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- r = write_reg(h, pch->info.addr, offset, tmp, 2);
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- }
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- break;
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-
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- default:
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- return -1;
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- }
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-
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- return r;
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-}
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-static int set_threshold(power_handle_t *h, power_ch_t *pch)
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-{
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- int r=-1;
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-
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- switch(pch->info.type) {
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- case AC_SINGLE_S_TYPE:
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- case AC_SINGLE_B_TYPE:
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- {
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-
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- }
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- break;
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-
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- case DCPDU_TYPE:
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- {
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-
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- }
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- break;
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-
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- case TREE_AC_TYPE:
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- {
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-
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- }
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- break;
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-
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- default:
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- return -1;
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- }
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-
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- return r;
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-}
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//////////////////////////////////////////////////////////////////
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@@ -550,14 +410,20 @@ static int get_board(power_handle_t *h, uint8_t addr, board_data_t *pbrd)
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static void *power_thread(void *arg)
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{
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+ int r;
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+ uint16_t tmp[2]={0};
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+
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thread_handle_t *th=(thread_handle_t*)arg;
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power_handle_t *h=(power_handle_t*)th->arg;;
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+ power_scan(BRD_MAX);
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while(th->quit==0) {
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+ //r = read_reg(h, 1, POWER_DC_INFO, tmp, 2);
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+ //LOGD("____ read reg %d, %d\n", POWER_DC_INFO, r);
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//power_get();
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//
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-
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+ sleep(1);
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}
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pthread_exit(NULL);
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}
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@@ -622,16 +488,16 @@ int power_get_ch(int ch, power_ch_t *pch)
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}
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-int power_get_board(int addr, board_data_t *pb)
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+int power_get_board(board_data_t *pb)
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{
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power_handle_t *h=&pwrHandle;
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lock_d_hold(h->lck);
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- if(!pb || !h->all.pch || !h->all.cnt || !h->all.pbrd[addr]) {
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+ if(!pb || !h->all.pch || !h->all.cnt || !h->all.pbrd[pb->addr]) {
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lock_d_release(h->lck);
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return -1;
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}
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- *pb = *h->all.pbrd[addr];
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+ *pb = *h->all.pbrd[pb->addr];
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lock_d_release(h->lck);
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return 0;
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@@ -663,6 +529,7 @@ int power_scan(int max_addr)
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lock_d_hold(h->lck);
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for(i=1; i<=max_addr; i++) {
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r = get_info(h, i, &info);
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+ LOGD("___ power_scan, addr: %d, result: %d\n", i, r);
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if(r==0) {
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h->all.pbrd[i] = (board_data_t*)calloc(1, sizeof(board_data_t));
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if(h->all.pbrd[i]) {
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@@ -824,102 +691,110 @@ int power_reset(int addr)
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return -1;
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}
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-
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return 0;
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}
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-int power_set_sw(int ch, int on)
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+int power_set_ch(power_ch_t *pch)
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{
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int r;
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power_ch_t pc;
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- uint16_t offset=0,data_temp[2];
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power_handle_t *h=&pwrHandle;
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+ uint16_t offset,tmp[2]={0},st=pch->power[0].status;
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- r = get_ch(h, ch, &pc);
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- if(r) {
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- return -1;
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- }
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+ if (pch->thr.v_upper.en == 1)
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+ st |= ENABLE_AC3_V_UP;
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+ if (pch->thr.v_lower.en == 1)
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+ st |= ENABLE_AC3_V_DOWN;
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+ if (pch->thr.c_upper.en == 1)
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+ st |= ENABLE_AC3_C_UP;
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+ if (pch->thr.p_upper.en == 1)
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+ st |= ENABLE_AC3_P_UP;
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+ if (pch->thr.w_upper.en == 1)
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+ st |= ENABLE_AC3_W_UP;
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- switch(pc.info.type) {
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+ switch(pch->info.type) {
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case AC_SINGLE_S_TYPE:
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case AC_SINGLE_B_TYPE:
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{
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- offset = POWER_AC_CH_STAT_L + ch;
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- data_temp[0] = on; data_temp[1] = 0;
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+ offset = POWER_AC_CH_STAT_L + pch->info.ch;
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+ tmp[0] = pch->power[0].status; tmp[1] = 0;
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}
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break;
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case DCPDU_TYPE:
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{
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- offset = POWER_DC_SET_STAT + ch;
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- data_temp[0] = on; data_temp[1] = 0;
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+ uint16_t mask;
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+ offset = POWER_DC_STAT_INFO+pch->info.ch;
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+
|
|
|
+ mask = ~(1 << pch->info.ch);
|
|
|
+ tmp[0] &= mask;
|
|
|
+ tmp[0] |= (st << pch->info.ch);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case TREE_AC_TYPE:
|
|
|
{
|
|
|
- if(ch<0) {//##################################
|
|
|
- //offset = POWER_AC3_OUT_INFO + ch;
|
|
|
- //data_temp[0] = on; data_temp[1] = 0;
|
|
|
+ uint16_t reg;
|
|
|
+ uint8_t pwr_type=paras_get()->prod.pwr_type;
|
|
|
+ if(pwr_type==PDU_AC_I3O3 || pwr_type==PDU_AC_I3O1) {
|
|
|
+ reg = POWER_AC3_OUT_ENABLE;
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ reg = POWER_AC3_CH_OUT_ENABLE;
|
|
|
}
|
|
|
|
|
|
+ tmp[0] = st;
|
|
|
+ offset = reg + +pch->info.ch;
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
default:
|
|
|
return -1;
|
|
|
}
|
|
|
- data_temp[0] = on; data_temp[1] = 0;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pc.info.addr, offset, tmp, 2);
|
|
|
|
|
|
return r;
|
|
|
}
|
|
|
|
|
|
-int power_set_alarm(int ch, alarm_t *alarm)
|
|
|
+int power_set_alarm(power_ch_t *pch)
|
|
|
{
|
|
|
int r=-1;
|
|
|
- power_ch_t pc;
|
|
|
uint16_t offset = 0;
|
|
|
uint16_t nStatus = 0;
|
|
|
power_handle_t *h=&pwrHandle;
|
|
|
|
|
|
- r = get_ch(h, ch, &pc);
|
|
|
- if(r) {
|
|
|
- return -1;
|
|
|
- }
|
|
|
-
|
|
|
- switch(pc.info.type) {
|
|
|
+ switch(pch->info.type) {
|
|
|
case AC_SINGLE_S_TYPE:
|
|
|
case AC_SINGLE_B_TYPE:
|
|
|
{
|
|
|
- if (ch == -1) {
|
|
|
+ if (pch->info.ch<0) {
|
|
|
offset = POWER_AC_ALARM_CTRL_TOTAL;
|
|
|
}
|
|
|
else {
|
|
|
- offset = POWER_AC_ALARM_CTRL + ch;
|
|
|
+ offset = POWER_AC_ALARM_CTRL + pch->info.ch;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case DCPDU_TYPE:
|
|
|
{
|
|
|
- if (ch == -1) {
|
|
|
+ if (pch->info.ch<0) {
|
|
|
offset = POWER_DC_ALARM_CTRL_TOTAL;
|
|
|
}
|
|
|
else {
|
|
|
- offset = POWER_DC_ALARM_CTRL + ch;
|
|
|
+ offset = POWER_DC_ALARM_CTRL + pch->info.ch;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case TREE_AC_TYPE:
|
|
|
{
|
|
|
- if (ch == -1) {
|
|
|
+ if (pch->info.ch<0) {
|
|
|
offset = POWER_AC3_ALARM_CTRL_TOTAL;
|
|
|
}
|
|
|
else {
|
|
|
- offset = POWER_AC3_ALARM_CTRL + ch;
|
|
|
+ offset = POWER_AC3_ALARM_CTRL + pch->info.ch;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
@@ -928,30 +803,24 @@ int power_set_alarm(int ch, alarm_t *alarm)
|
|
|
return -1;
|
|
|
}
|
|
|
|
|
|
- if(pc.thr.v_upper.act==1) nStatus |= BIT(1);
|
|
|
- if(pc.thr.v_lower.act==1) nStatus |= BIT(2);
|
|
|
- if(pc.thr.c_upper.act==1) nStatus |= BIT(0);
|
|
|
- if(pc.thr.p_upper.act==1) nStatus |= BIT(3);
|
|
|
- if(pc.thr.w_upper.act==1) nStatus |= BIT(4);
|
|
|
- r = write_reg(h, pc.info.addr, offset, &nStatus, 1);
|
|
|
+ if(pch->thr.v_upper.act==1) nStatus |= BIT(1);
|
|
|
+ if(pch->thr.v_lower.act==1) nStatus |= BIT(2);
|
|
|
+ if(pch->thr.c_upper.act==1) nStatus |= BIT(0);
|
|
|
+ if(pch->thr.p_upper.act==1) nStatus |= BIT(3);
|
|
|
+ if(pch->thr.w_upper.act==1) nStatus |= BIT(4);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, &nStatus, 1);
|
|
|
|
|
|
return r;
|
|
|
}
|
|
|
|
|
|
|
|
|
-int power_set_thr(int ch, thr_t *thr)
|
|
|
+int power_set_threshold(power_ch_t *pch)
|
|
|
{
|
|
|
int r=-1;
|
|
|
- power_ch_t pc;
|
|
|
uint16_t offset;
|
|
|
power_handle_t *h=&pwrHandle;
|
|
|
|
|
|
- r = get_ch(h, ch, &pc);
|
|
|
- if(r) {
|
|
|
- return -1;
|
|
|
- }
|
|
|
-
|
|
|
- switch(pc.info.type) {
|
|
|
+ switch(pch->info.type) {
|
|
|
case AC_SINGLE_S_TYPE:
|
|
|
case AC_SINGLE_B_TYPE:
|
|
|
{
|
|
|
@@ -960,15 +829,15 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
uint16_t data_buf[16] = {0};
|
|
|
|
|
|
//电压上限
|
|
|
- data_temp = (thr->v_upper.val*1000);
|
|
|
+ data_temp = (pch->thr.v_upper.val*1000);
|
|
|
data_buf[0] = data_temp;
|
|
|
data_buf[1] = data_temp>>16;
|
|
|
//电压下限
|
|
|
- data_temp = (thr->v_upper.val*1000);
|
|
|
+ data_temp = (pch->thr.v_upper.val*1000);
|
|
|
data_buf[2] = data_temp;
|
|
|
data_buf[3] = data_temp>>16;
|
|
|
//电流上限
|
|
|
- data_temp = (thr->v_upper.val*1000);
|
|
|
+ data_temp = (pch->thr.v_upper.val*1000);
|
|
|
data_buf[4] = data_temp;
|
|
|
data_buf[5] = data_temp>>16;
|
|
|
//电流下限
|
|
|
@@ -977,7 +846,7 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
data_buf[7] = data_temp>>16;
|
|
|
|
|
|
//功率上限
|
|
|
- data_temp = (thr->v_upper.val*1000);
|
|
|
+ data_temp = (pch->thr.v_upper.val*1000);
|
|
|
data_buf[8] = data_temp;
|
|
|
data_buf[9] = data_temp>>16;
|
|
|
//功率下限
|
|
|
@@ -986,7 +855,7 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
data_buf[11] = data_temp>>16;
|
|
|
|
|
|
//电能上限
|
|
|
- data_temp = (thr->v_upper.val*1000);
|
|
|
+ data_temp = (pch->thr.v_upper.val*1000);
|
|
|
data_buf[12] = data_temp;
|
|
|
data_buf[13] = data_temp>>16;
|
|
|
//电能下限
|
|
|
@@ -994,14 +863,14 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
data_buf[14] = data_temp;
|
|
|
data_buf[15] = data_temp>>16;
|
|
|
|
|
|
- if(ch<0) {
|
|
|
+ if(pch->info.ch<0) {
|
|
|
offset = POWER_AC_TOTAL_THRESHOLD;
|
|
|
}
|
|
|
else {
|
|
|
- offset = POWER_AC_THRESHOLD_L+ch*16;
|
|
|
+ offset = POWER_AC_THRESHOLD_L+pch->info.ch*16;
|
|
|
}
|
|
|
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_buf, 16);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_buf, 16);
|
|
|
//power_set_alarm();
|
|
|
}
|
|
|
break;
|
|
|
@@ -1011,35 +880,35 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
uint16_t data_temp[4];
|
|
|
uint32_t value;
|
|
|
|
|
|
- offset = (ch<0)?POWER_DC_THRESHOLD_TOTAL_VOL_MAX:POWER_DC_THRESHOLD_VOL_MAX;
|
|
|
- value = thr->v_upper.val * 1000;
|
|
|
+ offset = (pch->info.ch<0)?POWER_DC_THRESHOLD_TOTAL_VOL_MAX:POWER_DC_THRESHOLD_VOL_MAX;
|
|
|
+ value = pch->thr.v_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
- offset = (ch<0)?POWER_DC_THRESHOLD_TOTAL_VOL_MIN:POWER_DC_THRESHOLD_VOL_MIN;
|
|
|
- value = thr->v_lower.val * 1000;
|
|
|
+ offset = (pch->info.ch<0)?POWER_DC_THRESHOLD_TOTAL_VOL_MIN:POWER_DC_THRESHOLD_VOL_MIN;
|
|
|
+ value = pch->thr.v_lower.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
- offset = (ch<0)?POWER_DC_THRESHOLD_TOTAL_CUR_MAX:POWER_DC_THRESHOLD_CUR_MAX;
|
|
|
- value = thr->c_upper.val * 1000;
|
|
|
+ offset = (pch->info.ch<0)?POWER_DC_THRESHOLD_TOTAL_CUR_MAX:POWER_DC_THRESHOLD_CUR_MAX;
|
|
|
+ value = pch->thr.c_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
- offset = (ch<0)?POWER_DC_THRESHOLD_TOTAL_PWR_MAX:POWER_DC_THRESHOLD_POWER_MAX;
|
|
|
- value = thr->p_upper.val * 1000;
|
|
|
+ offset = (pch->info.ch<0)?POWER_DC_THRESHOLD_TOTAL_PWR_MAX:POWER_DC_THRESHOLD_POWER_MAX;
|
|
|
+ value = pch->thr.p_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
- offset = (ch<0)?POWER_DC_THRESHOLD_TOTAL_PWRCON_MAX:POWER_DC_THRESHOLD_POWERCON_MAX;
|
|
|
- value = thr->w_upper.val * 1000;
|
|
|
+ offset = (pch->info.ch<0)?POWER_DC_THRESHOLD_TOTAL_PWRCON_MAX:POWER_DC_THRESHOLD_POWERCON_MAX;
|
|
|
+ value = pch->thr.w_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
//power_set_alarm();
|
|
|
}
|
|
|
@@ -1050,63 +919,63 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
uint16_t data_temp[4];
|
|
|
uint32_t value;
|
|
|
|
|
|
- if(ch<0) {
|
|
|
+ if(pch->info.ch<0) {
|
|
|
offset = POWER_AC3_THRESHOLD_IN;
|
|
|
- value = thr->v_upper.val * 1000;
|
|
|
+ value = pch->thr.v_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
- value = thr->v_upper.val * 1000;
|
|
|
+ value = pch->thr.v_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset+1, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset+1, data_temp, 2);
|
|
|
|
|
|
- value = thr->c_upper.val * 1000;
|
|
|
+ value = pch->thr.c_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset+2, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset+2, data_temp, 2);
|
|
|
|
|
|
- value = thr->p_upper.val * 1000;
|
|
|
+ value = pch->thr.p_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset+3, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset+3, data_temp, 2);
|
|
|
|
|
|
- value = thr->w_upper.val * 1000;
|
|
|
+ value = pch->thr.w_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset+4, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset+4, data_temp, 2);
|
|
|
}
|
|
|
else {
|
|
|
offset = POWER_AC3_THRESHOLD_VOL_MAX;
|
|
|
- value = thr->v_upper.val * 1000;
|
|
|
+ value = pch->thr.v_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
offset = POWER_AC3_THRESHOLD_VOL_MIN;
|
|
|
- value = thr->v_lower.val * 1000;
|
|
|
+ value = pch->thr.v_lower.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
offset = POWER_AC3_THRESHOLD_CUR_MAX;
|
|
|
- value = thr->c_upper.val * 1000;
|
|
|
+ value = pch->thr.c_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
offset = POWER_AC3_THRESHOLD_PWR_MAX;
|
|
|
- value = thr->p_upper.val * 1000;
|
|
|
+ value = pch->thr.p_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
|
|
|
offset = POWER_AC3_THRESHOLD_VOL_MAX;
|
|
|
- value = thr->w_upper.val * 1000;
|
|
|
+ value = pch->thr.w_upper.val * 1000;
|
|
|
data_temp[0] = value & 0XFFFF;
|
|
|
data_temp[1] = (value >> 16) & 0xFFFF;
|
|
|
- r = write_reg(h, pc.info.addr, offset, data_temp, 2);
|
|
|
+ r = write_reg(h, pch->info.addr, offset, data_temp, 2);
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
@@ -1116,7 +985,82 @@ int power_set_thr(int ch, thr_t *thr)
|
|
|
}
|
|
|
|
|
|
|
|
|
+int power_set_start_delay(power_ch_t *pch)
|
|
|
+{
|
|
|
+ int r=-1;
|
|
|
+ uint16_t reg,offset;
|
|
|
+ power_handle_t *h=&pwrHandle;
|
|
|
+
|
|
|
+ switch(pch->info.type) {
|
|
|
+ case AC_SINGLE_S_TYPE:
|
|
|
+ case AC_SINGLE_B_TYPE:
|
|
|
+ {
|
|
|
+ reg = POWER_AC_START_DELAY_TIME_L;
|
|
|
+ }
|
|
|
+ break;
|
|
|
|
|
|
+ case DCPDU_TYPE:
|
|
|
+ {
|
|
|
+ reg = POWER_DC_SET_START_DELAY;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case TREE_AC_TYPE:
|
|
|
+ {
|
|
|
+ reg = POWER_AC3_START_DELAY_TIME;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case AC_MULTI_S_TYPE:
|
|
|
+ case AC_MULTI_B_TYPE:
|
|
|
+ case DC_OUT_TYPE:
|
|
|
+ case DC_IN_TYPE:
|
|
|
+ default:
|
|
|
+ return -1;
|
|
|
+ }
|
|
|
+ offset = reg+pch->info.ch;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, &pch->info.start_delay, 1);
|
|
|
+
|
|
|
+ return r;
|
|
|
+}
|
|
|
+int power_set_stop_delay(power_ch_t *pch)
|
|
|
+{
|
|
|
+ int r=-1;
|
|
|
+ uint16_t reg,offset;
|
|
|
+ power_handle_t *h=&pwrHandle;
|
|
|
+
|
|
|
+ switch(pch->info.type) {
|
|
|
+ case AC_SINGLE_S_TYPE:
|
|
|
+ case AC_SINGLE_B_TYPE:
|
|
|
+ {
|
|
|
+ reg = POWER_AC_STOP_DELAY_TIME_L;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case DCPDU_TYPE:
|
|
|
+ {
|
|
|
+ reg = POWER_DC_SET_STOP_DELAY;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case TREE_AC_TYPE:
|
|
|
+ {
|
|
|
+ reg = POWER_AC3_STOP_DELAY_TIME;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case AC_MULTI_S_TYPE:
|
|
|
+ case AC_MULTI_B_TYPE:
|
|
|
+ case DC_OUT_TYPE:
|
|
|
+ case DC_IN_TYPE:
|
|
|
+ default:
|
|
|
+ return -1;
|
|
|
+ }
|
|
|
+ offset = reg+pch->info.ch;
|
|
|
+ r = write_reg(h, pch->info.addr, offset, &pch->info.start_delay, 1);
|
|
|
+
|
|
|
+ return r;
|
|
|
+}
|
|
|
|
|
|
|
|
|
|