/********************************************************************************************************* * Module : common * Abstract : defined data structure! * Version : 1.0.0 * Author : Leopul(COPYRIGHT 2025 ~ 2027 Leopul. All rights reserved.) * Complete : 2025-02-16 * Content : None * Note : None *********************************************************************************************************/ #ifndef _COMMON_H_ #define _COMMON_H_ #include "stdint.h" #include "board_cfg.h" #define START_R_REGISTER 4000 #define DEVICE_ID_LEN 1 #define ELE_DATA 4011 #define ELE_DATA_LEN (12 * RelaySlaveChaNum) #define RELAY_STATE 4209 #define RELAY_STATE_LEN (RelaySlaveChaNum) #define CHANNEL_ALL_CONSUMER 4250 #define CHANNEL_ALL_CONSUMER_LEN (2 * RelaySlaveChaNum) #define DETECTION 4310 #define DETECTION_LEN 1 #define INFOMATION (4360) #define OPEN_DELAY (4500) #define OPEN_DELAY_LEN (RelaySlaveChaNum) #define CLOSE_DELAY (4518) #define CLOSE_DELAY_LEN (RelaySlaveChaNum) #define SET_STATE (4586) #define SET_STATE_LEN (RelaySlaveChaNum) #define VALUE_THR (4629) #define VALUE_THR_LEN (RelaySlaveChaNum*2*8) #define CHANNEL_FUNC (5100) #define CHANNEL_FUNC_LEN (RelaySlaveChaNum) #define CLEAR_CONSUMER (5120) #define CLEAR_CONSUMER_LEN (RelaySlaveChaNum) #define CLEAR_CONSUMER_ALL (5128) #define SET_PT_KV (5129) #define SET_PT_KV_LEN (2) #define SET_PT_KI (5131) #define SET_PT_KI_LEN (2) #define TOTAL_THR (5200) #define TOTAL_THR_LEN (16) #define TOTAL_CHANNEL_FUNC (5250) #define BREAKE_UPGRATE (5260) #define START_R_LENTH (250) #define START_RW_REGISTER (START_R_REGISTER + START_R_LENTH) #define START_RW_LENTH (350) #define START_W_REGISTER (START_RW_REGISTER+START_RW_LENTH) #define START_W_LENTH (100) //#define #define MAX_CHANNEL 9 #define MAX_INPUT_CAHNNEL 3 #define VERSION_LENTH 6 #define DATA_LENTH 16 #define VOLTAGE_MAX (1 << 0) #define VOLTAGE_MIN (1 << 1) #define CURRENT_MAX (1 << 2) #define POWER_MAX (1 << 3) #define CONSUMER_MAX (1 << 4) #define FREQ_MAX (1 << 5) #define FREQ_MIN (1 << 6) #define VOLTAGE_MAX_EN VOLTAGE_MAX #define VOLTAGE_MIN_EN VOLTAGE_MIN #define CURRENT_MAX_EN CURRENT_MAX #define POWER_MAX_EN POWER_MAX #define CONSUMER_MAX_EN CONSUMER_MAX #define FREQ_MAX_EN FREQ_MAX #define FREQ_MIN_EN FREQ_MIN #define VOL_MAX_OVER_FUNC VOLTAGE_MAX #define VOL_MIN_OVER_FUNC VOLTAGE_MIN #define CUR_MAX_OVER_FUNC CURRENT_MAX #define POW_MAX_OVER_FUNC POWER_MAX #define CON_MAX_OVER_FUNC CONSUMER_MAX #define FREQ_MAX_OVER_FUNC FREQ_MAX #define FREQ_MIN_OVER_FUNC FREQ_MIN #define VOLTAGE_MAX_DIS_EN (~(VOLTAGE_MAX_EN)) #define VOLTAGE_MIN_DIS_EN (~(VOLTAGE_MIN_EN)) #define CURRENT_MAX_DIS_EN (~(CURRENT_MAX_EN)) #define POWER_MAX_DIS_EN (~(POWER_MAX_EN)) #define CONSUMER_MAX_DIS_EN (~(CONSUMER_MAX_EN)) #define FREQ_MAX_DIS_EN (~(FREQ_MAX_EN)) #define FREQ_MIN_DIS_EN (~(FREQ_MIN_EN)) #define IS_VOLTAGE_MAX_EN(reg) ((reg) & VOLTAGE_MAX_EN) #define IS_VOLTAGE_MIN_EN(reg) ((reg) & VOLTAGE_MIN_EN) #define IS_CURRENT_MAX_EN(reg) ((reg) & CURRENT_MAX_EN) #define IS_POWER_MAX_EN(reg) ((reg) & POWER_MAX_EN) #define IS_CONSUMER_MAX_EN(reg) ((reg) & CONSUMER_MAX_EN) #define IS_FREQ_MAX ((reg) & FREQ_MAX_EN) #define IS_FREQ_MIN ((reg) & FREQ_MIN_EN) #define SET_VOLTAGE_MAX_EN(reg) ((reg) |= VOLTAGE_MAX_EN) #define SET_VOLTAGE_MIN_EN(reg) ((reg) |= VOLTAGE_MIN_EN) #define SET_CURRENT_MAX_EN(reg) ((reg) |= CURRENT_MAX_EN) #define SET_POWER_MAX_EN(reg) ((reg) |= POWER_MAX_EN) #define SET_CONSUMER_MAX_EN(reg) ((reg) |= CONSUMER_MAX_EN) #define SET_FREQ_MAX_EN(reg) ((reg) |= FREQ_MAX_EN) #define SET_FREQ_MIN_EN(reg) ((reg) |= FREQ_MIN_EN) #define UNSET_VOLTAGE_MAX_EN(reg) ((reg) &= VOLTAGE_MAX_DIS_EN) #define UNSET_VOLTAGE_MIN_EN(reg) ((reg) &= VOLTAGE_MIN_DIS_EN) #define UNSET_CURRENT_MAX_EN(reg) ((reg) &= CURRENT_MAX_DIS_EN) #define UNSET_POWER_MAX_EN(reg) ((reg) &= POWER_MAX_DIS_EN) #define UNSET_CONSUMER_MAX_EN(reg) ((reg) &= CONSUMER_MAX_DIS_EN) #define UNSET_FREQ_MAX_EN(reg) ((reg) &= FREQ_MAX_DIS_EN) #define UNSET_FREQ_MIN_EN(reg) ((reg) &= FREQ_MIN_DIS_EN) #define SET_WANNING_VOLTAGE_MAX(reg) ((reg) |= VOLTAGE_MAX) #define SET_WANNING_VOLTAGE_MIN(reg) ((reg) |= VOLTAGE_MIN) #define SET_WANNING_CURRENT_MAX(reg) ((reg) |= CURRENT_MAX) #define SET_WANNING_POWER_MAX(reg) ((reg) |= POWER_MAX) #define SET_WANNING_CONSUMER_MAX(reg) ((reg) |= CONSUMER_MAX) #define SET_WANNING_FREQ_MAX(reg) ((reg) |= FREQ_MAX) #define SET_WANNING_FREQ_MIN(reg) ((reg) |= FREQ_MIN) #define UNSET_WANNING_VOLTAGE_MAX(reg) ((reg) &= (~VOLTAGE_MAX)) #define UNSET_WANNING_VOLTAGE_MIN(reg) ((reg) &= (~VOLTAGE_MIN)) #define UNSET_WANNING_CURRENT_MAX(reg) ((reg) &= (~CURRENT_MAX)) #define UNSET_WANNING_POWER_MAX(reg) ((reg) &= (~POWER_MAX)) #define UNSET_WANNING_CONSUMER_MAX(reg) ((reg) &= (~CONSUMER_MAX)) #define UNSET_WANNING_FREQ_MAX(reg) ((reg) &= (~FREQ_MAX)) #define UNSET_WANNING_FREQ_MIN(reg) ((reg) &= (~FREQ_MIN)) #define IS_OVERFUNC_VOLTAGE_MAX(reg) ((reg) & VOL_MAX_OVER_FUNC) #define IS_OVERFUNC_VOLTAGE_MIN(reg) ((reg) & VOL_MIN_OVER_FUNC) #define IS_OVERFUNC_CURRENT_MAX(reg) ((reg) & CUR_MAX_OVER_FUNC) #define IS_OVERFUNC_POWER_MAX(reg) ((reg) & POW_MAX_OVER_FUNC) #define IS_OVERFUNC_CONSUMER_MAX(reg) ((reg) & CON_MAX_OVER_FUNC) #define IS_OVERFUNC_FREQ_MAX(reg) ((reg) & FREQ_MAX_OVER_FUNC) #define IS_OVERFUNC_FREQ_MIN(reg) ((reg) & FREQ_MIN_OVER_FUNC) // EEPROM #define EEPROM_RELAY_STARTUS_ADDR (0) #define EEPROM_RELAY_BYTES (2) #define EEPROM_RELAY_COUNT_MAX (64) /* 2 page */ #define EEPROM_DELAY_ADDR (64) #define EEPROM_DELAY_BYTES (2) #define EEPROM_DELAY_COUNT_MAX (64) /* 2 page */ #define EEPROM_THRESHOLD_INPUT_ADDR (128) #define EEPROM_THRESHOLD_INPUT_BYTES (4) #define EEPROM_THRESHOLD_INPUT_MAX (64) /* 2 page */ #define EEPROM_THRESHOLD_OUTPUT_ADDR (192) #define EEPROM_THRESHOLD_OUTPUT_BYTES (4) #define EEPROM_THRESHOLD_OUTPUT_MAX (256) /* 8 page */ #define EEPROM_INPUT_OVER_FUNC_ADDR (448) #define EEPROM_INPUT_OVER_FUNC_BYTES (2) #define EEPROM_INPUT_OVER_FUNC_MAX (32) /* 1 page */ #define EEPROM_OUTPUT_OVER_FUNC_ADDR (480) #define EEPROM_OUTPUT_OVER_FUNC_BYTES (2) #define EEPROM_OUTPUT_OVER_FUNC_MAX (32) /* 1 page */ #define EEPROM_DEVICES_ADDR (0) //device signal #define EEPROM_DEVICES_LENTH (2) #define EEPROM_STATUS_ADDR (64) // one page #define EEPROM_STATUS_LENTH (16*2) #define EEPROM_OTHER_ADDR (128) #define EEPROM_OTHER_LENTH (32*30) // 30 page #define EEPROM_CHANNEL_PHASE (2048) #define EEPROM_CHANNEL_LENTH (9) //#define EEPROM_CHN_CTRL (2080) //#define EEPROM_CHN_CTRL_LENTH (32) //one page #define CONSUM_PAGE (64) #define MAX_ROW (40) #define EEPROM_CONSUMER_ADDR (3072) #define EEPROM_CONSUMER_ADDR_LEN (CONSUM_PAGE*MAX_ROW) #define EEPROM_K_V_ADDR (6144) #define EEPROM_K_V_LEN (4) #define EEPROM_K_I_ADDR (6176) #define EEPROM_K_I_LEN (4) #define THRESHOLD_IN 0 #define THRESHOLD_OUT 1 #define ELE_INPUT 0 #define ELE_OUTPUT 1 #define AC3PPDU_Lack_Voltage (30000) #define Default_Consum_Max (4000000000) #define Default_Voltage_Max (1000000000) #define Default_Current_Max (1000000000) #define Default_Power_Max (1000000000) #define THRESHOULD_JUDGMENT (50) /* relay controller */ #define RL_STATUS (1 << 0) #define RL_COUNTER_END_FLAG (1 << 1) #define RL_COUNTER_BEGIN_FLAG (1 << 2) #define RL_ORDER_FLAG (1 << 3) #define RL_ON_FLAG (1 << 4) #define RL_OFF_FLAG (1 << 5) #define RL_ON_DELAY_FLAG (1 << 6) #define RL_OFF_DELAY_FLAG (1 << 7) #define GET_RL_STATUS(reg) (reg & (RL_STATUS)) #define IS_RL_ORDER_FLAG_EN(reg) (reg & RL_ORDER_FLAG) #define IS_RL_COUNTER_END_FLAG_EN(reg) (reg & RL_COUNTER_END_FLAG) #define IS_RL_COUNTER_BEGINE_FLAG_EN(reg) (reg & RL_COUNTER_BEGIN_FLAG) #define IS_RL_ON_FLAG_EN(reg) (reg & RL_ON_FLAG) #define IS_RL_OFF_FLAG_EN(reg) (reg & RL_OFF_FLAG) #define IS_RL_ON_DELAY_FLAG_EN(reg) (reg & RL_ON_DELAY_FLAG) #define IS_RL_OFF_DELAY_FLAG_EN(reg) (reg & RL_OFF_DELAY_FLAG) #define SET_RL_STATUS(reg,value) ((reg) = ((value) ? ((reg) | 1) : ((reg) & (~1)))) #define SET_RL_ORDER_FLAG(reg) (reg |= RL_ORDER_FLAG) #define SET_RL_COUNTER_END_FLAG(reg) (reg |= RL_COUNTER_END_FLAG) #define SET_RL_COUNTER_BEGIN_FLAG(reg) (reg |= RL_COUNTER_BEGIN_FLAG ) #define SET_RL_ON_FLAG(reg) (reg |= RL_ON_FLAG) #define SET_RL_OFF_FLAG(reg) (reg |= RL_OFF_FLAG) #define SET_RL_ON_DELAY_FLAG(reg) (reg |= RL_ON_DELAY_FLAG) #define SET_RL_OFF_DELAY_FLAG(reg) (reg |= RL_OFF_DELAY_FLAG) #define CLEAR_RL_ORDER_FLAG(reg) (reg &= (~(RL_ORDER_FLAG))) #define CLEAR_RL_COUNTER_END_FLAG(reg) (reg &= (~(RL_COUNTER_END_FLAG))) #define CLEAR_RL_COUNTER_BEGIN_FLAG(reg) (reg &= (~(RL_COUNTER_BEGIN_FLAG))) #define CLEAR_RL_ON_FLAG(reg) (reg &= (~(RL_ON_FLAG))) #define CLEAR_RL_OFF_FLAG(reg) (reg &= (~(RL_OFF_FLAG))) #define CLEAR_RL_ON_DELAY_FLAG(reg) (reg &= (~(RL_ON_DELAY_FLAG))) #define CLEAR_RL_OFF_DELAY_FLAG(reg) (reg &= (~(RL_OFF_DELAY_FLAG))) enum{ DELAY_CTRL = 0, PROMPT_CTRL, }; enum{ STM32_ADC_V_1 = 0, STM32_ADC_V_2, }; #pragma pack (2) typedef struct { uint32_t uniq_3; uint32_t uniq_2; uint32_t uniq_1; uint32_t dev_chn; uint16_t version[6]; uint16_t date[16]; uint64_t keep_running_time; }board_info_t; typedef struct { uint32_t voltage; uint32_t current; uint32_t power; uint32_t freq; uint32_t consumer; uint32_t factor; }old_ele_info_t; typedef struct { uint16_t state :1; uint16_t v_top_en :1; uint16_t v_top_wanning :1; uint16_t v_down_en :1; uint16_t v_down_wanning :1; uint16_t c_top_en :1; uint16_t c_top_wanning :1; uint16_t p_top_en :1; uint16_t p_top_wanning :1; uint16_t e_top_en :1; uint16_t e_top_wanning :1; uint16_t :5; }old_state_t; typedef uint32_t old_consumer_t; typedef struct { old_ele_info_t ele_info[8]; }ac_ele_t; typedef struct { old_state_t state[8]; }ac_state_t; typedef struct { old_consumer_t consumer[8]; }ac_consumer_t; typedef uint32_t ac_total_consumer_t; typedef struct{ uint16_t i_max_func : 1; uint16_t v_max_func : 1; uint16_t v_min_func : 1; uint16_t p_max_func : 1; uint16_t c_max_func : 1; uint16_t : 3; }ac_over_func_t; typedef struct{ uint16_t total_v_wanning_max : 1; uint16_t total_v_wanning_min : 1; uint16_t total_i_wanning_max : 1; uint16_t total_p_waning_max : 1; uint16_t total_c_waning_max : 1; uint16_t : 3; }total_waning_t; typedef struct { uint32_t uniq_ID_64_95; uint32_t uniq_ID_32_63; uint32_t uniq_ID_00_31; int channels; char ver[12]; char date[32]; uint64_t runing_time; }ac_information_t; typedef struct { uint16_t delay_open[8]; }ac_delay_open_t; typedef struct { uint16_t delay_close[8]; }ac_delay_close_t; typedef struct { uint32_t v_top; uint32_t v_down; uint32_t i_top; uint32_t i_down; uint32_t p_top; uint32_t p_down; uint32_t e_top; uint32_t e_down; }thr_t; typedef struct { thr_t th[8]; }ac_thr_t; typedef thr_t all_thr_t; //typedef uint16_t all_over_func_t; typedef struct { uint16_t dev_chn; ac_ele_t ac_ele; ac_state_t state; ac_consumer_t consumer; uint32_t total_sonsumer; uint16_t detection; total_waning_t total_wanning; ac_information_t info; }ac_r_data_t; typedef struct{ ac_delay_open_t open; ac_delay_close_t close; ac_thr_t thr; all_thr_t totol_thr; ac_over_func_t over_func[8]; }ac_rw_data_t; typedef struct { uint32_t voltage; uint32_t current; uint32_t power; uint32_t consumer; uint16_t freq; uint16_t factor; uint16_t wanning; uint16_t resever; }elect_info_t; typedef struct{ elect_info_t info[3]; }elect_3_info_t; typedef struct { uint16_t delay_open; uint16_t delay_close; }delay_t; typedef struct{ uint32_t th_voltage_max; uint32_t th_voltage_min; uint32_t th_current_max; uint32_t th_power_max; uint32_t th_consumer_max; uint32_t reserve1; uint32_t reserve2; }threshold_t; typedef struct { uint16_t dev_chn; board_info_t b_info; elect_3_info_t ele_3_in; elect_info_t ele_out[MAX_CHANNEL]; uint16_t detection; uint16_t wanning_lock_L1; uint16_t wanning_lock_L2; uint16_t wanning_lock_L3; }r_data_t; typedef struct { uint16_t relay_status[MAX_CHANNEL]; uint16_t combin_relay_status[4]; uint16_t zero_relay_status[3]; delay_t delay_chn[MAX_CHANNEL]; delay_t combin_chn[4]; delay_t zero_chn[3]; threshold_t th_in[MAX_INPUT_CAHNNEL]; threshold_t th_out[MAX_CHANNEL]; threshold_t th_combin_out[4]; uint16_t over_fun_in[3]; uint16_t over_func_out[MAX_CHANNEL]; uint16_t combin_over_func[4]; uint16_t chn_ctrl[MAX_CHANNEL]; #define CTRL_YES 0 #define CTRL_HARD_OPEN 1 #define CTRL_HARD_CLOSE 2 }rw_data_t; typedef union{ uint16_t data[START_R_LENTH]; r_data_t r_d; }mod_bus_r; typedef union{ uint16_t data[START_RW_LENTH]; rw_data_t rw_d; }mod_bus_rw; typedef struct { //mod_bus_r r_data; //mod_bus_rw rw_data; ac_r_data_t r_data; ac_rw_data_t rw_data; }mod_data_t; typedef struct { uint32_t iic_consumer[MAX_CHANNEL]; uint64_t recode_index1; }iic_consumer_chache_t; typedef union{ uint8_t data[64]; iic_consumer_chache_t iic_con; }iic_data; typedef union{ uint8_t data[4]; uint32_t value; }Rx_Data; #pragma pack () typedef struct{ iic_data iic_da; uint64_t index; uint16_t row; }consumer_data; typedef struct { uint8_t flag; uint16_t start_addr; uint16_t lenth; uint8_t data[72]; }eeprom_write_cache_t; typedef struct { uint16_t start_addr; uint16_t lenth; uint8_t data[36]; }w_eeprom_data_t; typedef struct { #define QUEUE_MAX 25 uint8_t front; uint8_t rear; w_eeprom_data_t data[QUEUE_MAX]; uint8_t (*is_empty)(void); uint8_t (*is_full)(void); uint8_t (*en_queue)(w_eeprom_data_t *d); uint8_t (*de_queue)(w_eeprom_data_t *d); }queue_t; typedef struct { uint8_t fire_or_zero; #define _FIRE 0 #define _ZERO 1 uint8_t channel; uint16_t *reg; uint8_t method; uint16_t status; uint8_t w_eep_flag; #define FLAG_N_W_EEP 0 #define FLAG_W_EEP 1 }async_data; typedef struct { mod_data_t md_data; uint8_t flag_1s; uint8_t flag_10s; uint8_t flag_100ms; uint8_t clear_flag; /* erase consumer and all successful this flag is 0 */ uint8_t out_wanning_en[8]; uint8_t in_wanning_en[MAX_INPUT_CAHNNEL]; uint8_t in_over_func[3]; uint8_t over_func[MAX_CHANNEL]; uint16_t relay_staging_staus[MAX_CHANNEL]; //uint16_t relay_combin_staging_status[4]; //uint16_t relay_zero_staging_status[3]; uint16_t relay_limit_counter[MAX_CHANNEL]; //uint16_t relay_zero_limit_counter[3]; consumer_data con_da; uint32_t ele_restore[MAX_CHANNEL]; uint16_t v_k[2]; uint16_t i_k[2]; uint8_t haddr; uint8_t detection_1_value; uint32_t detection_1_count; uint32_t timer_count; queue_t q_cache; #if SURPPORT_2_PT uint8_t detection_2_value; uint32_t detection_2_count; #endif #if SUPPORT_SELF_LOCK // #if (RelaySlaveChaNum >= 1) // uint8_t handle_k_1_status; // uint8_t key_1; // #endif // #if (RelaySlaveChaNum >= 2) // uint8_t handle_k_2_status; // uint8_t key_2; // #endif // #if (RelaySlaveChaNum >= 3) // uint8_t handle_k_3_status; // uint8_t key_3; // #endif // #if (RelaySlaveChaNum >= 4) // uint8_t handle_k_4_status; // uint8_t key_4; // #endif uint8_t handle_k_status[4]; uint8_t val_key[4]; #endif #if SUPPORT_RELAY_REMENBER uint8_t handle_status[MAX_CHANNEL]; /* Save the state before the power failure */ #if SURPPORT_2_PT uint8_t handle_input_pt[2]; /* recode input status */ #else uint8_t handle_input_pt[1]; #endif #endif #if SUPPORT_SELF_LOCK // #if (RelaySlaveChaNum >= 1) // void (*read_key_1)(); // #endif // #if (RelaySlaveChaNum >= 2) // void (*read_key_2)(); // #endif // #if (RelaySlaveChaNum >= 3) // void (*read_key_3)(); // #endif // #if (RelaySlaveChaNum >= 4) // void (*read_key_4)(); // #endif void (*get_lock_key)(); void (*opt_lock_key)(); #endif void (*open)(uint8_t channel); void (*close)(uint8_t channel); void (*read_ele)(uint8_t channel); void (*led_flash)(void); void (*read_eeprom)(uint16_t addr,uint8_t *r_buff,uint16_t lenth); void (*write_eeprom)(uint16_t addr,uint8_t *w_buff,uint16_t lenth); void (*check_wanning)(uint8_t in_out, uint8_t channel); void (*detection)(void); void (*opt_detection)(void); void (*erase_consumer)(void); void (*opt_overfunc)(uint8_t channel); void (*opt_alloverfunc)(uint8_t input); void (*break_uboot)(void); void (*feed_dog)(void); void (*lock)(void); void (*unlock)(void); void (*check_threshold)(uint8_t in_out,uint8_t channel); void (*relay_sync)(void); void (*read_eeprom_page)(uint16_t addr,uint8_t *r_buff,uint16_t lenth); void (*write_eeprom_page)(uint16_t addr,uint8_t *r_buff,uint16_t lenth); void (*tog)(uint8_t channel); }board_t; board_t *get_board(void); void set_relay_status_async(uint16_t *reg,uint8_t method,uint16_t status); void read_config_from_eeprom(void); void reset_config_for_eeprom(void); void set_relay_sta_async(async_data *data); #endif