#include "uart.h"
#include "board_cfg.h"
#include "common.h"
#include "gd32e23x.h"
#include "Hlw8110.h"
#include "stdbool.h"


#define UART1_BUF_SIZE 10 

extern unsigned char	u8_TxBuf[UART1_BUF_SIZE]; 
extern unsigned char	u8_RxBuf[UART1_BUF_SIZE];
extern unsigned char	u8_TX_Length;
extern unsigned char	u8_RX_Length;
extern unsigned char	u8_RX_Index;
extern unsigned char	B_Rx_Data_ING;
extern unsigned char	B_Rx_Finish;

Rx_Data data={0};








#define SEL_0_H  gpio_bit_set(GPIOA,GPIO_PIN_6)
#define SEL_0_L  gpio_bit_reset(GPIOA,GPIO_PIN_6)

#define SEL_1_H  gpio_bit_set(GPIOA,GPIO_PIN_7)
#define SEL_1_L  gpio_bit_reset(GPIOA,GPIO_PIN_7)

#define SEL_2_H  gpio_bit_set(GPIOB,GPIO_PIN_0)
#define SEL_2_L  gpio_bit_reset(GPIOB,GPIO_PIN_0)


void uart1_config(uint32_t bound)
{

	nvic_irq_enable(USART1_IRQn, 2);
	rcu_periph_clock_enable(RCU_GPIOA);
	gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_2); 
	gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_2);
	gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_2);
	
	gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_3);
	gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_3);
  gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_3);
	
	rcu_periph_clock_enable(RCU_USART1); 
	usart_deinit(USART1);
	usart_baudrate_set(USART1, bound);
	usart_stop_bit_set(USART1,USART_STB_1BIT);

	usart_word_length_set(USART1,USART_WL_9BIT);
	usart_parity_config(USART1,USART_PM_EVEN); 
	usart_receive_config(USART1, USART_RECEIVE_ENABLE);
	usart_transmit_config(USART1, USART_TRANSMIT_ENABLE);
	usart_enable(USART1);
	usart_interrupt_enable(USART1, USART_INT_RBNE);

}




void USART1_IRQHandler(void)
{
	if(usart_flag_get(USART1, USART_FLAG_ORERR) == SET)
  {                                                         
    usart_flag_clear(USART1, USART_FLAG_ORERR);       
  } 
	if(usart_interrupt_flag_get(USART1, USART_INT_FLAG_TBE)!= RESET) 
  {     
    usart_interrupt_flag_clear(USART1, USART_INT_FLAG_TBE);       
  }
	if(usart_interrupt_flag_get(USART1, USART_INT_FLAG_RBNE) != RESET) 
	{
		usart_interrupt_flag_clear(USART1, USART_INT_FLAG_RBNE);
		if (u8_RX_Index < u8_RX_Length )
		{
			u8_RxBuf[u8_RX_Index] = usart_data_receive(USART1); 
			u8_RX_Index++;
			B_Rx_Data_ING = 1;
			if(u8_RX_Index == u8_RX_Length)
			{
				B_Rx_Finish = TRUE;	
				u8_RX_Index = 0;
			}
		}
	}
}


void Awaken_Hlw8110()
{
	usart_data_transmit(USART1, 0x55); 
}

void Start_Send_UartData(unsigned char len)
{
	unsigned int i;
	
	for(i=0;i<len;i++)
	{
		usart_data_transmit(USART1, (uint8_t)u8_TxBuf[i]); 
		while(usart_flag_get(USART1, USART_FLAG_TC) == RESET);
	}
}



void ch448f_config(void)
{
	rcu_periph_clock_enable(RCU_GPIOA);
	rcu_periph_clock_enable(RCU_GPIOB);
	
	gpio_mode_set(GPIOA, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7); 
	gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
	gpio_bit_reset(GPIOA, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
	
	gpio_mode_set(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_0);
	gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_0);
	gpio_bit_reset(GPIOB, GPIO_PIN_0);
}

void select_channel(uint8_t chx)
{

	
	switch(chx)
	{
#if SUPPORT_CHONGQING
		case 7:
		{
			SEL_0_H;
			SEL_1_H;
			SEL_2_L;
		}
			break;
		case 6:
		{
			SEL_0_L;
			SEL_1_H;
			SEL_2_L;	
		}
			break;
		case 5:
		{
			SEL_0_H;
			SEL_1_L;
			SEL_2_L;	
		}
			break;
		case 4:
		{
			SEL_0_L;
			SEL_1_L;
			SEL_2_L;	
		}
			break;
		case 3:
		{
			SEL_0_H;
			SEL_1_H;
			SEL_2_H;	
		}
			break;
		case 2:
		{
			SEL_0_L;
			SEL_1_H;
			SEL_2_H;	
		}
			break;
		case 1:
		{
			SEL_0_H;
			SEL_1_L;
			SEL_2_H;	
		}
			break;
		case 0:
		{
			SEL_0_L;
			SEL_1_L;
			SEL_2_H;	
		}
			break;	
#else
		case 0:
		{
			SEL_0_H;
			SEL_1_H;
			SEL_2_L;
		}
			break;
		case 1:
		{
			SEL_0_L;
			SEL_1_H;
			SEL_2_L;	
		}
			break;
		case 2:
		{
			SEL_0_H;
			SEL_1_L;
			SEL_2_L;	
		}
			break;
		case 3:
		{
			SEL_0_L;
			SEL_1_L;
			SEL_2_L;	
		}
			break;
		case 4:
		{
			SEL_0_H;
			SEL_1_H;
			SEL_2_H;	
		}
			break;
		case 5:
		{
			SEL_0_L;
			SEL_1_H;
			SEL_2_H;	
		}
			break;
		case 6:
		{
			SEL_0_H;
			SEL_1_L;
			SEL_2_H;	
		}
			break;
		case 7:
		{
			SEL_0_L;
			SEL_1_L;
			SEL_2_H;	
		}
			break;
#endif
		default:
			break;

	}

}