board.dts 39 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633
  1. /*
  2. * Allwinner Technology CO., Ltd.
  3. */
  4. /dts-v1/;
  5. /* optee used 7MB: SHM 2M: OS: 1M: TA:4M*/
  6. /memreserve/ 0x41B00000 0x00100000;
  7. /* DSP used 1MB */
  8. /*/memreserve/ 0x42000000 0x00100000;*/
  9. #include "sun8iw20p1.dtsi"
  10. /{
  11. model = "sun8iw20";
  12. compatible = "allwinner,r528", "arm,sun8iw20p1";
  13. reg_vdd_cpu: vdd-cpu {
  14. compatible = "sunxi-pwm-regulator";
  15. pwms = <&pwm 3 5000 0>;
  16. regulator-name = "vdd_cpu";
  17. regulator-min-microvolt = <810000>;
  18. regulator-max-microvolt = <1160000>;
  19. regulator-ramp-delay = <25>;
  20. regulator-always-on;
  21. regulator-boot-on;
  22. status = "okay";
  23. };
  24. reg_usb1_vbus: usb1-vbus {
  25. compatible = "regulator-fixed";
  26. regulator-name = "usb1-vbus";
  27. regulator-min-microvolt = <5000000>;
  28. regulator-max-microvolt = <5000000>;
  29. regulator-enable-ramp-delay = <1000>;
  30. gpio = <&pio PB 10 GPIO_ACTIVE_HIGH>;
  31. enable-active-high;
  32. };
  33. /*
  34. spi_gpio: spi_gpio {
  35. compatible = "spi-gpio";
  36. #address-cells = <0x1>;
  37. #size-cells = <0>;
  38. // miso-gpios = <&pio PE 3 1>;
  39. mosi-gpios = <&pio PD 12 1>;
  40. sck-gpios = <&pio PD 11 1>;
  41. cs-gpios = <&pio PD 10 1>;
  42. pinctrl-names = "default";
  43. num-chipselects = <1>;
  44. status = "okay";
  45. st7789v{
  46. status = "okay";
  47. compatible ="sitronix,st7789v";
  48. reg = <0>;
  49. spi-max-frequency = <32000000>;
  50. rotate = <90>;
  51. spi-cpol;
  52. spi-cpha;
  53. rgb;
  54. fps = <30>;
  55. buswidth = <8>;
  56. reset-gpios = <&pio PD 13 GPIO_ACTIVE_LOW>;
  57. dc-gpios = <&pio PD 14 GPIO_ACTIVE_LOW>;
  58. //led-gpios = <&pio PE 13 GPIO_ACTIVE_HIGH>;
  59. debug = <7>;
  60. };
  61. };
  62. */
  63. };
  64. &cpu0 {
  65. cpu-supply = <&reg_vdd_cpu>;
  66. };
  67. &pio {
  68. lcd_dc: lcd_dc{
  69. allwinner,pins = "PD1";
  70. };
  71. lcd_rst: lcd_rst{
  72. allwinner,pins = "PD0";
  73. };
  74. led: led{
  75. allwinner,pins = "PE8";
  76. };
  77. moni_spi: moni_spi {
  78. pins = "PD13", "PD14", "PD10","PD11", "PD12";
  79. function = "gpio_out";
  80. drive-strength = <10>;
  81. bias-pull-up;
  82. };
  83. sdc0_pins_a: sdc0@0 {
  84. allwinner,pins = "PF0", "PF1", "PF2",
  85. "PF3", "PF4", "PF5";
  86. allwinner,function = "sdc0";
  87. allwinner,muxsel = <2>;
  88. allwinner,drive = <3>;
  89. allwinner,pull = <1>;
  90. pins = "PF0", "PF1", "PF2",
  91. "PF3", "PF4", "PF5";
  92. function = "sdc0";
  93. drive-strength = <30>;
  94. bias-pull-up;
  95. power-source = <3300>;
  96. };
  97. sdc0_pins_b: sdc0@1 {
  98. pins = "PF0", "PF1", "PF2",
  99. "PF3", "PF4", "PF5";
  100. function = "sdc0";
  101. drive-strength = <30>;
  102. bias-pull-up;
  103. power-source = <1800>;
  104. };
  105. sdc0_pins_c: sdc0@2 {
  106. pins = "PF0", "PF1", "PF2",
  107. "PF3", "PF4", "PF5";
  108. function = "gpio_in";
  109. };
  110. /* TODO: add jtag pin */
  111. sdc0_pins_d: sdc0@3 {
  112. pins = "PF2", "PF4";
  113. function = "uart0";
  114. drive-strength = <10>;
  115. bias-pull-up;
  116. };
  117. sdc0_pins_e: sdc0@4 {
  118. pins = "PF0", "PF1", "PF3",
  119. "PF5";
  120. function = "jtag";
  121. drive-strength = <10>;
  122. bias-pull-up;
  123. };
  124. sdc1_pins_a: sdc1@0 {
  125. pins = "PG0", "PG1", "PG2",
  126. "PG3", "PG4", "PG5";
  127. function = "sdc1";
  128. drive-strength = <30>;
  129. bias-pull-up;
  130. };
  131. sdc1_pins_b: sdc1@1 {
  132. pins = "PG0", "PG1", "PG2",
  133. "PG3", "PG4", "PG5";
  134. function = "gpio_in";
  135. };
  136. sdc2_pins_a: sdc2@0 {
  137. allwinner,pins = "PC2", "PC3", "PC4",
  138. "PC5", "PC6", "PC7";
  139. allwinner,function = "sdc2";
  140. allwinner,muxsel = <3>;
  141. allwinner,drive = <3>;
  142. allwinner,pull = <1>;
  143. pins = "PC2", "PC3", "PC4",
  144. "PC5", "PC6", "PC7";
  145. function = "sdc2";
  146. drive-strength = <30>;
  147. bias-pull-up;
  148. };
  149. sdc2_pins_b: sdc2@1 {
  150. pins = "PC2", "PC3", "PC4",
  151. "PC5", "PC6", "PC7";
  152. function = "gpio_in";
  153. };
  154. wlan_pins_a:wlan@0 {
  155. pins = "PG11";
  156. function = "clk_fanout1";
  157. };
  158. uart0_pins_a: uart0_pins@0 { /* For mangopi board */
  159. pins = "PE2", "PE3";
  160. function = "uart0";
  161. drive-strength = <10>;
  162. bias-pull-up;
  163. };
  164. uart0_pins_b: uart0_pins@1 { /* For mangopi board */
  165. pins = "PE2", "PE3";
  166. function = "gpio_in";
  167. };
  168. uart1_pins_a: uart1_pins@0 { /* For EVB1 board */
  169. pins = "PE11","PE10";
  170. allwinner,muxsel = <7>;
  171. function = "uart1";
  172. drive-strength = <10>;
  173. bias-pull-up;
  174. };
  175. uart1_pins_b: uart1_pins { /* For EVB1 board */
  176. pins = "PE11","PE10";
  177. function = "gpio_in";
  178. };
  179. uart2_pins_a: uart2_pins@0 { /* For EVB1 board */
  180. pins = "PC0", "PC1";
  181. function = "uart2";
  182. drive-strength = <10>;
  183. bias-pull-up;
  184. };
  185. uart2_pins_b: uart2_pins@1 { /* For EVB1 board */
  186. pins = "PC0", "PC1";
  187. function = "gpio_in";
  188. };
  189. uart3_pins_a: uart3_pins@0 { /* For bingpi-m2 board */
  190. pins = "PB6", "PB7";
  191. function = "uart3";
  192. allwinner,muxsel = <7>;
  193. drive-strength = <10>;
  194. bias-pull-up;
  195. };
  196. uart3_pins_b: uart3_pins@1 { /* For bingpi-m2 board */
  197. pins = "PB6", "PB7";
  198. function = "gpio_in";
  199. };
  200. uart4_pins_a: uart4_pins@0 { /* For bingpi-m2 board */
  201. pins = "PB2", "PB3";
  202. function = "uart4";
  203. allwinner,muxsel = <7>;
  204. drive-strength = <10>;
  205. bias-pull-up;
  206. };
  207. uart4_pins_b: uart4_pins@1 { /* For bingpi-m2 board */
  208. pins = "PB2", "PB3";
  209. function = "gpio_in";
  210. };
  211. uart5_pins_a: uart5_pins@0 { /* For bingpi-m2 board */
  212. pins = "PE6", "PE7";
  213. function = "uart5";
  214. allwinner,muxsel = <7>;
  215. drive-strength = <10>;
  216. bias-pull-up;
  217. };
  218. uart5_pins_b: uart5_pins@1 { /* For bingpi-m2 board */
  219. pins = "PE6", "PE7";
  220. function = "gpio_in";
  221. };
  222. can0_pins_a: can0_pins@0 {
  223. pins = "PB2", "PB3";
  224. function = "can0";
  225. drive-strength = <10>;
  226. bias-pull-up;
  227. };
  228. can0_pins_b: can0_pins@1 {
  229. pins = "PB2", "PB3";
  230. function = "gpio_in";
  231. };
  232. can1_pins_a: can1_pins@0 {
  233. pins = "PB4", "PB5";
  234. function = "can1";
  235. drive-strength = <10>;
  236. bias-pull-up;
  237. };
  238. can1_pins_b: can1_pins@1 {
  239. pins = "PB4", "PB5";
  240. function = "gpio_in";
  241. };
  242. twi0_pins_a: twi0@0 {
  243. pins = "PB10", "PB11"; /*sck sda*/
  244. function = "twi0";
  245. drive-strength = <10>;
  246. };
  247. twi0_pins_b: twi0@1 {
  248. pins = "PB10", "PB11";
  249. function = "gpio_in";
  250. };
  251. twi1_pins_a: twi1@0 {
  252. pins = "PB4", "PB5";
  253. function = "twi1";
  254. drive-strength = <10>;
  255. };
  256. twi1_pins_b: twi1@1 {
  257. pins = "PB4", "PB5";
  258. function = "gpio_in";
  259. };
  260. twi2_pins_a: twi2@0 {
  261. pins = "PE12", "PE13";
  262. function = "twi2";
  263. drive-strength = <10>;
  264. };
  265. twi2_pins_b: twi2@1 {
  266. pins = "PE12", "PE13";
  267. function = "gpio_in";
  268. };
  269. twi3_pins_a: twi3@0 {
  270. pins = "PE6", "PE7";
  271. function = "twi3";
  272. drive-strength = <10>;
  273. };
  274. twi3_pins_b: twi3@1 {
  275. pins = "PE6", "PE7";
  276. function = "gpio_in";
  277. };
  278. gmac_pins_a: gmac@0 {
  279. pins = "PG0", "PG1", "PG2", "PG3",
  280. "PG4", "PG5", "PG11",
  281. "PG12","PG13", "PG14", "PG15";
  282. allwinner,function = "gmac0";
  283. allwinner,muxsel = <4>;
  284. allwinner,drive = <1>;
  285. allwinner,pull = <0>;
  286. drive-strength = <10>;
  287. };
  288. gmac_pins_b: gmac@1 {
  289. pins = "PG0", "PG1", "PG2", "PG3",
  290. "PG4", "PG5", "PG11",
  291. "PG12","PG13", "PG14", "PG15";
  292. allwinner,function = "gpio_in";
  293. allwinner,muxsel = <0>;
  294. allwinner,drive = <1>;
  295. allwinner,pull = <0>;
  296. };
  297. dmic_pins_a: dmic@0 {
  298. /* DMIC_PIN: CLK, DATA0, DATA1, DATA2, DATA3*/
  299. pins = "PB12", "PB11", "PB10", "PE14", "PB8";
  300. function = "dmic";
  301. drive-strength = <20>;
  302. bias-disable;
  303. };
  304. dmic_pins_b: dmic@1 {
  305. pins = "PB12", "PB11", "PB10", "PE14", "PB8";
  306. function = "io_disabled";
  307. drive-strength = <20>;
  308. bias-disable;
  309. };
  310. daudio0_pins_a: daudio0@0 {
  311. pins = "PE17", "PE16", "PE15", "PE14", "PE13";
  312. function = "i2s0";
  313. drive-strength = <20>;
  314. bias-disable;
  315. };
  316. daudio0_pins_b: daudio0_sleep@0 {
  317. pins = "PE17", "PE16", "PE15", "PE14", "PE13";
  318. function = "io_disabled";
  319. drive-strength = <20>;
  320. bias-disable;
  321. };
  322. daudio1_pins_a: daudio1@0 {
  323. pins = "PG11", "PG12", "PG13", "PG14", "PG15";
  324. function = "i2s1";
  325. drive-strength = <20>;
  326. bias-disable;
  327. };
  328. daudio1_pins_b: daudio1_sleep@0 {
  329. pins = "PG11", "PG12", "PG13", "PG14", "PG15";
  330. function = "io_disabled";
  331. drive-strength = <20>;
  332. bias-disable;
  333. };
  334. daudio2_pins_a: daudio2@0 {
  335. /* I2S_PIN: MCLK, BCLK, LRCK */
  336. pins = "PF6", "PF3", "PF5";
  337. function = "i2s2";
  338. drive-strength = <20>;
  339. bias-disable;
  340. };
  341. daudio2_pins_b: daudio2@1 {
  342. /* I2S_PIN: DOUT0 */
  343. pins = "PF1";
  344. function = "i2s2_dout";
  345. drive-strength = <20>;
  346. bias-disable;
  347. };
  348. daudio2_pins_c: daudio2@2 {
  349. /* I2S_PIN: DIN0 */
  350. pins = "PF0";
  351. function = "i2s2_din";
  352. drive-strength = <20>;
  353. bias-disable;
  354. };
  355. daudio2_pins_d: daudio2_sleep@0 {
  356. pins = "PF6", "PF3", "PF5", "PF1", "PF0";
  357. function = "io_disabled";
  358. drive-strength = <20>;
  359. bias-disable;
  360. };
  361. spdif_pins_a: spdif@0 {
  362. /* SPDIF_PIN: SPDIF_OUT */
  363. pins = "PG18";
  364. function = "spdif";
  365. drive-strength = <20>;
  366. bias-disable;
  367. };
  368. spdif_pins_b: spdif_sleep@0 {
  369. pins = "PG18";
  370. function = "io_disabled";
  371. drive-strength = <20>;
  372. bias-disable;
  373. };
  374. spi0_pins_a: spi0@0 {
  375. pins = "PC2", "PC4", "PC5"; /* clk, mosi, miso */
  376. function = "spi0";
  377. muxsel = <2>;
  378. drive-strength = <10>;
  379. };
  380. spi0_pins_b: spi0@1 {
  381. pins = "PC3", "PC7", "PC6";
  382. function = "spi0";
  383. muxsel = <2>;
  384. drive-strength = <10>;
  385. bias-pull-up; /* cs, hold, wp should be pulled up */
  386. };
  387. spi0_pins_c: spi0@2 {
  388. pins = "PC2", "PC3", "PC4", "PC5","PC6", "PC7";
  389. function = "gpio_in";
  390. muxsel = <0>;
  391. drive-strength = <10>;
  392. };
  393. spi1_pins_a: spi1@0 {
  394. pins = "PD11", "PD12", "PD13"; /* clk, mosi, miso */
  395. function = "spi1";
  396. drive-strength = <10>;
  397. };
  398. spi1_pins_b: spi1@1 {
  399. pins = "PD10", "PD14", "PD15";
  400. function = "spi1";
  401. drive-strength = <10>;
  402. bias-pull-up; /* cs, hold, wp should be pulled up */
  403. };
  404. spi1_pins_c: spi1@2 {
  405. pins = "PD10", "PD11", "PD12", "PD13","PD14", "PD15";
  406. function = "gpio_in";
  407. drive-strength = <10>;
  408. };
  409. ledc_pins_a: ledc@0 {
  410. pins = "PG7";
  411. function = "ledc";
  412. drive-strength = <10>;
  413. };
  414. ledc_pins_b: ledc@1 {
  415. pins = "PG7";
  416. function = "gpio_in";
  417. };
  418. pwm0_pin_a: pwm0@0 {
  419. pins = "PD16";
  420. function = "pwm0";
  421. drive-strength = <10>;
  422. bias-pull-up;
  423. };
  424. pwm0_pin_b: pwm0@1 {
  425. pins = "PD16";
  426. function = "gpio_in";
  427. bias-disable;
  428. };
  429. pwm2_pin_a: pwm2@0 {
  430. pins = "PD18";
  431. function = "pwm2";
  432. drive-strength = <10>;
  433. bias-pull-up;
  434. };
  435. pwm2_pin_b: pwm2@1 {
  436. pins = "PD18";
  437. function = "gpio_out";
  438. };
  439. pwm7_pin_a: pwm7@0 {
  440. pins = "PD22";
  441. function = "pwm7";
  442. drive-strength = <10>;
  443. bias-pull-up;
  444. };
  445. pwm7_pin_b: pwm7@1 {
  446. pins = "PD22";
  447. function = "gpio_in";
  448. };
  449. s_cir0_pins_a: s_cir@0 {
  450. pins = "PB7";
  451. function = "ir";
  452. drive-strength = <10>;
  453. bias-pull-up;
  454. };
  455. s_cir0_pins_b: s_cir@1 {
  456. pins = "PB7";
  457. function = "gpio_in";
  458. };
  459. ir1_pins_a: ir1@0 {
  460. pins = "PB0";
  461. function = "ir";
  462. drive-strength = <10>;
  463. bias-pull-up;
  464. };
  465. ir1_pins_b: ir1@1 {
  466. pins = "PB0";
  467. function = "gpio_in";
  468. };
  469. };
  470. &uart0 {
  471. pinctrl-names = "default", "sleep";
  472. pinctrl-0 = <&uart0_pins_a>;
  473. pinctrl-1 = <&uart0_pins_b>;
  474. status = "disabled";
  475. };
  476. &uart1 {
  477. pinctrl-names = "default", "sleep";
  478. pinctrl-0 = <&uart1_pins_a>;
  479. pinctrl-1 = <&uart1_pins_b>;
  480. status = "okay";
  481. };
  482. &uart2 {
  483. pinctrl-names = "default", "sleep";
  484. pinctrl-0 = <&uart2_pins_a>;
  485. pinctrl-1 = <&uart2_pins_b>;
  486. status = "disabled";
  487. };
  488. &uart3 {
  489. pinctrl-names = "default", "sleep";
  490. pinctrl-0 = <&uart3_pins_a>;
  491. pinctrl-1 = <&uart3_pins_b>;
  492. status = "okay";
  493. };
  494. &uart4 {
  495. pinctrl-names = "default", "sleep";
  496. pinctrl-0 = <&uart4_pins_a>;
  497. pinctrl-1 = <&uart4_pins_b>;
  498. status = "okay";
  499. };
  500. &uart5 {
  501. pinctrl-names = "default", "sleep";
  502. pinctrl-0 = <&uart5_pins_a>;
  503. pinctrl-1 = <&uart5_pins_b>;
  504. status = "okay";
  505. };
  506. &can0 {
  507. pinctrl-names = "default";
  508. pinctrl-0 = <&can0_pins_a>;
  509. pinctrl-1 = <&can0_pins_b>;
  510. status = "disabled";
  511. };
  512. &can1 {
  513. pinctrl-names = "default";
  514. pinctrl-0 = <&can1_pins_a>;
  515. pinctrl-1 = <&can1_pins_b>;
  516. status = "okay";
  517. };
  518. &soc {
  519. card0_boot_para@2 {
  520. /*
  521. * Avoid dtc compiling warnings.
  522. * @TODO: Developer should modify this to the actual value
  523. */
  524. reg = <0x0 0x2 0x0 0x0>;
  525. device_type = "card0_boot_para";
  526. card_ctrl = <0x0>;
  527. card_high_speed = <0x1>;
  528. card_line = <0x4>;
  529. pinctrl-0 = <&sdc0_pins_a>;
  530. };
  531. card2_boot_para@3 {
  532. /*
  533. * Avoid dtc compiling warnings.
  534. * @TODO: Developer should modify this to the actual value
  535. */
  536. reg = <0x0 0x3 0x0 0x0>;
  537. device_type = "card2_boot_para";
  538. card_ctrl = <0x2>;
  539. card_high_speed = <0x1>;
  540. card_line = <0x4>;
  541. pinctrl-0 = <&sdc2_pins_a>;
  542. /*pinctrl-0 = <&sdc0_pins_a>;*/
  543. /*sdc_ex_dly_used = <0x2>;*/
  544. sdc_io_1v8 = <0x1>;
  545. /*sdc_type = "tm4";*/
  546. sdc_tm4_hs200_max_freq = <150>;
  547. sdc_tm4_hs400_max_freq = <100>;
  548. sdc_ex_dly_used = <2>;
  549. /*sdc_tm4_win_th = <8>;*/
  550. /*sdc_dis_host_caps = <0x180>;*/
  551. };
  552. rfkill: rfkill@0 {
  553. compatible = "allwinner,sunxi-rfkill";
  554. chip_en;
  555. power_en;
  556. pinctrl-0 = <&wlan_pins_a>;
  557. pinctrl-names = "default";
  558. status = "disabled";
  559. wlan: wlan@0 {
  560. compatible = "allwinner,sunxi-wlan";
  561. clock-names = "32k-fanout1";
  562. clocks = <&ccu CLK_FANOUT1_OUT>;
  563. wlan_busnum = <0x1>;
  564. /* wlan_regon = <&pio PG 12 GPIO_ACTIVE_HIGH>; */
  565. /* wlan_hostwake = <&pio PG 10 GPIO_ACTIVE_HIGH>; */
  566. /*wlan_power = "VCC-3V3";*/
  567. /*wlan_power_vol = <3300000>;*/
  568. /*interrupt-parent = <&pio>;
  569. interrupts = < PG 10 IRQ_TYPE_LEVEL_HIGH>;*/
  570. status = "disabled";
  571. wakeup-source;
  572. };
  573. bt: bt@0 {
  574. compatible = "allwinner,sunxi-bt";
  575. clock-names = "32k-fanout1";
  576. clocks = <&ccu CLK_FANOUT1_OUT>;
  577. /*bt_power_num = <0x01>;*/
  578. /*bt_power = "axp803-dldo1";*/
  579. /*bt_io_regulator = "axp803-dldo1";*/
  580. /*bt_io_vol = <3300000>;*/
  581. /*bt_power_vol = <330000>;*/
  582. /* bt_rst_n = <&pio PG 15 GPIO_ACTIVE_LOW>; */
  583. status = "disabled";
  584. };
  585. };
  586. btlpm: btlpm@0 {
  587. compatible = "allwinner,sunxi-btlpm";
  588. uart_index = <0x1>;
  589. bt_wake = <&pio PG 14 GPIO_ACTIVE_HIGH>;
  590. bt_hostwake = <&pio PG 13 GPIO_ACTIVE_HIGH>;
  591. status = "disabled";
  592. };
  593. addr_mgt: addr_mgt@0 {
  594. compatible = "allwinner,sunxi-addr_mgt";
  595. type_addr_wifi = <0x0>;
  596. type_addr_bt = <0x0>;
  597. type_addr_eth = <0x0>;
  598. status = "okay";
  599. };
  600. };
  601. &sdc2 {
  602. non-removable;
  603. bus-width = <4>;
  604. mmc-ddr-1_8v;
  605. mmc-hs200-1_8v;
  606. no-sdio;
  607. no-sd;
  608. ctl-spec-caps = <0x308>;
  609. cap-mmc-highspeed;
  610. sunxi-power-save-mode;
  611. sunxi-dis-signal-vol-sw;
  612. mmc-bootpart-noacc;
  613. max-frequency = <150000000>;
  614. /*vmmc-supply = <&reg_dcdc1>;*/
  615. /*emmc io vol 3.3v*/
  616. /*vqmmc-supply = <&reg_aldo1>;*/
  617. /*emmc io vol 1.8v*/
  618. /*vqmmc-supply = <&reg_eldo1>;*/
  619. status = "disabled";
  620. };
  621. &sdc0 {
  622. bus-width = <4>;
  623. cd-gpios = <&pio PF 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* bingpi-m2 */
  624. /*non-removable;*/
  625. /*broken-cd;*/
  626. /*cd-inverted;*/
  627. /*data3-detect;*/
  628. /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/
  629. /*cd-used-24M;*/
  630. cap-sd-highspeed;
  631. /*sd-uhs-sdr50;*/
  632. /*sd-uhs-ddr50;*/
  633. /*sd-uhs-sdr104;*/
  634. no-sdio;
  635. no-mmc;
  636. sunxi-power-save-mode;
  637. /*sunxi-dis-signal-vol-sw;*/
  638. max-frequency = <150000000>;
  639. ctl-spec-caps = <0x8>;
  640. /*vmmc-supply = <&reg_dcdc1>;*/
  641. /*vqmmc33sw-supply = <&reg_dcdc1>;*/
  642. /*vdmmc33sw-supply = <&reg_dcdc1>;*/
  643. /*vqmmc18sw-supply = <&reg_eldo1>;*/
  644. /*vdmmc18sw-supply = <&reg_eldo1>;*/
  645. status = "disabled";
  646. };
  647. &sdc1 {
  648. bus-width = <4>;
  649. no-mmc;
  650. no-sd;
  651. cap-sd-highspeed;
  652. /*sd-uhs-sdr12*/
  653. /*sd-uhs-sdr25;*/
  654. /*sd-uhs-sdr50;*/
  655. /*sd-uhs-ddr50;*/
  656. /*sd-uhs-sdr104;*/
  657. /*sunxi-power-save-mode;*/
  658. /*sunxi-dis-signal-vol-sw;*/
  659. cap-sdio-irq;
  660. keep-power-in-suspend;
  661. ignore-pm-notify;
  662. max-frequency = <150000000>;
  663. ctl-spec-caps = <0x8>;
  664. status = "disabled";
  665. };
  666. /*
  667. tvd configuration
  668. used (create device, 0: do not create device, 1: create device)
  669. agc_auto_enable (0: agc manual mode,agc_manual_value is valid; 1: agc auto mode)
  670. agc_manual_value (agc manual value, default value is 64)
  671. cagc_enable (cagc 0: disable, 1: enable)
  672. fliter_used (3d fliter 0: disable, 1: enable)
  673. support two PMU power (tvd_power0, tvd_power1)
  674. support two GPIO power (tvd_gpio0, tvd_gpio1)
  675. NOTICE: If tvd need pmu power or gpio power,params need be configured under [tvd]
  676. tvd_sw (the switch of all tvd driver.)
  677. tvd_interface (0: cvbs, 1: ypbpr,)
  678. tvd_format (0:TVD_PL_YUV420 , 1: MB_YUV420, 2: TVD_PL_YUV422)
  679. tvd_system (0:ntsc, 1:pal)
  680. tvd_row (total row number in multi channel mode 1-2)
  681. tvd_column (total column number in multi channel mode 1-2)
  682. tvd_channelx_en (0:disable, 1~4:position in multi channel mode,In single channel
  683. mode,mean enable)
  684. tvd_row*tvd_column is the total tvd channel number to be used in multichannel mode
  685. +--------------------+--------------------+
  686. | | |
  687. | | |
  688. | 1 | 2 |
  689. | | |
  690. | | |
  691. +--------------------+--------------------+
  692. | | |
  693. | | |
  694. | 3 | 4 |
  695. | | |
  696. | | |
  697. +--------------------+--------------------+
  698. */
  699. &tvd {
  700. tvd_sw = <1>;
  701. tvd_interface = <0>;
  702. tvd_format = <0>;
  703. tvd_system = <1>;
  704. tvd_row = <1>;
  705. tvd_column = <1>;
  706. tvd_channel0_en = <1>;
  707. tvd_channel1_en = <0>;
  708. tvd_channel2_en = <0>;
  709. tvd_channel3_en = <0>;
  710. /*tvd_gpio0 = <&pio PD 22 GPIO_ACTIVE_HIGH>;*/
  711. /*tvd_gpio1 = <&pio PD 23 GPIO_ACTIVE_HIGH>;*/
  712. /*tvd_gpio2 = <&pio PD 24 GPIO_ACTIVE_HIGH>;*/
  713. /* dc1sw-supply = <&reg_dc1sw>;*/
  714. /* eldo3-supply = <&reg_eldo3>;*/
  715. /*tvd_power0 = "dc1sw"*/
  716. /*tvd_power1 = "eldo3"*/
  717. };
  718. &tvd0 {
  719. used = <1>;
  720. agc_auto_enable = <1>;
  721. agc_manual_value = <64>;
  722. cagc_enable = <1>;
  723. fliter_used = <1>;
  724. };
  725. /* Audio Driver modules */
  726. &sunxi_rpaf_dsp0 {
  727. status = "disabled";
  728. };
  729. /* if audiocodec is used, sdc0 and uart0 should be closed to enable PA. */
  730. &codec {
  731. /* MIC and headphone gain setting */
  732. mic1gain = <0x1F>;
  733. mic2gain = <0x1F>;
  734. mic3gain = <0x1F>;
  735. /* ADC/DAC DRC/HPF func enabled */
  736. /* 0x1:DAP_HP_EN; 0x2:DAP_SPK_EN; 0x3:DAP_HPSPK_EN */
  737. adcdrc_cfg = <0x0>;
  738. adchpf_cfg = <0x1>;
  739. dacdrc_cfg = <0x0>;
  740. dachpf_cfg = <0x0>;
  741. /* Volume about */
  742. digital_vol = <0x00>;
  743. lineout_vol = <0x1a>;
  744. headphonegain = <0x03>;
  745. /* Pa enabled about */
  746. pa_level = <0x01>;
  747. pa_pwr_level = <0x01>;
  748. pa_msleep_time = <0x78>;
  749. /* gpio-spk = <&pio PF 2 GPIO_ACTIVE_HIGH>;*/
  750. /* gpio-spk-pwr = <&pio PF 4 GPIO_ACTIVE_HIGH>; */
  751. /* CMA config about */
  752. playback_cma = <128>;
  753. capture_cma = <256>;
  754. /* regulator about */
  755. /* avcc-supply = <&reg_aldo1>; */
  756. /* hpvcc-supply = <&reg_eldo1>; */
  757. status = "okay";
  758. };
  759. &sndcodec {
  760. hp_detect_case = <0x00>;
  761. jack_enable = <0x01>;
  762. status = "okay";
  763. };
  764. &dummy_cpudai {
  765. status = "okay";
  766. };
  767. &dmic {
  768. pinctrl-names = "default","sleep";
  769. pinctrl-0 = <&dmic_pins_a>;
  770. pinctrl-1 = <&dmic_pins_b>;
  771. status = "disabled";
  772. };
  773. &dmic_codec {
  774. status = "okay";
  775. };
  776. &sounddmic {
  777. status = "okay";
  778. };
  779. /*-----------------------------------------------------------------------------
  780. * pcm_lrck_period 16/32/64/128/256
  781. * slot_width_select 16bits/20bits/24bits/32bits
  782. * frametype 0 --> short frame = 1 clock width;
  783. * 1 --> long frame = 2 clock width;
  784. * tdm_config 0 --> pcm
  785. * 1 --> i2s
  786. * mclk_div 0 --> not output
  787. * 1/2/4/6/8/12/16/24/32/48/64/96/128/176/192
  788. * (set mclk as external codec clk source, freq is pll_audio/mclk_div)
  789. * pinctrl_used 0 --> I2S/PCM use for internal
  790. * 1 --> I2S/PCM use for external audio
  791. * daudio_type: 0 --> external audio type
  792. *---------------------------------------------------------------------------*/
  793. &daudio0 {
  794. mclk_div = <0x01>;
  795. frametype = <0x00>;
  796. tdm_config = <0x01>;
  797. sign_extend = <0x00>;
  798. msb_lsb_first = <0x00>;
  799. pcm_lrck_period = <0x80>;
  800. slot_width_select = <0x20>;
  801. pinctrl-names = "default", "sleep";
  802. pinctrl-0 = <&daudio0_pins_a>;
  803. pinctrl-1 = <&daudio0_pins_b>;
  804. pinctrl_used = <0x0>;
  805. status = "disabled";
  806. };
  807. /*-----------------------------------------------------------------------------
  808. * simple-audio-card,name name of sound card, e.g.
  809. * "snddaudio0" --> use for external audio
  810. * sound-dai "snd-soc-dummy" --> use for I2S
  811. * "ac108" --> use for external audio of ac108
  812. *---------------------------------------------------------------------------*/
  813. &sounddaudio0 {
  814. /* simple-audio-card,format = "i2s"; */
  815. /* simple-audio-card,frame-master = <&daudio0_master>; */
  816. /* simple-audio-card,bitclock-master = <&daudio0_master>; */
  817. /* simple-audio-card,bitclock-inversion; */
  818. /* simple-audio-card,frame-inversion; */
  819. status = "disabled";
  820. daudio0_master: simple-audio-card,codec {
  821. /* sound-dai = <&ac108>; */
  822. };
  823. };
  824. &daudio1 {
  825. mclk_div = <0x01>;
  826. frametype = <0x00>;
  827. tdm_config = <0x01>;
  828. sign_extend = <0x00>;
  829. msb_lsb_first = <0x00>;
  830. pcm_lrck_period = <0x80>;
  831. slot_width_select = <0x20>;
  832. pinctrl-names = "default", "sleep";
  833. pinctrl-0 = <&daudio1_pins_a>;
  834. pinctrl-1 = <&daudio1_pins_b>;
  835. pinctrl_used = <0x0>;
  836. status = "disabled";
  837. };
  838. &sounddaudio1 {
  839. status = "disabled";
  840. daudio1_master: simple-audio-card,codec {
  841. /* sound-dai = <&ac108>; */
  842. };
  843. };
  844. &daudio2 {
  845. mclk_div = <0x01>;
  846. frametype = <0x00>;
  847. tdm_config = <0x01>;
  848. sign_extend = <0x00>;
  849. tx_data_mode = <0x00>;
  850. rx_data_mode = <0x00>;
  851. msb_lsb_first = <0x00>;
  852. pcm_lrck_period = <0x80>;
  853. slot_width_select = <0x20>;
  854. asrc_function_en = <0x00>;
  855. pinctrl-names = "default", "sleep";
  856. pinctrl-0 = <&daudio2_pins_a &daudio2_pins_b &daudio2_pins_c>;
  857. pinctrl-1 = <&daudio2_pins_d>;
  858. pinctrl_used = <0x1>;
  859. daudio_type = <0x0>;
  860. status = "disabled";
  861. };
  862. &sounddaudio2 {
  863. status = "disabled"; /* mangopi */
  864. daudio2_master: simple-audio-card,codec {
  865. /* sound-dai = <&ac108>; */
  866. };
  867. };
  868. &spdif {
  869. pinctrl-names = "default","sleep";
  870. pinctrl-0 = <&spdif_pins_a>;
  871. pinctrl-1 = <&spdif_pins_b>;
  872. status = "okay";
  873. };
  874. &soundspdif {
  875. status = "okay";
  876. };
  877. /*
  878. *usb_port_type: usb mode. 0-device, 1-host, 2-otg.
  879. *usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-id/dpdm detect.
  880. *usb_detect_mode: 0-thread scan, 1-id gpio interrupt.
  881. *usb_id_gpio: gpio for id detect.
  882. *usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl";
  883. *usb_wakeup_suspend:0-SUPER_STANDBY, 1-USB_STANDBY.
  884. */
  885. &usbc0 {
  886. device_type = "usbc0";
  887. usb_port_type = <0x0>;
  888. usb_detect_type = <0x0>;
  889. /* usb_detect_mode = <0>;
  890. usb_id_gpio = <&pio PB 8 GPIO_ACTIVE_HIGH>;
  891. enable-active-high;
  892. usb_det_vbus_gpio = <&pio PB 9 GPIO_ACTIVE_HIGH>; */
  893. usb_wakeup_suspend = <0>;
  894. usb_serial_unique = <0>;
  895. usb_serial_number = "20080411";
  896. rndis_wceis = <1>;
  897. status = "okay";
  898. };
  899. &ehci0 {
  900. drvvbus-supply = <&reg_usb1_vbus>;
  901. };
  902. &ohci0 {
  903. drvvbus-supply = <&reg_usb1_vbus>;
  904. };
  905. &usbc1 {
  906. device_type = "usbc1";
  907. usb_port_type = <0x01>;
  908. usb_detect_type = <0x1>;
  909. usb_regulator_io = "nocare";
  910. usb_wakeup_suspend = <0>;
  911. status = "okay";
  912. };
  913. &ehci1 {
  914. status = "okay";
  915. };
  916. &ohci1 {
  917. status = "okay";
  918. };
  919. &twi0 {
  920. clock-frequency = <400000>;
  921. pinctrl-0 = <&twi0_pins_a>;
  922. pinctrl-1 = <&twi0_pins_b>;
  923. pinctrl-names = "default", "sleep";
  924. status = "disabled";
  925. eeprom@50 {
  926. compatible = "atmel,24c16";
  927. reg = <0x50>;
  928. status = "disabled";
  929. };
  930. };
  931. &twi1 {
  932. clock-frequency = <400000>;
  933. pinctrl-0 = <&twi1_pins_a>;
  934. pinctrl-1 = <&twi1_pins_b>;
  935. pinctrl-names = "default", "sleep";
  936. status = "disabled";
  937. };
  938. &twi2 {
  939. clock-frequency = <400000>;
  940. pinctrl-0 = <&twi2_pins_a>;
  941. pinctrl-1 = <&twi2_pins_b>;
  942. pinctrl-names = "default", "sleep";
  943. dmas = <&dma 45>, <&dma 45>;
  944. dma-names = "tx", "rx";
  945. status = "disabled";
  946. /* pcf8574-usage:
  947. * only use gpio0~7, 0 means PP0.
  948. * pin set:
  949. * gpios = <&pcf8574 0 GPIO_ACTIVE_LOW>;
  950. * interrupt set:
  951. * interrupt-parent = <&pcf8574>;
  952. * interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
  953. */
  954. pcf8574: gpio@38 {
  955. compatible = "nxp,pcf8574";
  956. reg = <0x38>;
  957. gpio_base = <2020>;
  958. gpio-controller;
  959. #gpio-cells = <2>;
  960. interrupt-controller;
  961. #interrupt-cells = <2>;
  962. interrupt-parent = <&pio>;
  963. interrupts = <PB 2 IRQ_TYPE_EDGE_FALLING>;
  964. status = "disabled";
  965. };
  966. ctp@14 {
  967. compatible = "allwinner,goodix";
  968. device_type = "ctp";
  969. reg = <0x14>;
  970. status = "okay";
  971. ctp_name = "gt9xxnew_ts";
  972. ctp_twi_id = <0x2>;
  973. ctp_twi_addr = <0x14>;
  974. ctp_screen_max_x = <0x320>;
  975. ctp_screen_max_y = <0x1e0>;
  976. ctp_revert_x_flag = <0x0>;
  977. ctp_revert_y_flag = <0x0>;
  978. ctp_exchange_x_y_flag = <0x0>;
  979. //type 1(mipi)
  980. /*
  981. ctp_screen_max_x = <0x320>;
  982. ctp_screen_max_y = <0x500>;
  983. ctp_revert_x_flag = <0x1>;
  984. ctp_revert_y_flag = <0x0>;
  985. ctp_exchange_x_y_flag = <0x1>;
  986. */
  987. //type 2(mipi)
  988. /*
  989. ctp_screen_max_x = <0x320>;
  990. ctp_screen_max_y = <0x500>;
  991. ctp_revert_x_flag = <0x0>;
  992. ctp_revert_y_flag = <0x1>;
  993. ctp_exchange_x_y_flag = <0x1>;
  994. */
  995. ctp_int_port = <&pio PD 22 GPIO_ACTIVE_HIGH>;
  996. ctp_wakeup = <&pio PG 10 GPIO_ACTIVE_HIGH>;
  997. /*ctp-supply = <&reg_aldo2>;*/
  998. /*ctp_power_ldo = <&reg_aldo2>;*/
  999. /*ctp_power_ldo_vol = <3300>;*/
  1000. };
  1001. };
  1002. &twi3 {
  1003. clock-frequency = <400000>;
  1004. pinctrl-0 = <&twi3_pins_a>;
  1005. pinctrl-1 = <&twi3_pins_b>;
  1006. pinctrl-names = "default", "sleep";
  1007. status = "disabled";
  1008. };
  1009. &gmac0 {
  1010. phy-mode = "rmii";
  1011. use_ephy25m = <1>;
  1012. pinctrl-0 = <&gmac_pins_a>;
  1013. pinctrl-1 = <&gmac_pins_b>;
  1014. pinctrl-names = "default", "sleep";
  1015. phy-rst = <&pio PG 6 GPIO_ACTIVE_HIGH>;
  1016. tx-delay = <7>; /*2~4*/
  1017. rx-delay = <31>;
  1018. status = "okay";
  1019. };
  1020. &spi0 {
  1021. clock-frequency = <100000000>;
  1022. pinctrl-0 = <&spi0_pins_a &spi0_pins_b>;
  1023. pinctrl-1 = <&spi0_pins_c>;
  1024. pinctrl-names = "default", "sleep";
  1025. /*spi-supply = <&reg_dcdc1>;*/
  1026. spi_slave_mode = <0>;
  1027. spi0_cs_number = <1>;
  1028. spi0_cs_bitmap = <1>;
  1029. status = "okay";
  1030. spi-nand@0 {
  1031. compatible = "spi-nand";
  1032. spi-max-frequency=<100000000>;
  1033. reg = <0x0>;
  1034. spi-rx-bus-width=<0x01>;
  1035. spi-tx-bus-width=<0x01>;
  1036. status="okay";
  1037. };
  1038. spi-nor@0 {
  1039. compatible = "jedec,spi-nor";
  1040. spi-max-frequency=<30000000>;
  1041. reg = <0x0>;
  1042. spi-rx-bus-width=<0x01>;
  1043. spi-tx-bus-width=<0x01>;
  1044. status="disabled";
  1045. };
  1046. };
  1047. &spi1 {
  1048. clock-frequency = <100000000>;
  1049. pinctrl-0 = <&spi1_pins_a &spi1_pins_b>;
  1050. pinctrl-1 = <&spi1_pins_c>;
  1051. pinctrl-names = "default", "sleep";
  1052. spi_slave_mode = <0>;
  1053. status = "okay";
  1054. spi_board1@0 {
  1055. device_type = "spi_board1";
  1056. compatible = "rohm,dh2228fv";
  1057. spi-max-frequency = <0x5f5e100>;
  1058. reg = <0x0>;
  1059. spi-rx-bus-width = <0x4>;
  1060. spi-tx-bus-width = <0x4>;
  1061. status = "disabled";
  1062. };
  1063. st7789v@0{
  1064. status = "okay";
  1065. compatible ="sitronix,st7789v";
  1066. reg = <0>;
  1067. spi-max-frequency = <6000000>;
  1068. rotate = <0>;
  1069. spi-cpol;
  1070. spi-cpha;
  1071. rgb;
  1072. fps = <60>;
  1073. buswidth = <8>;
  1074. reset-gpios = <&pio PD 0 GPIO_ACTIVE_LOW>;
  1075. dc-gpios = <&pio PD 1 GPIO_ACTIVE_LOW>;
  1076. // led-gpios = <&pio PE 8 GPIO_ACTIVE_HIGH>;
  1077. debug = <0>;
  1078. };
  1079. };
  1080. &ledc {
  1081. pinctrl-names = "default", "sleep";
  1082. pinctrl-0 = <&ledc_pins_a>;
  1083. pinctrl-1 = <&ledc_pins_b>;
  1084. led_count = <12>;
  1085. output_mode = "GRB";
  1086. reset_ns = <84>;
  1087. t1h_ns = <800>;
  1088. t1l_ns = <320>;
  1089. t0h_ns = <300>;
  1090. t0l_ns = <800>;
  1091. wait_time0_ns = <84>;
  1092. wait_time1_ns = <84>;
  1093. wait_data_time_ns = <600000>;
  1094. status = "disabled";
  1095. };
  1096. &keyboard0 {
  1097. key0 = <210 0x160>;
  1098. wakeup-source;
  1099. status = "disabled";
  1100. };
  1101. /*----------------------------------------------------------------------------------
  1102. disp init configuration
  1103. disp_mode (0:screen0<screen0,fb0>)
  1104. screenx_output_type (0:none; 1:lcd; 2:tv; 5:vdpo)
  1105. fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
  1106. fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
  1107. fb0_scaler_mode_enable(scaler mode enable, used FE)
  1108. fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
  1109. lcdx_backlight (lcd init backlight,the range:[0,256],default:197
  1110. lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
  1111. lcd0_contrast (LCD contrast, 0~100)
  1112. lcd0_saturation (LCD saturation, 0~100)
  1113. lcd0_hue (LCD hue, 0~100)
  1114. framebuffer software rotation setting:
  1115. disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y,
  1116. set fbX_height to lcd_x)
  1117. degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
  1118. degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
  1119. devX_output_type : config output type in bootGUI framework in UBOOT-2018.
  1120. (0:none; 1:lcd; 2:tv;)
  1121. devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
  1122. devX_screen_id : config display index of bootGUI framework in UBOOT-2018
  1123. devX_do_hpd : whether do hpd detectation or not in UBOOT-2018
  1124. chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6
  1125. channel, 1:dual display with 4 channel in main display and 2 channel in second
  1126. display, 2:dual display with 3 channel in main display and 3 channel in second
  1127. in display.
  1128. ----------------------------------------------------------------------------------*/
  1129. &disp {
  1130. disp_init_enable = <1>;
  1131. disp_mode = <0>;
  1132. screen0_output_type = <1>;
  1133. screen0_output_mode = <4>;
  1134. screen1_output_type = <3>;
  1135. screen1_output_mode = <4>;
  1136. screen1_output_format = <0>;
  1137. screen1_output_bits = <0>;
  1138. screen1_output_eotf = <4>;
  1139. screen1_output_cs = <257>;
  1140. screen1_output_range = <2>;
  1141. screen1_output_scan = <0>;
  1142. screen1_output_aspect_ratio = <8>;
  1143. dev0_output_type = <1>;
  1144. dev0_output_mode = <4>;
  1145. dev0_screen_id = <0>;
  1146. dev0_do_hpd = <0>;
  1147. dev1_output_type = <4>;
  1148. dev1_output_mode = <10>;
  1149. dev1_screen_id = <1>;
  1150. dev1_do_hpd = <1>;
  1151. def_output_dev = <0>;
  1152. disp_rotation_used = <1>;
  1153. degree0 = <0>;
  1154. fb0_format = <0>;
  1155. fb0_buffer_num = <1>;
  1156. //fb0_width = <800>;
  1157. //fb0_height = <480>;
  1158. fb1_format = <0>;
  1159. fb1_width = <0>;
  1160. fb1_height = <0>;
  1161. chn_cfg_mode = <1>;
  1162. disp_para_zone = <1>;
  1163. //dc1sw-supply = <&reg_dc1sw>;
  1164. //eldo3-supply = <&reg_eldo3>;
  1165. //dcdc1-supply = <&reg_dcdc1>;
  1166. };
  1167. /*----------------------------------------------------------------------------------
  1168. ;lcd0 configuration
  1169. ;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
  1170. ;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
  1171. ;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree
  1172. ;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
  1173. ;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
  1174. ;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
  1175. ; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
  1176. ;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
  1177. ;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode
  1178. ;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
  1179. ;lcd_x: lcd horizontal resolution
  1180. ;lcd_y: lcd vertical resolution
  1181. ;lcd_width: width of lcd in mm
  1182. ;lcd_height: height of lcd in mm
  1183. ;lcd_dclk_freq: in MHZ unit
  1184. ;lcd_pwm_freq: in HZ unit
  1185. ;lcd_pwm_pol: lcd backlight PWM polarity
  1186. ;lcd_pwm_max_limit lcd backlight PWM max limit(<=255)
  1187. ;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel);
  1188. ;lcd_ht: hsync total cycle(pixel)
  1189. ;lcd_vbp: vsync back porch(line) + vysnc plus width(line)
  1190. ;lcd_vt: vysnc total cycle(line)
  1191. ;lcd_hspw: hsync plus width(pixel)
  1192. ;lcd_vspw: vysnc plus width(pixel)
  1193. ;lcd_lvds_if: 0:single link; 1:dual link
  1194. ;lcd_lvds_colordepth: 0:8bit; 1:6bit
  1195. ;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode
  1196. ;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
  1197. ;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
  1198. ; 8~11bit:dclk phase; 12~15bit:de phase)
  1199. ;lcd_gamma_en lcd gamma correction enable
  1200. ;lcd_bright_curve_en lcd bright curve correction enable
  1201. ;lcd_cmap_en lcd color map function enable
  1202. ;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
  1203. ;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10;
  1204. ; decrease it while lcd is not bright enough; increase while lcd is too bright
  1205. ;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch)
  1206. ;Pin setting for special function ie.LVDS, RGB data or vsync
  1207. ; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
  1208. ;Pin setting for gpio:
  1209. ; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level>
  1210. ;Pin setting for backlight enable pin
  1211. ; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level>
  1212. ;fsync setting, pulse to csi
  1213. ;lcd_fsync_en (0:disable fsync,1:enable)
  1214. ;lcd_fsync_act_time (active time of fsync, unit:pixel)
  1215. ;lcd_fsync_dis_time (disactive time of fsync, unit:pixel)
  1216. ;lcd_fsync_pol (0:positive;1:negative)
  1217. ;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
  1218. pull up or pull down(default 0), driver level(default 1), data>
  1219. ;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead
  1220. ;For rgb24: use rgb24_pins_a and rgb24_pins_b instead
  1221. ;For lvds1: use lvds1_pins_a and lvds1_pins_b instead
  1222. ;For lvds0: use lvds0_pins_a and lvds0_pins_b instead
  1223. ;----------------------------------------------------------------------------------*/
  1224. // 480x272 RGB LCD
  1225. /*
  1226. &lcd0 {
  1227. lcd_used = <1>;
  1228. lcd_driver_name = "default_lcd";
  1229. lcd_backlight = <50>;
  1230. lcd_if = <0>;
  1231. lcd_x = <480>;
  1232. lcd_y = <272>;
  1233. lcd_width = <95>;
  1234. lcd_height = <54>;
  1235. lcd_dclk_freq = <9>;
  1236. lcd_pwm_used = <0>;
  1237. lcd_pwm_ch = <7>;
  1238. lcd_pwm_freq = <50000>;
  1239. lcd_pwm_pol = <1>;
  1240. lcd_hbp = <43>;
  1241. lcd_ht = <525>;
  1242. lcd_hspw = <41>;
  1243. lcd_vbp = <12>;
  1244. lcd_vt = <286>;
  1245. lcd_vspw = <10>;
  1246. lcd_lvds_if = <0>;
  1247. lcd_lvds_colordepth = <1>;
  1248. lcd_lvds_mode = <0>;
  1249. lcd_frm = <1>;
  1250. lcd_io_phase = <0x0000>;
  1251. lcd_gamma_en = <0>;
  1252. lcd_bright_curve_en = <0>;
  1253. lcd_cmap_en = <0>;
  1254. deu_mode = <0>;
  1255. lcdgamma4iep = <22>;
  1256. smart_color = <90>;
  1257. pinctrl-0 = <&rgb18_pins_a>;
  1258. pinctrl-1 = <&rgb18_pins_b>;
  1259. };
  1260. */
  1261. // 800x480 RGB LCD
  1262. &lcd0 {
  1263. lcd_used = <1>;
  1264. lcd_driver_name = "default_lcd";
  1265. lcd_backlight = <50>;
  1266. lcd_if = <0>;
  1267. lcd_x = <800>;
  1268. lcd_y = <480>;
  1269. lcd_width = <95>;
  1270. lcd_height = <54>;
  1271. lcd_dclk_freq = <33>;
  1272. lcd_pwm_used = <0>;
  1273. lcd_pwm_ch = <7>;
  1274. lcd_pwm_freq = <50000>;
  1275. lcd_pwm_pol = <1>;
  1276. lcd_hbp = <41>;
  1277. lcd_ht = <928>;
  1278. lcd_hspw = <2>;
  1279. lcd_vbp = <14>;
  1280. lcd_vt = <525>;
  1281. lcd_vspw = <2>;
  1282. lcd_lvds_if = <0>;
  1283. lcd_lvds_colordepth = <1>;
  1284. lcd_lvds_mode = <0>;
  1285. lcd_frm = <1>;
  1286. lcd_io_phase = <0x0000>;
  1287. lcd_gamma_en = <0>;
  1288. lcd_bright_curve_en = <0>;
  1289. lcd_cmap_en = <0>;
  1290. deu_mode = <0>;
  1291. lcdgamma4iep = <22>;
  1292. smart_color = <90>;
  1293. pinctrl-0 = <&rgb18_pins_a>;
  1294. pinctrl-1 = <&rgb18_pins_b>;
  1295. };
  1296. // 1024x600 RGB LCD
  1297. /*
  1298. &lcd0 {
  1299. lcd_used = <1>;
  1300. lcd_driver_name = "default_lcd";
  1301. lcd_backlight = <50>;
  1302. lcd_if = <0>;
  1303. lcd_x = <1024>;
  1304. lcd_y = <600>;
  1305. lcd_width = <95>;
  1306. lcd_height = <54>;
  1307. lcd_dclk_freq = <51>;
  1308. lcd_pwm_used = <0>;
  1309. lcd_pwm_ch = <7>;
  1310. lcd_pwm_freq = <50000>;
  1311. lcd_pwm_pol = <1>;
  1312. lcd_hbp = <160>;
  1313. lcd_ht = <1344>;
  1314. lcd_hspw = <20>;
  1315. lcd_vbp = <23>;
  1316. lcd_vt = <635>;
  1317. lcd_vspw = <3>;
  1318. lcd_lvds_if = <0>;
  1319. lcd_lvds_colordepth = <1>;
  1320. lcd_lvds_mode = <0>;
  1321. lcd_frm = <1>;
  1322. lcd_io_phase = <0x0000>;
  1323. lcd_gamma_en = <0>;
  1324. lcd_bright_curve_en = <0>;
  1325. lcd_cmap_en = <0>;
  1326. deu_mode = <0>;
  1327. lcdgamma4iep = <22>;
  1328. smart_color = <90>;
  1329. pinctrl-0 = <&rgb18_pins_a>;
  1330. pinctrl-1 = <&rgb18_pins_b>;
  1331. };
  1332. */
  1333. // 1280x800 MIPI LCD
  1334. /*
  1335. &lcd0 {
  1336. lcd_used = <1>;
  1337. lcd_driver_name = "he0801a068";
  1338. lcd_backlight = <50>;
  1339. lcd_if = <4>;
  1340. lcd_x = <800>;
  1341. lcd_y = <1280>;
  1342. lcd_width = <52>;
  1343. lcd_height = <52>;
  1344. lcd_dclk_freq = <68>;
  1345. lcd_pwm_used = <1>;
  1346. lcd_pwm_ch = <7>;
  1347. lcd_pwm_freq = <50000>;
  1348. lcd_pwm_pol = <1>;
  1349. lcd_pwm_max_limit = <255>;
  1350. lcd_hbp = <40>;
  1351. lcd_ht = <860>;
  1352. lcd_hspw = <20>;
  1353. lcd_vbp = <12>;
  1354. lcd_vt = <1322>;
  1355. lcd_vspw = <4>;
  1356. lcd_dsi_lane = <4>;
  1357. lcd_dsi_if = <0>;
  1358. lcd_dsi_format = <0>;
  1359. lcd_dsi_te = <0>;
  1360. lcd_frm = <0>;
  1361. lcd_gamma_en = <0>;
  1362. lcd_cmap_en = <0>;
  1363. pinctrl-0 = <&dsi4lane_pins_a>;
  1364. pinctrl-1 = <&dsi4lane_pins_b>;
  1365. //lcd_gpio_0 = <&pio PD 20 1 0 3 1>;
  1366. };
  1367. */
  1368. &pwm0 {
  1369. pinctrl-names = "active", "sleep";
  1370. pinctrl-0 = <&pwm0_pin_a>;
  1371. pinctrl-1 = <&pwm0_pin_b>;
  1372. status = "disabled";
  1373. };
  1374. &pwm2 {
  1375. pinctrl-names = "active", "sleep";
  1376. pinctrl-0 = <&pwm2_pin_a>;
  1377. pinctrl-1 = <&pwm2_pin_b>;
  1378. status = "disabled";
  1379. };
  1380. &pwm7 {
  1381. pinctrl-names = "active", "sleep";
  1382. pinctrl-0 = <&pwm7_pin_a>;
  1383. pinctrl-1 = <&pwm7_pin_b>;
  1384. status = "disabled";
  1385. };
  1386. &rtp {
  1387. allwinner,tp-sensitive-adjust = <0xf>;
  1388. allwinner,filter-type = <0x1>;
  1389. allwinner,ts-attached;
  1390. status = "okay";
  1391. };
  1392. &tpadc {
  1393. key_cnt = <5>;
  1394. key1 = <420 115>;
  1395. key2 = <870 114>;
  1396. key3 = <1290 119>;
  1397. key4 = <1630 373>;
  1398. key5 = <1950 28>;
  1399. status = "disabled";
  1400. };
  1401. &gpadc {
  1402. channel_num = <1>;
  1403. channel_select = <0x01>;
  1404. channel_data_select = <0>;
  1405. channel_compare_select = <0x01>;
  1406. channel_cld_select = <0x01>;
  1407. channel_chd_select = <0>;
  1408. channel0_compare_lowdata = <1600000>;
  1409. channel0_compare_higdata = <1200000>;
  1410. channel1_compare_lowdata = <460000>;
  1411. channel1_compare_higdata = <1200000>;
  1412. key_cnt = <5>;
  1413. key0_vol = <210>;
  1414. key0_val = <0x19c>;
  1415. key1_vol = <410>;
  1416. key1_val = <0x197>;
  1417. key2_vol = <590>;
  1418. key2_val = <158>;
  1419. key3_vol = <750>;
  1420. key3_val = <28>;
  1421. key4_vol = <880>;
  1422. key4_val = <28>;
  1423. status = "disabled";
  1424. wakeup-source;
  1425. };
  1426. &s_cir0 {
  1427. pinctrl-names = "default", "sleep";
  1428. pinctrl-0 = <&s_cir0_pins_a>;
  1429. pinctrl-1 = <&s_cir0_pins_b>;
  1430. ir_protocol_used = <0>;
  1431. ir_addr_code0 = <0x0>;
  1432. status = "disabled";
  1433. };
  1434. &ir1 {
  1435. pinctrl-names = "default", "sleep";
  1436. pinctrl-0 = <&ir1_pins_a>;
  1437. pinctrl-1 = <&ir1_pins_b>;
  1438. status = "disabled";
  1439. };