drv_clk.c 2.3 KB

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  1. /*
  2. * Copyright (c) 2006-2019, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-10-26 ChenYong first version
  9. * 2020-01-08 xiangxistu add HSI configuration
  10. */
  11. #include <board.h>
  12. #include <rtthread.h>
  13. #include <stm32f4xx.h>
  14. #define DBG_TAG "board"
  15. #define DBG_LVL DBG_INFO
  16. #include <rtdbg.h>
  17. void system_clock_config(int target_freq_mhz)
  18. {
  19. RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
  20. RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
  21. /** Configure the main internal regulator output voltage
  22. */
  23. __HAL_RCC_PWR_CLK_ENABLE();
  24. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  25. /** Initializes the CPU, AHB and APB busses clocks
  26. */
  27. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  28. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  29. RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  30. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  31. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
  32. RCC_OscInitStruct.PLL.PLLM = 8;
  33. RCC_OscInitStruct.PLL.PLLN = target_freq_mhz;
  34. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  35. RCC_OscInitStruct.PLL.PLLQ = 4;
  36. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  37. {
  38. Error_Handler();
  39. }
  40. /** Initializes the CPU, AHB and APB busses clocks
  41. */
  42. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
  43. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  44. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  45. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  46. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  47. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
  48. {
  49. Error_Handler();
  50. }
  51. }
  52. int clock_information(void)
  53. {
  54. LOG_D("System Clock information");
  55. LOG_D("SYSCLK_Frequency = %d", HAL_RCC_GetSysClockFreq());
  56. LOG_D("HCLK_Frequency = %d", HAL_RCC_GetHCLKFreq());
  57. LOG_D("PCLK1_Frequency = %d", HAL_RCC_GetPCLK1Freq());
  58. LOG_D("PCLK2_Frequency = %d", HAL_RCC_GetPCLK2Freq());
  59. return RT_EOK;
  60. }
  61. INIT_BOARD_EXPORT(clock_information);
  62. void clk_init(char *clk_source, int source_freq, int target_freq)
  63. {
  64. system_clock_config(target_freq);
  65. }