SmartPDCode/truing_control/PDU-Triphasic_IO/USER/main.c

#include "gd32e23x.h"
#include "systick.h"
#include <stdio.h>
#include "main.h"
#include "Fwdgt.h"
#include "mb.h"
#include "Led.h"
#include "Key.h"
#include "cfg.h"
#include "string.h"
#include "Timer.h"
#include "Fwdgt.h"
#include "stdbool.h"
#include "At24cxx.h"
#include "Sn74hc573.h"
#include "Relay.h"
#include "ReadEeprom.h"
#include "Uart1.h"
#include "Hlw8110.h"
#include "key_io.h"
#include "board_cfg.h"
#include "Flash.h"



AC_Output_struct_Reg  			AC3PPDU_Output[Output_ChN_default + 1] = {0}; 
AC3PPDU_RELAY_Para_Reg 			AC3PPDU_RL_time[Output_ChN_default + 1] = {0};
AC3PPDU_RELAY_Para_Reg 			AC3PPDU_RL_N_time;	


static uint8_t 							AC3PPDU_SlaveAddress = 0x00;
uint16_t 										Devid_IDChalNum = 0;


bool RL_Allon_flag 																				= false;
bool RL_Alloff_flag 																			= false;
bool Start_Read_Flag 																			= false;

uint16_t 			CurrentAddr 														= 0;
uint8_t 			flash_flag = 0;
uint32_t 			AC3PPDU_Modbus_Reg[AC3PPDU_Modbus_Reg_len] = {0};
uint8_t 			AC3PPDU_active_chn;
information_t infomation;
uint32_t 			hlw8110_base[Output_ChN_default+1] = {0}; //add by liyi
uint8_t 			Wr_eeprom_cnt = 0;

uint8_t 		read_ele_flag = 0;


bool orderFlag[Output_ChN_default] ={0};

#if SUPPORT_ZERO_LINE
	bool	orderFlag_N = 0;
	uint8_t RL_N_begin_delay_flag 											= 0x0;  					// add by liyi
	uint8_t RL_N_end_delay_flag 												= 0x0;						// add by liyi
	uint8_t RL_N_ON_flag 																= 0x0;						// add by liyi
	uint8_t RL_N_OFF_flag 															= 0x0;						// add by liyi
	uint8_t RL_N_last_state															=	0x0;						// add by liyi
	uint8_t RL_N_now_state															=	0x0;						// add by liyi
	extern uint32_t 								RL_N_delay_cnt;																										// add by liyi
	extern uint32_t 								RL_N_delay_Limit;																								// add by liyi

#endif

#if SUPPORT_DETECTION
	uint8_t detection_value = 0;
#endif



uint8_t RL_begin_delay_flag[Output_ChN_default] 	= {0x00};
uint8_t RL_end_delay_flag[Output_ChN_default] 		= {0x00};
uint8_t RL_ON_flag[Output_ChN_default] 						= {0x00};
uint8_t RL_OFF_flag[Output_ChN_default] 					= {0x00};
uint8_t RL_last_state[Output_ChN_default] 				= {0x00};
uint8_t RL_now_state[Output_ChN_default] 					= {0x00};
uint8_t RL_Func_statu[Output_ChN_default+1] 			= {0x00};
uint8_t RL_All_Func 																= 0x0;
uint32_t normal_running_time = 0;




uint8_t AC3PPDU_Vmax_LTen_flag[Output_ChN_default+1] = {0x01};
uint8_t AC3PPDU_Vmin_LTen_flag[Output_ChN_default+1] = {0x01};
uint8_t AC3PPDU_Imax_LTen_flag[Output_ChN_default+1] = {0x01};
uint8_t AC3PPDU_Wmax_LTen_flag[Output_ChN_default+1] = {0x01};
uint8_t AC3PPDU_kWhmax_LTen_flag[Output_ChN_default+1] = {0x01};

uint32_t AC_BASE[4] 																		= {0};
META_DATA_S meta_data 																	= {0};
uint8_t write_kwh2Eeprom_flag 													= 0;



	uint8_t handle_status[Output_ChN_default] = {0};
	
#if SUPPORT_DOUBLE_FIRE
		uint8_t handle_detection[2] = {1,1};
#else
		uint8_t handle_detection[1] = {1};
#endif 
	#if SUPPORT_ZERO_LINE
		uint8_t handle_status_N = 0;
	#endif





extern float 										hlw8110_store[Output_ChN_default+1];
extern uint32_t 								Modbus_Wr_buff[Mb_Wcmd_Width][Mb_Wcmd_len];

extern uint32_t 								RL_delay_Limit[Output_ChN_default];


static void MODbus_CMD_New(void);
static void Fault_state_process(uint8_t ch_x);


static void break_2_boot_upgreade(void)
{
	meta_data.errno = 0;
	meta_data.operation_flag = 1;
	meta_data.recent_running_time = normal_running_time;
	flash_erase_meta();
	flash_write_meta(&meta_data);
	__disable_irq();
	//__set_FAULTMASK(1);
	NVIC_SystemReset();
}



static void app_init(META_DATA_S *meta)
{
	flash_get_meta_data(meta);
	nvic_vector_table_set(NVIC_VECTTAB_FLASH,meta->rom_addr - NVIC_VECTTAB_FLASH);
	__enable_irq();
}

static bool select_channel(uint8_t ch_x)
{
	switch(ch_x)
	{
		case 0:
		{
				SEL_0_L;
				SEL_1_L;
				SEL_2_L;
		}
			break;
		case 1:
		{
				SEL_0_H;
				SEL_1_L;
				SEL_2_L;
		}
			break;
		case 2:
		{
				SEL_0_L;
				SEL_1_H;
				SEL_2_L;
		}
			break;
		case 3:
		{
				SEL_0_H;
				SEL_1_H;
				SEL_2_L;
		}
			break;
		case 4:
		{
				SEL_0_L;
				SEL_1_L;
				SEL_2_H;
		}
			break;
		case 5:
		{
				SEL_0_H;
				SEL_1_L;
				SEL_2_H;
		}
			break;
		case 6:
		{
				SEL_0_L;
				SEL_1_H;
				SEL_2_H;
		}
			break;
		case 7:
		{
				SEL_0_H;
				SEL_1_H;
				SEL_2_H;
		}
			break;
		default:
			return false;
	}
	return true;
}

void hlw8110_init(uint8_t ch_x)
{
	if(select_channel(ch_x) == false)
		return;
	Init_HLW8110();
}
static void  check_jlink()
{
#if SUPPORT_KEY_CTRL
	uint8_t test = false;
	uint8_t rst = false;
#endif

	if(Chk_Jlink_conn() == false)
	{
#if SUPPORT_KEY_CTRL
			rst = get_rst();
			test = get_test();
	#if SUPPORT_DETECTION
			if(detection_value == 0)			// duan lu qi shi fou zai xian
			{
//				for(int i = 0; i < Output_ChN_default;i++)
//				{
//					AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
//					orderFlag[i]=true;
//				}
			}else
	#endif
			{
				if(rst != test)					//shou dong kai guan
				{
					if(rst)
					{
						for(int k = 0; k < Output_ChN_default;k++)
						{
							AC3PPDU_RL_time[k + CH1_out].LT_state &= 0xffffff7e;
							orderFlag[k]=true;
						}
					}else
					{
						for(int k = 0; k < Output_ChN_default;k++)
						{
							AC3PPDU_RL_time[k + CH1_out].LT_state &= 0xffffffbf;
							AC3PPDU_RL_time[k + CH1_out].LT_state |= 0x00000001;
							orderFlag[k]=true;
						}
					}
				}
			}
#else
	#if SUPPORT_DETECTION
		#if SUPPORT_DOUBLE_FIRE
//		if(detection_value != 0x3)
//		{
//				for(int i = 0; i < Output_ChN_default;i++)
//				{
//					AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
//					orderFlag[i]=true;
//				}		
//		}
		#else
//  		if(detection_value == 0)
//			{
//				for(int i = 0; i < Output_ChN_default;i++)
//				{
//					AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
//					orderFlag[i]=true;
//				}
//		#if SUPPORT_ZERO_LINE
//				AC3PPDU_RL_N_time.LT_state &= 0xffffff7e;
//				orderFlag_N = true;
//		#endif
//			}
		#endif
	#endif
#endif

#if SUPPORT_ZERO_LINE
		if(orderFlag_N)
		{
			RL_N_now_state = AC3PPDU_RL_N_time.LT_state & 0x00000001;
			RL_N_last_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x00000001;
			if(RL_N_now_state != RL_N_last_state)
			{
				if(RL_N_now_state > 0)
				{
					RL_N_ON_flag = 1;
					RL_N_OFF_flag = 0;
					if((AC3PPDU_RL_N_time.LT_state & 0x40) > 0)
					{
						RL_N_begin_delay_flag = 1;
						RL_N_end_delay_flag = 0;
						RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_ontime * 100;
					} else {						
						RL_N_begin_delay_flag = 0;
						RL_N_end_delay_flag = 1;
						RL_N_delay_Limit = 0;
					}
				}else
				{
					RL_N_ON_flag = 0;					
					RL_N_OFF_flag = 1;			// Ch N close flag
					if((AC3PPDU_RL_N_time.LT_state & 0x80) > 0)
					{
							RL_N_begin_delay_flag = 1;
							RL_N_end_delay_flag = 0;
							RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_offtime * 100;				
					}else
					{
							RL_N_begin_delay_flag = 0;
							RL_N_end_delay_flag = 1;
							RL_N_delay_Limit = 0;						
					}
				}
			}else
			{
					RL_N_delay_Limit = 0;
					RL_N_begin_delay_flag = 0;
					RL_N_end_delay_flag = 0;
					RL_N_ON_flag= 0;
					RL_N_OFF_flag = 0;				
			}
			orderFlag_N = false;
			AC3PPDU_RL_N_time.LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr];
		}	
#endif
			for(int k = 0;k < Output_ChN_default;k++)
			{
				if(orderFlag[k])
				{
					RL_now_state[k] 	= AC3PPDU_RL_time[k + CH1_out].LT_state 							& 0x00000001;
					RL_last_state[k] 	= AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + k] 			& 0x00000001;
					if(RL_now_state[k] != RL_last_state[k])
					{
						if(RL_now_state[k] > 0)
						{
							RL_ON_flag[k] 	= 1;
							RL_OFF_flag[k] 	= 0;
							if((AC3PPDU_RL_time[k + CH1_out].LT_state & 0x40) > 0)//有延时
							{
								RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 100;//秒转成毫秒
								RL_begin_delay_flag[k] = 1;
								RL_end_delay_flag[k] = 0;
								//RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 100;//秒转成毫秒
							}else//无延时
							{
								RL_begin_delay_flag[k] = 0;
								RL_end_delay_flag[k] = 1;
								RL_delay_Limit[k] = 0;
							}								
						}else
						{
							RL_OFF_flag[k] = 1;
							RL_ON_flag[k] = 0;
							if((AC3PPDU_RL_time[k + CH1_out].LT_state & 0x80) > 0)//有延时
							{
								RL_begin_delay_flag[k] 	= 1;
								RL_end_delay_flag[k] 		= 0;
								RL_delay_Limit[k] 			= AC3PPDU_RL_time[k + CH1_out].RL_offtime * 100;//秒转成毫秒
							}else//无延时
							{
								RL_begin_delay_flag[k] = 0;
								RL_end_delay_flag[k] = 1;
							}				
						}
					}else{
						RL_delay_Limit[k] = 0;
						RL_begin_delay_flag[k] = 0;
						RL_end_delay_flag[k] = 0;
						RL_ON_flag[k] = 0;
						RL_OFF_flag[k] = 0;
					
					}
					orderFlag[k]=false;
				}
				AC3PPDU_RL_time[k + CH1_out].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + k];
			}
			
#if SUPPORT_ZERO_LINE
			if(RL_N_end_delay_flag > 0){
				RL_N_begin_delay_flag = 0;
				RL_N_end_delay_flag = 0;	
				if(RL_N_ON_flag > 0){
						DB_Out4_H;
						RL_N_ON_flag = 0;
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] = AC3PPDU_RL_N_time.LT_state | 0x00000001;
				}else if(RL_N_OFF_flag > 0)
				{
						DB_Out4_L;
						RL_N_OFF_flag = 0;
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] = AC3PPDU_RL_N_time.LT_state & 0xfffffffe;
				}else{
				}		
				BUFF_Data;
				LOCK_Data;					
			}
#endif
			for(int i = 0;i < Output_ChN_default;i++)
			{
				if(RL_end_delay_flag[i] > 0)
				{
					RL_begin_delay_flag[i] 	= 0;
					RL_end_delay_flag[i] 		= 0;
					if(RL_ON_flag[i] > 0)
					{
						RL_ON_flag[i] = 0;
						set_relay_state(i,1);
//						switch (i)
//						{
//							case 0:
//								DB_Out1_H;
//								break;
//							case 1:
//								DB_Out2_H;
//								break;
//							case 2:
//								DB_Out3_H;
//								break;
//							default:
//								return;
//						}
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = (AC3PPDU_RL_time[i + CH1_out].LT_state 				| 0x01);
						AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
						
					}else if(RL_OFF_flag[i] > 0)
					{
						RL_OFF_flag[i] = 0;
						set_relay_state(i,0);
//						switch (i)
//						{
//							case 0:
//								DB_Out1_L;
//								break;
//							case 1:
//								DB_Out2_L;
//								break;
//							case 2:
//								DB_Out3_L;
//								break;
//							default:
//								return;
//						}
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i]  = (AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe);
						AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)]  = AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe;					
					}else
					{
						;
					}
					BUFF_Data;
				//DelayNms(5);
					LOCK_Data;
				}
			}

			RL_Allon_flag = false;
			RL_Alloff_flag = false;		
	}
}
static void LimiT_enable_check(uint8_t ch_x,uint32_t Lt_v)
{
	uint16_t temp0 = 0;
	temp0 = Lt_v >> 1;
#if (!SUPPORT_DOUBLE_FIRE)
	if(ch_x > 3)
	{
		return;
	}
#endif
	//通道最大电压
	if((temp0 & AC3PPDU_Vmax_LT_enable) == AC3PPDU_Vmax_LT_enable)
	{
		AC3PPDU_Vmax_LTen_flag[ch_x] = 1;
	}
	else
	{
		AC3PPDU_Vmax_LTen_flag[ch_x] = 0;
	}
	//最小电压
	if((temp0 & AC3PPDU_Vmin_LT_enable) == AC3PPDU_Vmin_LT_enable)
	{
		AC3PPDU_Vmin_LTen_flag[ch_x] = 1;
	}
	else
	{
		AC3PPDU_Vmin_LTen_flag[ch_x] = 0;
	}
	//最大电流
	if((temp0 & AC3PPDU_Imax_LT_enable) == AC3PPDU_Imax_LT_enable)
	{
		AC3PPDU_Imax_LTen_flag[ch_x] = 1;
	}
	else
	{
		AC3PPDU_Imax_LTen_flag[ch_x] = 0;
	}
	//最大功率
	if((temp0 & AC3PPDU_Wmax_LT_enable) == AC3PPDU_Wmax_LT_enable)
	{
		AC3PPDU_Wmax_LTen_flag[ch_x] = 1;
	}
	else
	{
		AC3PPDU_Wmax_LTen_flag[ch_x] = 0;
	}
	//最大电量
	if((temp0 & AC3PPDU_kWhmax_LT_enable) == AC3PPDU_kWhmax_LT_enable)
	{
		AC3PPDU_kWhmax_LTen_flag[ch_x] = 1;
	}
	else
	{
		AC3PPDU_kWhmax_LTen_flag[ch_x] = 0;
	}
}

static void RL_Over_Func()
{
	
	if(RL_All_Func)
	{

		for(int i = 0; i < Output_ChN_default;i++)
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
			{
				AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
				orderFlag[i]=true;
			}
		}
		RL_All_Func = 0;
		return;
	}

	for(int i = 0; i < Output_ChN_default;i++)
	{
		if(RL_Func_statu[i+1])
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
			{
				RL_Func_statu[i+1] = 0;
				AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
				orderFlag[i]=true;
			}
			RL_Func_statu[i+1] = 0;
		}
	}
}

static void key_io_control()
{
#if SUPPORT_DETECTION
	AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = detection_value;
#endif
}



void switch_recode()
{
#if SUPPORT_DETECTION
#if SUPPORT_DETECT_REMENBER
	#if SUPPORT_DOUBLE_FIRE
	uint8_t sync_buff[PH_STEP] = {0};
	if(detection_value != 0x3)
	{
		if((detection_value & 0x1) == 0)
		{
			if(handle_detection[0] == 1)
			{
				for(int i= 0; i < PH_STEP;i++)
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
					{
						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
						AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
						orderFlag[i]=true;	
						handle_status[i+PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state &= 0xffffff7e;
						orderFlag[i+PH_STEP]=true;		
						sync_buff[i] = 1;
					}else
					{
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
						{
							handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
							AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
							orderFlag[i]=true;								
						}
					}
				}
				handle_detection[0] = 0;
			}
		}

		if((detection_value & 0x2) == 0)
		{
			if(handle_detection[1] == 1)
			{
				for(int i= 0; i < PH_STEP;i++)
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
					{
						if(sync_buff[i])
						{
						}else
						{
							handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
							AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
							orderFlag[i]=true;	
							handle_status[i+PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
							AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state &= 0xffffff7e;
							orderFlag[i+PH_STEP]=true;		
						}
					}else
					{
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
						{
							handle_status[i+PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
							AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state &= 0xffffff7e;
							orderFlag[i+PH_STEP]=true;							
						}
					}
				}
				handle_detection[1] = 0;
			}
		}		
	}else
	{
		if(handle_detection[0] == 0)
		{
			handle_detection[0] = 1;
			for(int i = 0; i < PH_STEP;i++)
			{
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0  && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
				{
					AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
					AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
					orderFlag[i]=true;
					AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= 0x40;
					AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= handle_status[i+PH_STEP];
					orderFlag[i+PH_STEP]=true;
					sync_buff[i] = 1;					
				}else
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
					{
						AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
						AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
						orderFlag[i]=true;
					}
				}
			}
		}
		if(handle_detection[1] == 0)
		{
			handle_detection[1] = 1;
			for(int i = 0; i < PH_STEP;i++)
			{
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
				{
					if(sync_buff[i])
					{
					
					}else
					{
						AC3PPDU_RL_time[i + CH1_out].LT_state |= 0x40;
						AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
						orderFlag[i]=true;
						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= 0x40;
						AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state |= handle_status[i+PH_STEP];
						orderFlag[i+PH_STEP]=true;						
					}
				}else
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
					{
						AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state |= 0x40;
						AC3PPDU_RL_time[i + CH1_out+PH_STEP].LT_state |= handle_status[i+PH_STEP];
						orderFlag[i+PH_STEP]=true;
					}					
				}
			}
		}
	}
	#else
	if(detection_value == 0)
	{
		if(handle_detection[0] == 1)
		{
			for(int i = 0; i < Output_ChN_default;i++)
			{
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
				{
					handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
					AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
					orderFlag[i]=true;
				}
			}
		#if SUPPORT_ZERO_LINE
				handle_status_N = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x1);
				AC3PPDU_RL_N_time.LT_state &= 0xffffff7e;
				orderFlag_N = true;
		#endif
			handle_detection[0] = 0;
		}
	}else
	{
		if(handle_detection[0] == 0)
		{
			for(int i = 0; i < Output_ChN_default;i++)
			{
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
				{
					uint32_t data = (AC3PPDU_RL_time[i + CH1_out].LT_state & (~0x40));
					AC3PPDU_RL_time[i + CH1_out].LT_state  = (data & 0x40);
					AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
					orderFlag[i]=true;
				}
			}
			#if SUPPORT_ZERO_LINE
					uint32_t data = (AC3PPDU_RL_N_time.LT_state & (~0x40));
					AC3PPDU_RL_N_time.LT_state  = (data & 0x40);
					AC3PPDU_RL_N_time.LT_state |= handle_status_N;
					orderFlag_N = true;
			#endif
			handle_detection[0] = 1;			
		}
	}
	#endif
#endif
#endif
}




static void read_ele(void)
{
#if SUPPORT_DOUBLE_FIRE
	static uint8_t channel = 0;
	read_Hlw8110(channel,0);
	channel ++;
	if(channel == Output_ChN_default)
	{
		channel = 0;
		//
		uint32_t _data = 0;
		_data = AC3PPDU_Output[CH1_out].AC_V > _data ? AC3PPDU_Output[CH1_out].AC_V :_data;
		_data = AC3PPDU_Output[CH2_out].AC_V > _data ? AC3PPDU_Output[CH2_out].AC_V :_data;
		_data = AC3PPDU_Output[CH3_out].AC_V > _data ? AC3PPDU_Output[CH3_out].AC_V :_data;
		_data = AC3PPDU_Output[CH4_out].AC_V > _data ? AC3PPDU_Output[CH4_out].AC_V :_data;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = _data;
		_data = 0;
		_data = AC3PPDU_Output[CH5_out].AC_V > _data ? AC3PPDU_Output[CH5_out].AC_V :_data;
		_data = AC3PPDU_Output[CH6_out].AC_V > _data ? AC3PPDU_Output[CH6_out].AC_V :_data;
		_data = AC3PPDU_Output[CH7_out].AC_V > _data ? AC3PPDU_Output[CH7_out].AC_V :_data;
		_data = AC3PPDU_Output[CH8_out].AC_V > _data ? AC3PPDU_Output[CH8_out].AC_V :_data;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = _data;
		
		_data  = AC3PPDU_Output[CH1_out].AC_I;
		_data += AC3PPDU_Output[CH2_out].AC_I;
		_data += AC3PPDU_Output[CH3_out].AC_I;
		_data += AC3PPDU_Output[CH4_out].AC_I;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = _data;
		
		_data  = AC3PPDU_Output[CH5_out].AC_I;
		_data += AC3PPDU_Output[CH6_out].AC_I;
		_data += AC3PPDU_Output[CH7_out].AC_I;
		_data += AC3PPDU_Output[CH8_out].AC_I;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = _data;	
		
		_data  = AC3PPDU_Output[CH1_out].AC_P;
		_data += AC3PPDU_Output[CH2_out].AC_P;
		_data += AC3PPDU_Output[CH3_out].AC_P;
		_data += AC3PPDU_Output[CH4_out].AC_P;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = _data;
		
		_data  = AC3PPDU_Output[CH5_out].AC_P;
		_data += AC3PPDU_Output[CH6_out].AC_P;
		_data += AC3PPDU_Output[CH7_out].AC_P;
		_data += AC3PPDU_Output[CH8_out].AC_P;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = _data;		
		
		_data  = AC3PPDU_Output[CH1_out].AC_kWh;
		_data += AC3PPDU_Output[CH2_out].AC_kWh;
		_data += AC3PPDU_Output[CH3_out].AC_kWh;
		_data += AC3PPDU_Output[CH4_out].AC_kWh;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = _data;
		
		_data  = AC3PPDU_Output[CH5_out].AC_kWh;
		_data += AC3PPDU_Output[CH6_out].AC_kWh;
		_data += AC3PPDU_Output[CH7_out].AC_kWh;
		_data += AC3PPDU_Output[CH8_out].AC_kWh;
		AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] = _data;		
			
		for(int i = 0;i < (Output_ChN_default + 1);i++)
		{
			Fault_state_process(i);
		}		
	}
	
	
#else
	static uint8_t channel = 0;
	read_Hlw8110(channel,0);
	channel ++;
	if(channel == Output_ChN_default)
	{
			channel = 0;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
			
			AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
			
			AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
			
			AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
			AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] =	hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
			AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
			for(int i = 0;i < (Output_ChN_default + 1);i++)
			{
				Fault_state_process(i);
			}		
		}
#endif
}






int main(void)
{
	
	app_init(&meta_data);
	InitSysTick();
	InitLED();
	InitKey();
	InitTimer();
	InitRelay();
	Init_74hc573();
	InitAT24Cxx();
	InitUART1(9600);
	InitCH448F();
	AC3PPDU_SlaveAddress = ReadKeyValue();
	eMBInit(MB_RTU, AC3PPDU_SlaveAddress, 0, 115200, MB_PAR_NONE);
	eMBEnable();
	key_io_init(NULL);
	AC3PPDU_active_chn = Output_ChN_default;
	for(int i = 0; i < AC3PPDU_active_chn;i++)
	{
		hlw8110_init(i);
	}

	ReadEeprom();
	
	strcpy(infomation.date,__DATE__);
	strcat(infomation.date," ");
	strcat(infomation.date,__TIME__);
	strcpy(infomation.ver,VERSION);

	Devid_IDChalNum = AC3PPDU_Device_ID;
	Devid_IDChalNum = Devid_IDChalNum << 8;
	Devid_IDChalNum += Output_ChN_default;
	AC3PPDU_Modbus_Reg[Mb_Dbuff_DevAddr] = Devid_IDChalNum;
	infomation.channels = Output_ChN_default;
	flash_get_infomation(&infomation);
	AC3PPDU_RL_time[CH_in].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_LT_ST_Addr];
	AC3PPDU_RL_time[CH_in].FT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr];
	LimiT_enable_check(CH_in,AC3PPDU_RL_time[CH_in].LT_state);
	Enable_74hc573_Output;
	//	Fault_state_Last = Fault_state_Reg;
	
	AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] = AC3PPDU_APlack_Fault + AC3PPDU_BPlack_Fault;
	AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] += AC3PPDU_CPlack_Fault;
#if SUPPORT_DETECTION
	detection_value = get_detection();
#endif

	// switch_recode();
#if SUPPORT_DETECTION
#if SUPPORT_DOUBLE_FIRE

	if(detection_value != 0x3)
	{
		if((detection_value & 0x1) == 0)
		{
			if(handle_detection[0])
			{
				for(int i = 0; i < PH_STEP; i++)
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
					{
						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
						handle_status[i + PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;
					}
				handle_detection[0] = 0;
				}
			}else
			{
				;;;
			}
		}
		if((detection_value & 0x2) == 0)
		{
			if(handle_detection[1])
			{
				for(int i = 0; i < PH_STEP; i++)
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
					{
						handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
						handle_status[i + PH_STEP] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i +PH_STEP] & 0x1);
						AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + PH_STEP] &= 0xfffffffe;						
					}
				}
			}
			handle_detection[1] = 0;
		}
	}
#else
	if(detection_value == 0)
	{
		if(handle_detection[0] == 1)
		{
			
			for(int i = 0; i < Output_ChN_default;i+=3)
			{
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+1] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+2] == 0)
				{
					handle_status[i  ] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
					handle_status[i+1] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + 1] & 0x1);
					handle_status[i+2] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i + 2] & 0x1);
					AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
					AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i+1] &= 0xfffffffe;
					AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i+2] &= 0xfffffffe;
				}
			}
			
//			for(int i = 0;i < Output_ChN_default;i++)
//			{
//				handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
//				AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
//			}
	#if SUPPORT_ZERO_LINE
			handle_status_N = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x1);
			AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] &= 0xfffffffe;
	#endif
		handle_detection[0] = 0;	
		}
	}
#endif
	
#endif

	for(int i = 0;i < Output_ChN_default;i++)
	{
		RL_last_state[i] = 0;
		if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
		{
			AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i];
		}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 1)
		{
			AC3PPDU_RL_time[i + CH1_out].LT_state = 1;
		}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 2)
		{
			AC3PPDU_RL_time[i + CH1_out].LT_state = 0;
		}
			AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
		AC3PPDU_RL_time[i + CH1_out].RL_ontime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Ton1_Addr + i];
		AC3PPDU_RL_time[i + CH1_out].RL_offtime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Toff1_Addr + i];
		LimiT_enable_check((i + CH1_out),AC3PPDU_RL_time[i + CH1_out].LT_state);
		orderFlag[i]=true;
	}
#if SUPPORT_ZERO_LINE
	RL_N_last_state = 0;
	AC3PPDU_RL_N_time.LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr];					// add by liyi
	AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] &= 0xfffffffe;													// add by liyi
	AC3PPDU_RL_N_time.RL_offtime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_ToffN_Addr];				// add by liyi
	AC3PPDU_RL_N_time.RL_ontime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr];					// add by liyi
	orderFlag_N = true;
#endif






	AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] = AC3PPDU_APlack_Fault + AC3PPDU_BPlack_Fault;
	AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] += AC3PPDU_CPlack_Fault;

	Fwdgt_Init();
	uint32_t write_eep_count = 0;
	

	while(1)
	{
		//CHK_JLINK();
		eMBPoll();
		Fwdgt_reload();
		check_jlink();
		if(flash_flag == 1){
			LEDFlicker2();
			flash_flag = 0;
#if SUPPORT_DETECTION
			detection_value = get_detection();
#endif
			normal_running_time+=2;
			write_eep_count ++;
		}
		if(read_ele_flag)
		{
			read_ele_flag = 0;
			read_ele();
		}
		switch_recode();
		if(write_eep_count >= 120)			// 120 second recode
		{
			write_eep_count = 0;
			for(int i = 0; i < Output_ChN_default ;i++)
			{
				int temp = i << 2;
				Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 24;
				Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 16;
				Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 8;
				Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+3] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i];
			}
			AT24CxxWrite(ERom_TotalWh1_Addr,(Eeprom_Rbuf + ERom_TotalWh1_Addr),4*Output_ChN_default);
		}
		key_io_control();
		RL_Over_Func();
		MODbus_CMD_New();
	}
}


static void MODbus_CMD_New(void)
{
	if(Modbus_Wr_buff[Wr_eeprom_cnt][0] > 0)
	{
		uint8_t i = 0;
		uint32_t temp_addr;
		uint32_t base_addr = Modbus_Wr_buff[Wr_eeprom_cnt][1];
		uint32_t data = Modbus_Wr_buff[Wr_eeprom_cnt][2];
		uint32_t value = 0;
		
		switch(base_addr)
		{
			case Mb_Dbuff_ViLit_max_Addr ... Mb_Dbuff_kWhiLit_max_Addr:						//input votage max votage min current power coustermer add by liyi
				{
					temp_addr = base_addr - Mb_Dbuff_ViLit_max_Addr;
					temp_addr = temp_addr << 2;
					temp_addr += ERom_ViLit_max_Addr;
					Eeprom_Rbuf[temp_addr + 0] = data >> 24;
					Eeprom_Rbuf[temp_addr + 1] = data >> 16;
					Eeprom_Rbuf[temp_addr + 2] = data >> 8;
					Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
					AC3PPDU_Modbus_Reg[base_addr] = data;
					AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
				}
				break;
			case Mb_Dbuff_VLit1_max_Addr ... Mb_Dbuff_VLit9_max_Addr:							//output voltage max threod for 1,2,3,4,5,6,7,8,9 channels
				{
					temp_addr = base_addr - Mb_Dbuff_VLit1_max_Addr;
					value = temp_addr;
					temp_addr = temp_addr << 2;
					temp_addr += ERom_VLit1_max_Addr;
					Eeprom_Rbuf[temp_addr + 0] = data >> 24;
					Eeprom_Rbuf[temp_addr + 1] = data >> 16;
					Eeprom_Rbuf[temp_addr + 2] = data >> 8;
					Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
					AC3PPDU_Modbus_Reg[base_addr] = data;
					//uint16_t th_flag = 0;
					if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Vmax_Threshould_Disable);
						//th_flag &=(Shield_Vmax_Threshould_Disable);
						AC3PPDU_Vmax_LTen_flag[value+CH1_out] = 0;
					}else 
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state |= Shield_Vmax_Threshould_enable;
						//th_flag |=(Shield_Vmax_Threshould_enable);
						AC3PPDU_Vmax_LTen_flag[value+CH1_out] = 1;
					}
					//LimiT_enable_check((value + CH1_out),th_flag);
					AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
				}
				break;
			case Mb_Dbuff_VLit1_min_Addr ... Mb_Dbuff_VLit9_min_Addr:							//output voltage min thred for 1,2,3,4,5,6,7,8,9 channels
			{
					temp_addr = base_addr - Mb_Dbuff_VLit1_min_Addr;
					value = temp_addr;
					temp_addr = temp_addr << 2;
					temp_addr += ERom_VLit1_min_Addr;
					Eeprom_Rbuf[temp_addr + 0] = data >> 24;
					Eeprom_Rbuf[temp_addr + 1] = data >> 16;
					Eeprom_Rbuf[temp_addr + 2] = data >> 8;
					Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
					AC3PPDU_Modbus_Reg[base_addr] = data;
					//uint16_t th_flag = 0;
					if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Vmin_Threshould_Disable);	
						
						//th_flag &=(Shield_Vmin_Threshould_Disable);
						AC3PPDU_Vmin_LTen_flag[value+CH1_out] = 0;
					}else
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state |= (Shield_Vmin_Threshould_enable);
						//th_flag |=(Shield_Vmin_Threshould_enable);
						AC3PPDU_Vmin_LTen_flag[value+CH1_out] = 1;
					}
					//LimiT_enable_check((value + CH1_out),th_flag);
					AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
			}
				break;
			case Mb_Dbuff_ILit1_max_Addr ... Mb_Dbuff_ILit9_max_Addr:							// output current max throud for 1,2,3,4,5,6,7,8,9 channels
			{
					temp_addr = base_addr - Mb_Dbuff_ILit1_max_Addr;
					value = temp_addr;
					temp_addr = temp_addr << 2;
					temp_addr += ERom_ILit1_max_Addr;
					Eeprom_Rbuf[temp_addr + 0] = data >> 24;
					Eeprom_Rbuf[temp_addr + 1] = data >> 16;
					Eeprom_Rbuf[temp_addr + 2] = data >> 8;
					Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
					AC3PPDU_Modbus_Reg[base_addr] = data;
					uint16_t th_flag = 0;
					if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Imax_Threshould_Disable);
						//th_flag &=(Shield_Imax_Threshould_Disable);
						AC3PPDU_Imax_LTen_flag[value+CH1_out] = 0;
					}else
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state |= (Shield_Imax_Threshould_enable);
						//th_flag |=(Shield_Imax_Threshould_enable << 1);
						AC3PPDU_Vmax_LTen_flag[CH1_out+value] = 1;
					}
					//LimiT_enable_check((value + CH1_out),th_flag);
					AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
			}
				break;
			case Mb_Dbuff_WLit1_max_Addr ... Mb_Dbuff_WLit9_max_Addr:							//output power max .....
			{
					temp_addr = base_addr - Mb_Dbuff_WLit1_max_Addr;
					value = temp_addr;
					temp_addr = temp_addr << 2;
					temp_addr += ERom_WLit1_max_Addr;
					Eeprom_Rbuf[temp_addr + 0] = data >> 24;
					Eeprom_Rbuf[temp_addr + 1] = data >> 16;
					Eeprom_Rbuf[temp_addr + 2] = data >> 8;
					Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
					AC3PPDU_Modbus_Reg[base_addr] = data;
					uint16_t th_flag = 0;
					if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Wmax_Threshould_Disable);
						th_flag &=(Shield_Wmax_Threshould_Disable << 1);
						AC3PPDU_Wmax_LTen_flag[value+CH1_out] = 0;
					}else
					{
						//AC3PPDU_RL_time[value + CH1_out].LT_state |= (Shield_Wmax_Threshould_enable);
						//th_flag &=(Shield_Wmax_Threshould_enable << 1);
						AC3PPDU_Wmax_LTen_flag[value+CH1_out] = 1;
					}
					//LimiT_enable_check((value + CH1_out),th_flag);
					AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
			}
				break;
			case Mb_Dbuff_kWhLit1_max_Addr ... Mb_Dbuff_kWhLit9_max_Addr:					//output customers max .....
			{
						temp_addr = base_addr - Mb_Dbuff_kWhLit1_max_Addr;
						value = temp_addr;
						temp_addr = temp_addr << 2;
						temp_addr += ERom_kWhLit1_max_Addr;
						Eeprom_Rbuf[temp_addr + 0] = data >> 24;
						Eeprom_Rbuf[temp_addr + 1] = data >> 16;
						Eeprom_Rbuf[temp_addr + 2] = data >> 8;
						Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
						AC3PPDU_Modbus_Reg[base_addr] = data;
						//uint16_t th_flag = 0;
						if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
						{
							//AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Kwhmax_Threshould_Disable);
							//th_flag &=(Shield_Kwhmax_Threshould_Disable << 1);
							AC3PPDU_kWhmax_LTen_flag[value+CH1_out] = 0;
						}else
						{
							//AC3PPDU_RL_time[value + CH1_out].LT_state |= (Shield_kWhmax_Threshould_enable);
							//th_flag &=(Shield_kWhmax_Threshould_enable << 1);
							AC3PPDU_kWhmax_LTen_flag[value+CH1_out] = 1;
						}
						//LimiT_enable_check((value + CH1_out),th_flag);
						AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
			}
				break;
			case Mb_Dbuff_RL_Allon_Addr:																					//relay all on
			{
#if SUPPORT_DETECTION
	#if SUPPORT_DOUBLE_FIRE
					RL_Allon_flag = true;
					if(detection_value != 0x3)
					{
						uint8_t sync_buff[PH_STEP] = {0};
						
						if(detection_value & 0x1)
						{
							for(i = 0;i < PH_STEP;i++)
							{
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
								{
									temp_addr = i << 1; 
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
									//AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
									temp_addr = (i+PH_STEP) << 1;
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
									//AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
									RL_Allon_flag = false;
									sync_buff[i] = 1;
								}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
								{
									temp_addr = i << 1; 
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
									AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
									orderFlag[i]=true;								
								}
							}							
						}
						if(detection_value & 0x2)
						{
							for(i = 0;i < PH_STEP;i++)
							{
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
								{
									
									if(sync_buff[i])
									{
									}else
									{
										temp_addr = i << 1; 
										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
										//AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
										temp_addr = (i+PH_STEP) << 1;
										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
										Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;	
										RL_Allon_flag = false;
									}
								}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
								{
									temp_addr = (i+PH_STEP) << 1;
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
									AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
									orderFlag[i+PH_STEP]=true;										
								}
							}
						}
					}else
					{
						for(i = 0;i < PH_STEP;i++)
						{
							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
							{
								temp_addr = i << 1; 
								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
								AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
								orderFlag[i]=true;
								temp_addr = (i+PH_STEP) << 1;
								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
								AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
								orderFlag[i+PH_STEP]=true;								
							}else 
							{
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
								{
									temp_addr = i << 1; 
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
									AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
									orderFlag[i]=true;
								}
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
								{
									temp_addr = (i+PH_STEP) << 1;
									Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
									AC3PPDU_RL_time[i + CH1_out + PH_STEP].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
									orderFlag[i+PH_STEP]=true;									
								}
							}
						}		
					}
					AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));	
	#else
				if(detection_value == 1)
				{
					RL_Allon_flag = true;
					for(int i = 0; i < Output_ChN_default;i+=3)
					{
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+1] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+2] == 0)
						{
							temp_addr = i << 1; 
							Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
							AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
							orderFlag[i]=true;
							temp_addr = (i+1) << 1; 
							Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
							AC3PPDU_RL_time[i + CH1_out + 1].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
							orderFlag[i+1]=true;
							temp_addr = (i+2) << 1; 
							Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
							AC3PPDU_RL_time[i + CH1_out + 2].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
							orderFlag[i+2]=true;
						}else 
						{
							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
							{							
								temp_addr = i << 1; 
								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
								AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
								orderFlag[i]=true;				
							}
							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+1] == 0)
							{
								temp_addr = (i+1) << 1; 
								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
								AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
								orderFlag[i+1]=true;								
							}
							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+2] == 0)
							{
								temp_addr = (i+2) << 1; 
								Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
								AC3PPDU_RL_time[i + CH1_out + 2].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
								orderFlag[i+2]=true;							
							}
						}
					}
//					for(i = 0;i < Output_ChN_default;i++)
//					{
//						temp_addr = i << 1; 
//						Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
//						AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
//						orderFlag[i]=true;
//					}		
					AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
	#if SUPPORT_ZERO_LINE
					orderFlag_N = true;
					Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x41;
					AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
					AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
	#endif
				}
	#endif
#endif
			}
				break;
			case Mb_Dbuff_RL_Alloff_Addr:																					//relay all off
			{
//#if SUPPORT_DETECTION
//	#if SUPPORT_DOUBLE_FIRE
//					if(detection_value != 0x3)
//					{
//						
//					}
//				{
//					RL_Alloff_flag = true;
//					for(i = 0;i < PH_STEP;i++)
//					{
//						
//					}
//				}
//	#else
//				if(detection_value == 1)
	

				{	
					RL_Alloff_flag = true;
					for(i = 0;i < Output_ChN_default;i++)
					{
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
						{
							temp_addr = i << 1;
							Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
							Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
							AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
							orderFlag[i]=true;
						}
					}
					AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
		#if SUPPORT_ZERO_LINE
					orderFlag_N = true;
					Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x80;
					Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] & 0xfe;
					AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
					AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
		#endif
				}
//	#endif
//#endif
		 }

				break;
			case Mb_Dbuff_LT_ST_Addr:																							//set input status
			{
				AC3PPDU_RL_time[CH_in].LT_state = data;
				Eeprom_Rbuf[ERom_LT_ST_Addr] = data;
				AC3PPDU_Modbus_Reg[base_addr] = data;
				AT24CxxWriteOneByte(ERom_LT_ST_Addr,Eeprom_Rbuf[ERom_LT_ST_Addr]);
				LimiT_enable_check(CH_in,AC3PPDU_RL_time[CH_in].LT_state);
			}
				break;
			case Mb_Dbuff_CH1LT_ST_Addr ...  Mb_Dbuff_CHNLT_ST_Addr:							//set output relay statues
			{
				temp_addr = base_addr - Mb_Dbuff_CH1LT_ST_Addr;

				if(temp_addr == 9) {					//Ch N
#if SUPPORT_ZERO_LINE
					AC3PPDU_RL_N_time.LT_state = data;
					orderFlag_N = true;
					temp_addr = temp_addr << 1;
					temp_addr +=ERom_CH1LT_ST_Addr;
					Eeprom_Rbuf[temp_addr] = data;
					AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
#endif
				}else
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
					{
						data &= (Shield_Vmax_Threshould_Disable);
					}
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
					{
						data &= (Shield_Vmin_Threshould_Disable);
					}
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
					{
						data &= (Shield_Imax_Threshould_Disable);
					}
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
					{
						data &= (Shield_Wmax_Threshould_Disable);
					}
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
					{
						data &= (Shield_Kwhmax_Threshould_Disable);
					}
#if SUPPORT_DETECTION
	#if SUPPORT_DOUBLE_FIRE

					if(detection_value != 0x3)
					{
						for(i = 0;i < PH_STEP;i++)
						{
							if(temp_addr == i || (temp_addr == (i+ PH_STEP)))
							{
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0 && AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
								{
									break;
								}else
								{
									if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
									{
										AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
										orderFlag[temp_addr]=true;
										LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
										temp_addr = temp_addr << 1;
										temp_addr += ERom_CH1LT_ST_Addr;
										Eeprom_Rbuf[temp_addr] = data;
										AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);										
									}
									if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] == 0)
									{
										AC3PPDU_RL_time[temp_addr + CH1_out+PH_STEP].LT_state = data;
										orderFlag[temp_addr+PH_STEP]=true;
										LimiT_enable_check((temp_addr + CH1_out+PH_STEP),AC3PPDU_RL_time[temp_addr + CH1_out+PH_STEP].LT_state);
										temp_addr = temp_addr << 1;
										temp_addr += ERom_CH1LT_ST_Addr;
										Eeprom_Rbuf[temp_addr] = data;
										AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);										
									}
									break;
								}
							}
						}
					}else
					{
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+temp_addr] == 0)
						{
							AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
							orderFlag[temp_addr]=true;
							LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
							temp_addr = temp_addr << 1;
							temp_addr += ERom_CH1LT_ST_Addr;
							Eeprom_Rbuf[temp_addr] = data;
							AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);									
						}
					}

	#else 
					if(detection_value == 1)
					{
						for(int i = 0; i < Output_ChN_default;i++)
						{
							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
							{
								if(temp_addr == i)
								{
									AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
									orderFlag[temp_addr]=true;
									LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
									temp_addr = temp_addr << 1;
									temp_addr += ERom_CH1LT_ST_Addr;
									Eeprom_Rbuf[temp_addr] = data;
									AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);			
									break;
								}
							}
						}
					}
	#endif	
#endif
				}
			}
				break;
			case Mb_Dbuff_OUTCH1_ST_Addr ... Mb_Dbuff_OUTCH4_ST_Addr:							//set output channel relay's status
			{
#if SUPPORT_DOUBLE_FIRE
		#if SUPPORT_DETECTION
					if(detection_value == 0x3)
		#endif
					{
						temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
						for(int i = temp_addr; i < Output_ChN_default; i += PH_STEP)
						{
							if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i] == 0)
							{
								if(i >=PH_STEP)
								{
									if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i-PH_STEP] != 0)
									{
										continue;
									}
								}else
								{
									if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+i+PH_STEP] != 0)
										continue;
								}
								uint32_t value = data;
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
								{
									value &= Shield_Vmax_Threshould_Disable;
								}		
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + i] <= THRESHOULD_JUDGMENT)
								{
									value &= (Shield_Vmin_Threshould_Disable);
								}		
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
								{
									value &=(Shield_Imax_Threshould_Disable);
								}
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
								{
									value &=(Shield_Wmax_Threshould_Disable);
								}
								if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + i] <= THRESHOULD_JUDGMENT)
								{
									value &= (Shield_Kwhmax_Threshould_Disable);
								}	
								
								AC3PPDU_RL_time[i + CH1_out].LT_state = value;
								uint16_t val = i;
								val <<=1;
								orderFlag[i]=true;
								LimiT_enable_check((i + CH1_out),AC3PPDU_RL_time[i + CH1_out].LT_state);
								Eeprom_Rbuf[val + ERom_CH1LT_ST_Addr] = value;
								AT24CxxWriteOneByte(val + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[val + ERom_CH1LT_ST_Addr]);
							}
						}
					}
#else
	#if SUPPORT_DETECTION
				if(detection_value == 1)
	#endif
				{
					temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
					//OutUnit_control_flag[temp_addr] = 1;
					temp_addr *= 3;
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+temp_addr] == 0 
							&& AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+temp_addr+1] == 0
							&& AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr+temp_addr+2] == 0)
					{
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
						{
							data &= (Shield_Vmax_Threshould_Disable);
						}
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
						{
							data &= (Shield_Vmin_Threshould_Disable);
						}
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
						{
							data &= (Shield_Imax_Threshould_Disable);
						}
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
						{
							data &= (Shield_Wmax_Threshould_Disable);
						}
						if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
						{
							data &= (Shield_Kwhmax_Threshould_Disable);
						}
						
						AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
						AC3PPDU_RL_time[temp_addr + CH2_out].LT_state = data;
						AC3PPDU_RL_time[temp_addr + CH3_out].LT_state = data;
						for(int i=0;i<Output_ChN_default;i++)
						{
							orderFlag[i]=true;
						}
						//orderFlag_N = true;
						LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
						LimiT_enable_check((temp_addr + CH2_out),AC3PPDU_RL_time[temp_addr + CH2_out].LT_state);
						LimiT_enable_check((temp_addr + CH3_out),AC3PPDU_RL_time[temp_addr + CH3_out].LT_state);
						
						temp_addr = temp_addr << 1;
						Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr] = data;
						Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr] = data;
						Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr] = data;
						
						AT24CxxWriteOneByte(temp_addr + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr]);
						AT24CxxWriteOneByte(temp_addr + ERom_CH2LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr]);
						AT24CxxWriteOneByte(temp_addr + ERom_CH3LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr]);
					}
				}
#endif	
			}
				break;
			case Mb_Dbuff_RL_Ton1_Addr ... Mb_Dbuff_RL_TonN_Addr:									//set on status delay for 1,2,3,4,5,6,7,8,9,N channels
			{
				temp_addr = base_addr - Mb_Dbuff_RL_Ton1_Addr;
				if(temp_addr == 9){				//Ch   N   add by liyi
					AC3PPDU_RL_N_time.RL_ontime = data;
				}else
				{
					AC3PPDU_RL_time[temp_addr + CH1_out].RL_ontime = data;
				}
				AC3PPDU_RL_N_time.RL_ontime = data;
				temp_addr += ERom_RL_Ton1_Addr;
				Eeprom_Rbuf[temp_addr] = data;
				Eeprom_Rbuf[ERom_RL_TonN_Addr] = data;
				
				
				AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr] = Eeprom_Rbuf[ERom_RL_TonN_Addr];
				
				AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
				AT24CxxWriteOneByte(ERom_RL_TonN_Addr,Eeprom_Rbuf[ERom_RL_TonN_Addr]);
			}
				break;
			case Mb_Dbuff_RL_Toff1_Addr ... Mb_Dbuff_RL_ToffN_Addr:               //set off status delay for 1,2,3,4,5,6,7,8,9,N channels
			{
				temp_addr = base_addr - Mb_Dbuff_RL_Toff1_Addr;
				if(temp_addr == 9){
					AC3PPDU_RL_N_time.RL_offtime = data;
				}else {
					AC3PPDU_RL_time[temp_addr + CH1_out].RL_offtime = data;
				}
				AC3PPDU_RL_N_time.RL_offtime = data;
				temp_addr += ERom_RL_Toff1_Addr;
				
				Eeprom_Rbuf[temp_addr] = data;
				Eeprom_Rbuf[ERom_RL_ToffN_Addr] = data;
				
				AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_ToffN_Addr] = Eeprom_Rbuf[ERom_RL_ToffN_Addr];
				
				AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
				AT24CxxWriteOneByte(ERom_RL_ToffN_Addr,Eeprom_Rbuf[ERom_RL_ToffN_Addr]);
			}
				break;
#if 0
			case Mb_Dbuff_RL_SET_SINGLE_OUT_CH1 ... Mb_Dbuff_RL_SET_SINGLE_OUT_CH4:
			{
				temp_addr = base_addr - Mb_Dbuff_RL_SET_SINGLE_OUT_CH1;
				uint8_t dat_ = data;
#if SUPPORT_DOUBLE_FIRE
			if(data < 3){
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] = data;
				AT24CxxWriteOneByte(ERom_SINGLE_OUT_CH_Addr+temp_addr,dat_);
			}
#else
			if(data <= 3){
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_SET_SINGLE_OUT_CH1+temp_addr] = data;
				AT24CxxWriteOneByte(ERom_SINGLE_OUT_CH_Addr+temp_addr,dat_);
			}				
				
#endif
	
			}
			break;
#endif
			case Mb_Dbuff_RL_Over_Ch1_Func ... Mb_Dbuff_RL_Over_Ch9_Func:					//threod over limit operation
			{
				temp_addr = base_addr - Mb_Dbuff_RL_Over_Ch1_Func;
				temp_addr += ERom_RL_Over_Ch1_Addr;
				Eeprom_Rbuf[temp_addr] = data;
				AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
				AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
			}
				break;
			case Mb_Dbuff_Clear_Chn1_Consumer ... Mb_Dbuff_Clear_Chn9_Consumer:
			{
				if(data)
				{
					temp_addr = base_addr - Mb_Dbuff_Clear_Chn1_Consumer;
					hlw8110_base[temp_addr+CH1_out] = 0;
					hlw8110_store[temp_addr+CH1_out] = 0.0;
				}
			}
			break;
			case Mb_Dbuff_Clear_Chnall_Consumer:
			{
				if(data){
					for(i = 0; i < Output_ChN_default;i++)
					{
						hlw8110_base[i+CH1_out] = 0;
						hlw8110_store[i+CH1_out] = 0.0;
					}
				}
			}
			break;
			case Mb_Dbuff_All_ViLit_Max ... Mb_Dbuff_All_kWhiLit_Max:
			{
				temp_addr = base_addr - Mb_Dbuff_All_ViLit_Max;
				temp_addr = temp_addr << 2;
				temp_addr += ERom_VILit_All_max_Addr;
				Eeprom_Rbuf[temp_addr + 0] = data >> 24;
				Eeprom_Rbuf[temp_addr + 1] = data >> 16;
				Eeprom_Rbuf[temp_addr + 2] = data >> 8;
				Eeprom_Rbuf[temp_addr + 3] = data >> 0;	
				AC3PPDU_Modbus_Reg[base_addr] = data;
				AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
				switch (base_addr - Mb_Dbuff_All_ViLit_Max)
				{
					case 0:
					{
						if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Vmax_Threshould_Disable);
						}else
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Vmax_Threshould_enable);
						}
					}
						break;
					case 1:
					{
						if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Vmin_Threshould_Disable);
						}else
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Vmin_Threshould_enable);
						}
					}
						break;
					case 2:
					{
						if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Imax_Threshould_Disable);
						}else
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Imax_Threshould_enable);
						}
					}
						break;
					case 3:
					{
						if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Wmax_Threshould_Disable);
						}else
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Wmax_Threshould_enable);
						}			
					}
						break;
					case 4:
					{
						if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Kwhmax_Threshould_Disable);
						}else
						{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_kWhmax_Threshould_enable);
						}	
					}
						break;
				}
			}
			break;
			case Mb_Dbuff_All_OverFunc:
			{
				temp_addr = base_addr - Mb_Dbuff_All_OverFunc;
				temp_addr += Mb_Dbuff_All_OverFunc;
				Eeprom_Rbuf[temp_addr] = data;
				AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
				AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
			}
				break;
			case Mb_Dbuff_break_Addr:
			{
				break_2_boot_upgreade();
			}
			break;
			case Mb_Dbuff_Ch1_Ctrl_Addr ... Mb_Dbuff_Ch9_Ctrl_Addr:
			{
				temp_addr = base_addr - Mb_Dbuff_Ch1_Ctrl_Addr;
				uint8_t _val = temp_addr;
				temp_addr = temp_addr << 1; 
				
				
				temp_addr += Mb_Dbuff_Ch1_Ctrl_Addr;
				Eeprom_Rbuf[temp_addr] = data;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr + _val] = Eeprom_Rbuf[temp_addr];
				
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr + _val] == 1)
				{
					Eeprom_Rbuf[ERom_CH1LT_ST_Addr+ (_val << 1)] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + (_val << 1)] | 0x41;
					AC3PPDU_RL_time[_val + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr +(_val << 1)];
					orderFlag[_val]=true;
					AT24CxxWriteOneByte(ERom_CH1LT_ST_Addr + _val,Eeprom_Rbuf[ERom_CH1LT_ST_Addr+ (_val << 1)]);		
				}else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr + _val] == 2)
				{
					Eeprom_Rbuf[ERom_CH1LT_ST_Addr+ (_val << 1)] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + (_val << 1)] & (~0x1);
					AC3PPDU_RL_time[_val + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr +(_val << 1)];
					orderFlag[_val]=true;
					AT24CxxWriteOneByte(ERom_CH1LT_ST_Addr + _val,Eeprom_Rbuf[ERom_CH1LT_ST_Addr+ (_val << 1)]);			
				}else
				{
					AC3PPDU_Modbus_Reg[Mb_Dbuff_Ch1_Ctrl_Addr + _val] = 0;
					Eeprom_Rbuf[Mb_Dbuff_Ch1_Ctrl_Addr + _val] = 0;
				}
	
				AT24CxxWriteOneByte(ERom_CH_CTRL_Addr+_val,Eeprom_Rbuf[temp_addr]);
			}
			break;
			default:
				break;
		}
		Modbus_Wr_buff[Wr_eeprom_cnt][0] = 0;
		//Wr_eeprom_begin_flag = true;
	}
	Wr_eeprom_cnt++;
	if(Wr_eeprom_cnt >= Mb_Wcmd_Width)
	{
		Wr_eeprom_cnt = 0;
	}
}

//static void MODbus_CMD_New(void)
//{
//	if(Modbus_Wr_buff[Wr_eeprom_cnt][0] > 0)
//	{
//		uint8_t i = 0;
//		uint32_t temp_addr;
//		uint32_t base_addr = Modbus_Wr_buff[Wr_eeprom_cnt][1];
//		uint32_t data = Modbus_Wr_buff[Wr_eeprom_cnt][2];
//		uint32_t value = 0;
//		
//		switch(base_addr)
//		{
//			case Mb_Dbuff_RL_Allon_Addr:
//			{
//				DB_Out1_H;	
//				DB_Out2_H;
//				DB_Out3_H;
//				BUFF_Data;
//				LOCK_Data;
//			}				
//			break;
//			case Mb_Dbuff_RL_Alloff_Addr:	
//			{
//				DB_Out1_L;	
//				DB_Out2_L;
//				DB_Out3_L;	
//				BUFF_Data;
//				LOCK_Data;
//			}
//			break;
//		}
//		Modbus_Wr_buff[Wr_eeprom_cnt][0] = 0; 
//	}
//	Wr_eeprom_cnt++;
//	if(Wr_eeprom_cnt >= Mb_Wcmd_Width)
//	{
//		Wr_eeprom_cnt = 0;
//	}
//}
static uint16_t count = 0;
static void Fault_state_process(uint8_t ch_x)
{
	uint16_t i = 0;
	
	if(ch_x != CH_in)
		i = (ch_x -1)<< 3;
	
	
	if(ch_x == CH_in)
	{
#if (!SUPPORT_DOUBLE_FIRE)
			uint32_t sort_buff[3] = {0};
			uint32_t Vmax = 0;
			uint32_t Vmin = 0;
			sort_buff[0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
			sort_buff[1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
			sort_buff[2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr];
			Vmax = (sort_buff[0] >= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
			Vmax = (Vmax >= sort_buff[2]) ? Vmax : sort_buff[2];
			
			Vmin = (sort_buff[0] <= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
			Vmin = (Vmin <= sort_buff[2]) ? Vmin : sort_buff[2];
			
			if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
			{
				uint32_t v_mid = AC3PPDU_Lack_Voltage *2; 
				count ++;
				if(count == 2)
				{
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
					{
						AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
					}
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
					{
							AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
					}
					if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
					{
						AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] =1;
					}
					count = 0;
				}
			}else 
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
				count = 0;
			}
#else
		uint32_t Vmax = 0;
		uint32_t Vmin = 0;
		if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr])
		{
			Vmax = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
			Vmin = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
		}else
		{
			Vmax =  AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
			Vmin = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
		}
		if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
		{
			uint32_t v_mid = AC3PPDU_Lack_Voltage *2; 
			count ++;
			if(count == 2)
			{
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
				{
					AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
				}
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
				{
					AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
				}
				count = 0;
			}
		}else
		{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
				//AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
				count = 0;
		}
#endif
		if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr]  & Shield_Vmax_Threshould_enable) > 0)
		{
			if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Max])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmax_Fault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_V_Max_Func_enable)
				{
					RL_All_Func = 1;
				}
				
			}else if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Min])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmax_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
			}else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmax_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmin_Fault;
			}
		}
		
		if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr]  & Shield_Vmin_Threshould_enable) > 0)
		{
			if(AC_BASE[0] < AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Min])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmin_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_V_Min_Func_enable)
				{
					RL_All_Func = 1;
				}
			}
			else//小于最小
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
			}
		}
		
		if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr]  & Shield_Imax_Threshould_enable) > 0)
		{
			if(AC_BASE[1] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_IiLit_Max])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Imax_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_I_Max_Func_enable)
				{
					RL_All_Func = 1;
				}
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Imax_NFault;
			}
		}
		
		if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr]  & Shield_Wmax_Threshould_enable) > 0)
		{
			if(AC_BASE[2] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_WiLit_Max])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Wmax_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_P_Max_Func_enable)
				{
					RL_All_Func = 1;
				}
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Wmax_NFault;
			}
		}
		
		if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr]  & Shield_kWhmax_Threshould_enable) > 0)
		{
			if(AC_BASE[3] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_kWhiLit_Max])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_kWhmax_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_C_Max_Func_enable)
				{
					RL_All_Func = 1;
				}
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_kWhmax_NFault;
			}
		}
		
		return;
	}
	////电压最大、最小、缺相阈值使能，进行判断
	if(AC3PPDU_Vmax_LTen_flag[ch_x] > 0)
	{
		if(ch_x > CH_in)//输出通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + ch_x-1])//大于最大
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmax_Fault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func+ch_x-1] & (AC3PPDU_Over_V_Max_Func_enable))   //is or not open func
				{
					RL_Func_statu[ch_x] = 1;
				}
			}
			else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + ch_x-1])//大于最小，小于最大，正常
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
			}
			else//小于最小
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmin_Fault;
			}
		}
		else//输入通道
		{
			//A相
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AVmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmax_NFault;
			}
			//B相
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BVmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmax_NFault;
			}
			//C相
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CVmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmax_NFault;
			}
			
		}
	}
	else
	{
		if(ch_x > CH_in)
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
		}
		else
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmax_NFault;
		}
	}
	//最小电压
	if(AC3PPDU_Vmin_LTen_flag[ch_x] > 0)
	{
		if(ch_x > CH_in)//输出通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] < AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + ch_x -1])//大于最大   revice by liyi max -> min 
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmin_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x - 1] & (AC3PPDU_Over_V_Min_Func_enable))   //is or not open func add by liyi
				{
					RL_Func_statu[ch_x] = 1;
				}
			}
			else//小于最小
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
			}
		}
		else//输入通道
		{
			//A相
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
			}
			else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > 1000)
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AVmin_Fault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_APlack_Fault;
			}
			//B相
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
			}
			else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > 1000)
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BVmin_Fault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BPlack_Fault;
			}
			//C相
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
			}
			else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > 1000)
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CVmin_Fault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CPlack_Fault;
			}
			
		}
	}
	else
	{
		if(ch_x > CH_in)
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
		}
		else
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
			
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > 1000)
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_APlack_Fault;
			}
			
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > 1000)
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BPlack_Fault;
			}
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > 1000)
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CPlack_Fault;
			}
		}
	}
	//电流最大
	if(AC3PPDU_Imax_LTen_flag[ch_x] > 0)
	{
		if(ch_x > CH_in)//输出通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 1 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + ch_x -1])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Imax_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_I_Max_Func_enable))   //is or not open func add by liyi
				{
					RL_Func_statu[ch_x] = 1;
				}
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Imax_NFault;
			}
		}
		else//输入通道
		{
			if((AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AImax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AImax_NFault;
			}
			
			if((AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BImax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BImax_NFault;
			}
			
			if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CImax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CImax_NFault;
			}
		}
	}
	else
	{
		if(ch_x > CH_in)
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Imax_NFault;
		}
		else
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AImax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BImax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CImax_NFault;
		}
	}
	//功率最大
	if(AC3PPDU_Wmax_LTen_flag[ch_x] > 0)
	{
		if(ch_x > CH_in)//输出通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 2 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + ch_x -1])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Wmax_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_P_Max_Func_enable))   //is or not open func add by liyi
				{
					RL_Func_statu[ch_x] = 1;
				}
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Wmax_NFault;
			}
		}
		else//输入通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AWmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AWmax_NFault;
			}
			
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BWmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BWmax_NFault;
			}
			
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CWmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CWmax_NFault;
			}
		}
	}
	else
	{
		if(ch_x > CH_in)
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Wmax_NFault;
		}
		else
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AWmax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BWmax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CWmax_NFault;
		}
	}
	//电量最大
	if(AC3PPDU_kWhmax_LTen_flag[ch_x] > 0)
	{
		if(ch_x > CH_in)//输出通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 6 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + ch_x-1])
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_kWhmax_Fault;
				if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_C_Max_Func_enable))   //is or not open func add by liyi
				{
					RL_Func_statu[ch_x] = 1;
				}
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_kWhmax_NFault;
			}
		}
		else//输入通道
		{
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AkWhmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AkWhmax_NFault;
			}
			
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BkWhmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BkWhmax_NFault;
			}
			
			if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CkWhmax_Fault;
			}
			else
			{
				AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CkWhmax_NFault;
			}
		}
	}
	else
	{
		if(ch_x > CH_in)
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_kWhmax_NFault;
		}
		else
		{
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AkWhmax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BkWhmax_NFault;
			AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CkWhmax_NFault;
		}
	}
}

#ifdef  USE_FULL_ASSERT
void assert_failed(uint8_t* file, uint32_t line) 
{ 
  while (1);
}
#else
void __aeabi_assert(const char * x1, const char * x2, int x3)
{
	(void)x3;
}
#endif