main.c 48 KB

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  1. #include "gd32e23x.h"
  2. #include "systick.h"
  3. #include <stdio.h>
  4. #include "main.h"
  5. #include "Fwdgt.h"
  6. #include "mb.h"
  7. #include "Led.h"
  8. #include "Key.h"
  9. #include "cfg.h"
  10. #include "string.h"
  11. #include "Timer.h"
  12. #include "Fwdgt.h"
  13. #include "stdbool.h"
  14. #include "At24cxx.h"
  15. #include "Sn74hc573.h"
  16. #include "Relay.h"
  17. #include "ReadEeprom.h"
  18. #include "Uart1.h"
  19. #include "Hlw8110.h"
  20. #include "key_io.h"
  21. #include "board_cfg.h"
  22. #include "Flash.h"
  23. AC_Output_struct_Reg AC3PPDU_Output[Output_ChN_default + 2] = {0};
  24. AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_time[Output_ChN_default + 2] = {0};
  25. AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_N_time;
  26. static uint8_t AC3PPDU_SlaveAddress = 0x00;
  27. uint16_t Devid_IDChalNum = 0;
  28. bool RL_Allon_flag = false;
  29. bool RL_Alloff_flag = false;
  30. bool Start_Read_Flag = false;
  31. uint16_t CurrentAddr = 0;
  32. uint8_t flash_flag = 0;
  33. uint32_t AC3PPDU_Modbus_Reg[AC3PPDU_Modbus_Reg_len] = {0};
  34. uint8_t AC3PPDU_active_chn;
  35. information_t infomation;
  36. uint32_t hlw8110_base[Output_ChN_default + 1] = {0}; //add by liyi
  37. uint8_t Wr_eeprom_cnt = 0;
  38. bool orderFlag[Output_ChN_default] ={0};
  39. #if SUPPORT_ZERO_LINE
  40. bool orderFlag_N = 0;
  41. uint8_t RL_N_begin_delay_flag = 0x0; // add by liyi
  42. uint8_t RL_N_end_delay_flag = 0x0; // add by liyi
  43. uint8_t RL_N_ON_flag = 0x0; // add by liyi
  44. uint8_t RL_N_OFF_flag = 0x0; // add by liyi
  45. uint8_t RL_N_last_state = 0x0; // add by liyi
  46. uint8_t RL_N_now_state = 0x0; // add by liyi
  47. extern uint32_t RL_N_delay_cnt; // add by liyi
  48. extern uint32_t RL_N_delay_Limit; // add by liyi
  49. #endif
  50. #if SUPPORT_DETECTION
  51. uint8_t detection_value = 0;
  52. #endif
  53. uint8_t RL_begin_delay_flag[Output_ChN_default+1] = {0x00};
  54. uint8_t RL_end_delay_flag[Output_ChN_default+1] = {0x00};
  55. uint8_t RL_ON_flag[Output_ChN_default+1] = {0x00};
  56. uint8_t RL_OFF_flag[Output_ChN_default+1] = {0x00};
  57. uint8_t RL_last_state[Output_ChN_default+1] = {0x00};
  58. uint8_t RL_now_state[Output_ChN_default+1] = {0x00};
  59. uint8_t RL_Func_statu[Output_ChN_default + 1] = {0x00};
  60. uint8_t RL_All_Func = 0x0;
  61. uint32_t normal_running_time = 0;
  62. uint8_t AC3PPDU_Vmax_LTen_flag[Output_ChN_default+1] = {0x01};
  63. uint8_t AC3PPDU_Vmin_LTen_flag[Output_ChN_default+1] = {0x01};
  64. uint8_t AC3PPDU_Imax_LTen_flag[Output_ChN_default+1] = {0x01};
  65. uint8_t AC3PPDU_Wmax_LTen_flag[Output_ChN_default+1] = {0x01};
  66. uint8_t AC3PPDU_kWhmax_LTen_flag[Output_ChN_default+1] = {0x01};
  67. uint32_t AC_BASE[4] = {0};
  68. META_DATA_S meta_data = {0};
  69. uint8_t write_kwh2Eeprom_flag = 0;
  70. extern float hlw8110_store[Output_ChN_default + 1];
  71. extern uint32_t Modbus_Wr_buff[Mb_Wcmd_Width][Mb_Wcmd_len];
  72. extern uint32_t RL_delay_Limit[Output_ChN_default + 1];
  73. static void MODbus_CMD_New(void);
  74. static void Fault_state_process(uint8_t ch_x);
  75. static void break_2_boot_upgreade(void)
  76. {
  77. meta_data.errno = 0;
  78. meta_data.operation_flag = 1;
  79. meta_data.recent_running_time = normal_running_time;
  80. flash_erase_meta();
  81. flash_write_meta(&meta_data);
  82. __disable_irq();
  83. //__set_FAULTMASK(1);
  84. NVIC_SystemReset();
  85. }
  86. static void app_init(META_DATA_S *meta)
  87. {
  88. flash_get_meta_data(meta);
  89. nvic_vector_table_set(NVIC_VECTTAB_FLASH,meta->rom_addr - NVIC_VECTTAB_FLASH);
  90. __enable_irq();
  91. }
  92. static bool select_channel(uint8_t ch_x)
  93. {
  94. if(ch_x == 0)
  95. return false;
  96. switch(ch_x)
  97. {
  98. case CH1_out:
  99. {
  100. SEL_0_L;
  101. SEL_1_L;
  102. SEL_2_L;
  103. }
  104. break;
  105. case CH2_out:
  106. {
  107. SEL_0_H;
  108. SEL_1_L;
  109. SEL_2_L;
  110. }
  111. break;
  112. case CH3_out:
  113. {
  114. SEL_0_L;
  115. SEL_1_H;
  116. SEL_2_L;
  117. }
  118. break;
  119. default:
  120. return false;
  121. }
  122. return true;
  123. }
  124. void hlw8110_init(uint8_t ch_x)
  125. {
  126. if(select_channel(ch_x) == false)
  127. return;
  128. Init_HLW8110();
  129. }
  130. static void check_jlink()
  131. {
  132. #if SUPPORT_KEY_CTRL
  133. uint8_t test = false;
  134. uint8_t rst = false;
  135. #endif
  136. if(Chk_Jlink_conn() == false)
  137. {
  138. #if SUPPORT_KEY_CTRL
  139. rst = get_rst();
  140. test = get_test();
  141. #if SUPPORT_DETECTION
  142. if(detection_value == 0) // duan lu qi shi fou zai xian
  143. {
  144. for(int i = 0; i < Output_ChN_default;i++)
  145. {
  146. AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
  147. orderFlag[i]=true;
  148. }
  149. }else
  150. #endif
  151. {
  152. if(rst != test) //shou dong kai guan
  153. {
  154. if(rst)
  155. {
  156. for(int k = 0; k < Output_ChN_default;k++)
  157. {
  158. AC3PPDU_RL_time[k + CH1_out].LT_state &= 0xffffff7e;
  159. orderFlag[k]=true;
  160. }
  161. }else
  162. {
  163. for(int k = 0; k < Output_ChN_default;k++)
  164. {
  165. AC3PPDU_RL_time[k + CH1_out].LT_state &= 0xffffffbf;
  166. AC3PPDU_RL_time[k + CH1_out].LT_state |= 0x00000001;
  167. orderFlag[k]=true;
  168. }
  169. }
  170. }
  171. }
  172. #else
  173. #if SUPPORT_DETECTION
  174. if(detection_value == 0)
  175. {
  176. for(int i = 0; i < Output_ChN_default;i++)
  177. {
  178. AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
  179. orderFlag[i]=true;
  180. }
  181. #if SUPPORT_ZERO_LINE
  182. AC3PPDU_RL_N_time.LT_state &= 0xffffff7e;
  183. orderFlag_N = true;
  184. #endif
  185. }
  186. #endif
  187. #endif
  188. #if SUPPORT_ZERO_LINE
  189. if(orderFlag_N)
  190. {
  191. RL_N_now_state = AC3PPDU_RL_N_time.LT_state & 0x00000001;
  192. RL_N_last_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x00000001;
  193. if(RL_N_now_state != RL_N_last_state)
  194. {
  195. if(RL_N_now_state > 0)
  196. {
  197. RL_N_ON_flag = 1;
  198. RL_N_OFF_flag = 0;
  199. if((AC3PPDU_RL_N_time.LT_state & 0x40) > 0)
  200. {
  201. RL_N_begin_delay_flag = 1;
  202. RL_N_end_delay_flag = 0;
  203. RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_ontime * 1000;
  204. } else {
  205. RL_N_begin_delay_flag = 0;
  206. RL_N_end_delay_flag = 1;
  207. RL_N_delay_Limit = 0;
  208. }
  209. }else
  210. {
  211. RL_N_ON_flag = 0;
  212. RL_N_OFF_flag = 1; // Ch N close flag
  213. if((AC3PPDU_RL_N_time.LT_state & 0x80) > 0)
  214. {
  215. RL_N_begin_delay_flag = 1;
  216. RL_N_end_delay_flag = 0;
  217. RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_offtime * 1000;
  218. }else
  219. {
  220. RL_N_begin_delay_flag = 0;
  221. RL_N_end_delay_flag = 1;
  222. RL_N_delay_Limit = 0;
  223. }
  224. }
  225. }else
  226. {
  227. RL_N_delay_Limit = 0;
  228. RL_N_begin_delay_flag = 0;
  229. RL_N_end_delay_flag = 0;
  230. RL_N_ON_flag= 0;
  231. RL_N_OFF_flag = 0;
  232. }
  233. orderFlag_N = false;
  234. AC3PPDU_RL_N_time.LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr];
  235. }
  236. #endif
  237. for(int k = 0;k < Output_ChN_default;k++)
  238. {
  239. if(orderFlag[k])
  240. {
  241. RL_now_state[k] = AC3PPDU_RL_time[k + CH1_out].LT_state & 0x00000001;
  242. RL_last_state[k] = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + k] & 0x00000001;
  243. if(RL_now_state[k] != RL_last_state[k])
  244. {
  245. if(RL_now_state[k] > 0)
  246. {
  247. RL_ON_flag[k] = 1;
  248. RL_OFF_flag[k] = 0;
  249. if((AC3PPDU_RL_time[k + CH1_out].LT_state & 0x40) > 0)//有延时
  250. {
  251. RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 1000;//秒转成毫秒
  252. RL_begin_delay_flag[k] = 1;
  253. RL_end_delay_flag[k] = 0;
  254. RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_ontime * 1000;//秒转成毫秒
  255. }else//无延时
  256. {
  257. RL_begin_delay_flag[k] = 0;
  258. RL_end_delay_flag[k] = 1;
  259. RL_delay_Limit[k] = 0;
  260. }
  261. }else
  262. {
  263. RL_OFF_flag[k] = 1;
  264. RL_ON_flag[k] = 0;
  265. if((AC3PPDU_RL_time[k + CH1_out].LT_state & 0x80) > 0)//有延时
  266. {
  267. RL_begin_delay_flag[k] = 1;
  268. RL_end_delay_flag[k] = 0;
  269. RL_delay_Limit[k] = AC3PPDU_RL_time[k + CH1_out].RL_offtime * 1000;//秒转成毫秒
  270. }else//无延时
  271. {
  272. RL_begin_delay_flag[k] = 0;
  273. RL_end_delay_flag[k] = 1;
  274. }
  275. }
  276. }else{
  277. RL_delay_Limit[k] = 0;
  278. RL_begin_delay_flag[k] = 0;
  279. RL_end_delay_flag[k] = 0;
  280. RL_ON_flag[k] = 0;
  281. RL_OFF_flag[k] = 0;
  282. }
  283. }
  284. orderFlag[k]=false;
  285. AC3PPDU_RL_time[k + CH1_out].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + k];
  286. }
  287. #if SUPPORT_ZERO_LINE
  288. if(RL_N_end_delay_flag > 0){
  289. RL_N_begin_delay_flag = 0;
  290. RL_N_end_delay_flag = 0;
  291. if(RL_N_ON_flag > 0){
  292. DB_Out4_H;
  293. RL_N_ON_flag = 0;
  294. AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] = AC3PPDU_RL_N_time.LT_state | 0x00000001;
  295. }else if(RL_N_OFF_flag > 0)
  296. {
  297. DB_Out4_L;
  298. RL_N_OFF_flag = 0;
  299. AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] = AC3PPDU_RL_N_time.LT_state & 0xfffffffe;
  300. }else{
  301. }
  302. BUFF_Data;
  303. LOCK_Data;
  304. }
  305. #endif
  306. for(int i = 0;i < Output_ChN_default;i++)
  307. {
  308. if(RL_end_delay_flag[i] > 0)
  309. {
  310. RL_begin_delay_flag[i] = 0;
  311. RL_end_delay_flag[i] = 0;
  312. if(RL_ON_flag[i] > 0)
  313. {
  314. RL_ON_flag[i] = 0;
  315. switch (i)
  316. {
  317. case 0:
  318. DB_Out1_H;
  319. break;
  320. case 1:
  321. DB_Out2_H;
  322. break;
  323. case 2:
  324. DB_Out3_H;
  325. break;
  326. default:
  327. return;
  328. }
  329. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = (AC3PPDU_RL_time[i + CH1_out].LT_state | 0x01);
  330. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
  331. }else if(RL_OFF_flag[i] > 0)
  332. {
  333. RL_OFF_flag[i] = 0;
  334. switch (i)
  335. {
  336. case 0:
  337. DB_Out1_L;
  338. break;
  339. case 1:
  340. DB_Out2_L;
  341. break;
  342. case 2:
  343. DB_Out3_L;
  344. break;
  345. default:
  346. return;
  347. }
  348. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = (AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe);
  349. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe;
  350. }else
  351. {
  352. ;
  353. }
  354. BUFF_Data;
  355. //DelayNms(5);
  356. LOCK_Data;
  357. }
  358. }
  359. RL_Allon_flag = false;
  360. RL_Alloff_flag = false;
  361. }
  362. }
  363. static void LimiT_enable_check(uint8_t ch_x,uint32_t Lt_v)
  364. {
  365. uint16_t temp0 = 0;
  366. temp0 = Lt_v >> 1;
  367. if(ch_x > 3)
  368. {
  369. return;
  370. }
  371. //通道最大电压
  372. if((temp0 & AC3PPDU_Vmax_LT_enable) == AC3PPDU_Vmax_LT_enable)
  373. {
  374. AC3PPDU_Vmax_LTen_flag[ch_x] = 1;
  375. }
  376. else
  377. {
  378. AC3PPDU_Vmax_LTen_flag[ch_x] = 0;
  379. }
  380. //最小电压
  381. if((temp0 & AC3PPDU_Vmin_LT_enable) == AC3PPDU_Vmin_LT_enable)
  382. {
  383. AC3PPDU_Vmin_LTen_flag[ch_x] = 1;
  384. }
  385. else
  386. {
  387. AC3PPDU_Vmin_LTen_flag[ch_x] = 0;
  388. }
  389. //最大电流
  390. if((temp0 & AC3PPDU_Imax_LT_enable) == AC3PPDU_Imax_LT_enable)
  391. {
  392. AC3PPDU_Imax_LTen_flag[ch_x] = 1;
  393. }
  394. else
  395. {
  396. AC3PPDU_Imax_LTen_flag[ch_x] = 0;
  397. }
  398. //最大功率
  399. if((temp0 & AC3PPDU_Wmax_LT_enable) == AC3PPDU_Wmax_LT_enable)
  400. {
  401. AC3PPDU_Wmax_LTen_flag[ch_x] = 1;
  402. }
  403. else
  404. {
  405. AC3PPDU_Wmax_LTen_flag[ch_x] = 0;
  406. }
  407. //最大电量
  408. if((temp0 & AC3PPDU_kWhmax_LT_enable) == AC3PPDU_kWhmax_LT_enable)
  409. {
  410. AC3PPDU_kWhmax_LTen_flag[ch_x] = 1;
  411. }
  412. else
  413. {
  414. AC3PPDU_kWhmax_LTen_flag[ch_x] = 0;
  415. }
  416. }
  417. static void RL_Over_Func()
  418. {
  419. if(RL_All_Func)
  420. {
  421. for(int i = 0; i < Output_ChN_default;i++)
  422. {
  423. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
  424. orderFlag[i]=true;
  425. }
  426. RL_All_Func = 0;
  427. return;
  428. }
  429. for(int i = 0; i < Output_ChN_default;i++)
  430. {
  431. if(RL_Func_statu[i+1])
  432. {
  433. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xffffff3e;
  434. orderFlag[i]=true;
  435. RL_Func_statu[i+1] = 0;
  436. }
  437. }
  438. }
  439. static void key_io_control()
  440. {
  441. if(get_detection())
  442. {
  443. AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = 0x1;
  444. }else
  445. {
  446. AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = 0x0;
  447. }
  448. }
  449. int main(void)
  450. {
  451. AC3PPDU_active_chn = Output_ChN_default;
  452. app_init(&meta_data);
  453. InitSysTick();
  454. InitLED();
  455. InitKey();
  456. InitTimer();
  457. InitRelay();
  458. Init_74hc573();
  459. InitAT24Cxx();
  460. InitUART1(9600);
  461. InitCH448F();
  462. AC3PPDU_SlaveAddress = ReadKeyValue();
  463. eMBInit(MB_RTU, AC3PPDU_SlaveAddress, 0, 115200, MB_PAR_NONE);
  464. eMBEnable();
  465. key_io_init(NULL);
  466. for(int i = 1; i <= AC3PPDU_active_chn;i++)
  467. {
  468. hlw8110_init(i);
  469. }
  470. ReadEeprom();
  471. strcpy(infomation.date,__DATE__);
  472. strcat(infomation.date," ");
  473. strcat(infomation.date,__TIME__);
  474. strcpy(infomation.ver,VERSION);
  475. Devid_IDChalNum = AC3PPDU_Device_ID;
  476. Devid_IDChalNum = Devid_IDChalNum << 8;
  477. Devid_IDChalNum += Output_ChN_default;
  478. AC3PPDU_Modbus_Reg[Mb_Dbuff_DevAddr] = Devid_IDChalNum;
  479. infomation.channels = Output_ChN_default;
  480. flash_get_infomation(&infomation);
  481. AC3PPDU_RL_time[CH_in].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_LT_ST_Addr];
  482. AC3PPDU_RL_time[CH_in].FT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr];
  483. LimiT_enable_check(CH_in,AC3PPDU_RL_time[CH_in].LT_state);
  484. Enable_74hc573_Output;
  485. // Fault_state_Last = Fault_state_Reg;
  486. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] = AC3PPDU_APlack_Fault + AC3PPDU_BPlack_Fault;
  487. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] += AC3PPDU_CPlack_Fault;
  488. for(int i = 0;i < Output_ChN_default;i++)
  489. {
  490. RL_last_state[i] = 0;
  491. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i];
  492. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] &= 0xfffffffe;
  493. AC3PPDU_RL_time[i + CH1_out].RL_ontime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Ton1_Addr + i];
  494. AC3PPDU_RL_time[i + CH1_out].RL_offtime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Toff1_Addr + i];
  495. LimiT_enable_check((i + CH1_out),AC3PPDU_RL_time[i + CH1_out].LT_state);
  496. orderFlag[i]=true;
  497. }
  498. #if SUPPORT_ZERO_LINE
  499. RL_N_last_state = 0;
  500. AC3PPDU_RL_N_time.LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr]; // add by liyi
  501. AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] &= 0xfffffffe; // add by liyi
  502. AC3PPDU_RL_N_time.RL_offtime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_ToffN_Addr]; // add by liyi
  503. AC3PPDU_RL_N_time.RL_ontime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr]; // add by liyi
  504. orderFlag_N = true;
  505. #endif
  506. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] = AC3PPDU_APlack_Fault + AC3PPDU_BPlack_Fault;
  507. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] += AC3PPDU_CPlack_Fault;
  508. #if SUPPORT_DETECTION
  509. detection_value = get_detection();
  510. #endif
  511. Fwdgt_Init();
  512. uint32_t write_eep_count = 0;
  513. while(1)
  514. {
  515. //CHK_JLINK();
  516. eMBPoll();
  517. Fwdgt_reload();
  518. check_jlink();
  519. if(flash_flag == 1){
  520. LEDFlicker2();
  521. flash_flag = 0;
  522. #if SUPPORT_DETECTION
  523. detection_value = get_detection();
  524. #endif
  525. for(int j = 0 ; j < Hlw8110_CS;j++)
  526. read_Hlw8110(j,0);
  527. normal_running_time+=2;
  528. write_eep_count ++;
  529. }
  530. if(write_eep_count >= 120) // 120 second recode
  531. {
  532. write_eep_count = 0;
  533. for(int i = 0; i < Output_ChN_default ;i++)
  534. {
  535. int temp = i << 2;
  536. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 24;
  537. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 16;
  538. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 8;
  539. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+3] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i];
  540. }
  541. AT24CxxWrite(ERom_TotalWh1_Addr,(Eeprom_Rbuf + ERom_TotalWh1_Addr),4*Output_ChN_default);
  542. }
  543. AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
  544. AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
  545. AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
  546. AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
  547. AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
  548. AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
  549. AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
  550. AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
  551. AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
  552. AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
  553. AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] = hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
  554. AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
  555. for(int i = 0;i < (Output_ChN_default + 1);i++)
  556. {
  557. Fault_state_process(i);
  558. }
  559. RL_Over_Func();
  560. MODbus_CMD_New();
  561. }
  562. }
  563. static void MODbus_CMD_New(void)
  564. {
  565. if(Modbus_Wr_buff[Wr_eeprom_cnt][0] > 0)
  566. {
  567. uint8_t i = 0;
  568. uint32_t temp_addr;
  569. uint32_t base_addr = Modbus_Wr_buff[Wr_eeprom_cnt][1];
  570. uint32_t data = Modbus_Wr_buff[Wr_eeprom_cnt][2];
  571. uint32_t value = 0;
  572. switch(base_addr)
  573. {
  574. case Mb_Dbuff_ViLit_max_Addr ... Mb_Dbuff_kWhiLit_max_Addr: //input votage max votage min current power coustermer add by liyi
  575. {
  576. temp_addr = base_addr - Mb_Dbuff_ViLit_max_Addr;
  577. temp_addr = temp_addr << 2;
  578. temp_addr += ERom_ViLit_max_Addr;
  579. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  580. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  581. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  582. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  583. AC3PPDU_Modbus_Reg[base_addr] = data;
  584. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  585. }
  586. break;
  587. case Mb_Dbuff_VLit1_max_Addr ... Mb_Dbuff_VLit9_max_Addr: //output voltage max threod for 1,2,3,4,5,6,7,8,9 channels
  588. {
  589. temp_addr = base_addr - Mb_Dbuff_VLit1_max_Addr;
  590. value = temp_addr;
  591. temp_addr = temp_addr << 2;
  592. temp_addr += ERom_VLit1_max_Addr;
  593. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  594. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  595. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  596. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  597. AC3PPDU_Modbus_Reg[base_addr] = data;
  598. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  599. {
  600. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Vmax_Threshould_Disable);
  601. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  602. }
  603. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  604. }
  605. break;
  606. case Mb_Dbuff_VLit1_min_Addr ... Mb_Dbuff_VLit9_min_Addr: //output voltage min thred for 1,2,3,4,5,6,7,8,9 channels
  607. {
  608. temp_addr = base_addr - Mb_Dbuff_VLit1_min_Addr;
  609. value = temp_addr;
  610. temp_addr = temp_addr << 2;
  611. temp_addr += ERom_VLit1_min_Addr;
  612. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  613. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  614. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  615. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  616. AC3PPDU_Modbus_Reg[base_addr] = data;
  617. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  618. {
  619. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Vmin_Threshould_Disable);
  620. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  621. }
  622. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  623. }
  624. break;
  625. case Mb_Dbuff_ILit1_max_Addr ... Mb_Dbuff_ILit9_max_Addr: // output current max throud for 1,2,3,4,5,6,7,8,9 channels
  626. {
  627. temp_addr = base_addr - Mb_Dbuff_ILit1_max_Addr;
  628. value = temp_addr;
  629. temp_addr = temp_addr << 2;
  630. temp_addr += ERom_ILit1_max_Addr;
  631. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  632. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  633. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  634. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  635. AC3PPDU_Modbus_Reg[base_addr] = data;
  636. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  637. {
  638. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Imax_Threshould_Disable);
  639. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  640. }
  641. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  642. }
  643. break;
  644. case Mb_Dbuff_WLit1_max_Addr ... Mb_Dbuff_WLit9_max_Addr: //output power max .....
  645. {
  646. temp_addr = base_addr - Mb_Dbuff_WLit1_max_Addr;
  647. value = temp_addr;
  648. temp_addr = temp_addr << 2;
  649. temp_addr += ERom_WLit1_max_Addr;
  650. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  651. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  652. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  653. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  654. AC3PPDU_Modbus_Reg[base_addr] = data;
  655. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  656. {
  657. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Wmax_Threshould_Disable);
  658. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  659. }
  660. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  661. }
  662. break;
  663. case Mb_Dbuff_kWhLit1_max_Addr ... Mb_Dbuff_kWhLit9_max_Addr: //output customers max .....
  664. {
  665. temp_addr = base_addr - Mb_Dbuff_kWhLit1_max_Addr;
  666. value = temp_addr;
  667. temp_addr = temp_addr << 2;
  668. temp_addr += ERom_kWhLit1_max_Addr;
  669. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  670. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  671. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  672. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  673. AC3PPDU_Modbus_Reg[base_addr] = data;
  674. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  675. {
  676. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Kwhmax_Threshould_Disable);
  677. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  678. }
  679. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  680. }
  681. break;
  682. case Mb_Dbuff_RL_Allon_Addr: //relay all on
  683. {
  684. RL_Allon_flag = true;
  685. for(i = 0;i < Output_ChN_default;i++)
  686. {
  687. temp_addr = i << 1;
  688. Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
  689. AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
  690. orderFlag[i]=true;
  691. }
  692. orderFlag_N = true;
  693. AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
  694. Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x41;
  695. AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
  696. AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
  697. }
  698. break;
  699. case Mb_Dbuff_RL_Alloff_Addr: //relay all off
  700. {
  701. RL_Alloff_flag = true;
  702. for(i = 0;i < Output_ChN_default;i++)
  703. {
  704. temp_addr = i << 1;
  705. Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
  706. Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
  707. AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
  708. orderFlag[i]=true;
  709. }
  710. orderFlag_N = true;
  711. AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
  712. Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x80;
  713. Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] & 0xfe;
  714. AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
  715. AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
  716. }
  717. break;
  718. case Mb_Dbuff_LT_ST_Addr: //set input status
  719. {
  720. AC3PPDU_RL_time[CH_in].LT_state = data;
  721. Eeprom_Rbuf[ERom_LT_ST_Addr] = data;
  722. AC3PPDU_Modbus_Reg[base_addr] = data;
  723. AT24CxxWriteOneByte(ERom_LT_ST_Addr,Eeprom_Rbuf[ERom_LT_ST_Addr]);
  724. LimiT_enable_check(CH_in,AC3PPDU_RL_time[CH_in].LT_state);
  725. }
  726. break;
  727. case Mb_Dbuff_CH1LT_ST_Addr ... Mb_Dbuff_CHNLT_ST_Addr: //set output relay statues
  728. {
  729. temp_addr = base_addr - Mb_Dbuff_CH1LT_ST_Addr;
  730. if(temp_addr == 9) { //Ch N
  731. AC3PPDU_RL_N_time.LT_state = data;
  732. orderFlag_N = true;
  733. }else{
  734. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  735. {
  736. data &= (Shield_Vmax_Threshould_Disable);
  737. }
  738. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  739. {
  740. data &= (Shield_Vmin_Threshould_Disable);
  741. }
  742. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  743. {
  744. data &= (Shield_Imax_Threshould_Disable);
  745. }
  746. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  747. {
  748. data &= (Shield_Wmax_Threshould_Disable);
  749. }
  750. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  751. {
  752. data &= (Shield_Kwhmax_Threshould_Disable);
  753. }
  754. AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
  755. orderFlag[temp_addr]=true;
  756. LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
  757. }
  758. temp_addr = temp_addr << 1;
  759. temp_addr += ERom_CH1LT_ST_Addr;
  760. Eeprom_Rbuf[temp_addr] = data;
  761. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  762. }
  763. break;
  764. case Mb_Dbuff_OUTCH1_ST_Addr ... Mb_Dbuff_OUTCH3_ST_Addr: //set output channel relay's status
  765. {
  766. temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
  767. //OutUnit_control_flag[temp_addr] = 1;
  768. temp_addr *= 3;
  769. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  770. {
  771. data &= (Shield_Vmax_Threshould_Disable);
  772. }
  773. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  774. {
  775. data &= (Shield_Vmin_Threshould_Disable);
  776. }
  777. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  778. {
  779. data &= (Shield_Imax_Threshould_Disable);
  780. }
  781. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  782. {
  783. data &= (Shield_Wmax_Threshould_Disable);
  784. }
  785. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  786. {
  787. data &= (Shield_Kwhmax_Threshould_Disable);
  788. }
  789. AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
  790. AC3PPDU_RL_time[temp_addr + CH2_out].LT_state = data;
  791. AC3PPDU_RL_time[temp_addr + CH3_out].LT_state = data;
  792. for(int i=0;i<Output_ChN_default;i++)
  793. {
  794. orderFlag[i]=true;
  795. }
  796. //orderFlag_N = true;
  797. LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
  798. LimiT_enable_check((temp_addr + CH2_out),AC3PPDU_RL_time[temp_addr + CH2_out].LT_state);
  799. LimiT_enable_check((temp_addr + CH3_out),AC3PPDU_RL_time[temp_addr + CH3_out].LT_state);
  800. temp_addr = temp_addr << 1;
  801. Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr] = data;
  802. Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr] = data;
  803. Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr] = data;
  804. AT24CxxWriteOneByte(temp_addr + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr]);
  805. AT24CxxWriteOneByte(temp_addr + ERom_CH2LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr]);
  806. AT24CxxWriteOneByte(temp_addr + ERom_CH3LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr]);
  807. }
  808. break;
  809. case Mb_Dbuff_RL_Ton1_Addr ... Mb_Dbuff_RL_TonN_Addr: //set on status delay for 1,2,3,4,5,6,7,8,9,N channels
  810. {
  811. temp_addr = base_addr - Mb_Dbuff_RL_Ton1_Addr;
  812. if(temp_addr == 9){ //Ch N add by liyi
  813. AC3PPDU_RL_N_time.RL_ontime = data;
  814. }else
  815. {
  816. AC3PPDU_RL_time[temp_addr + CH1_out].RL_ontime = data;
  817. }
  818. AC3PPDU_RL_N_time.RL_ontime = data;
  819. temp_addr += ERom_RL_Ton1_Addr;
  820. Eeprom_Rbuf[temp_addr] = data;
  821. Eeprom_Rbuf[ERom_RL_TonN_Addr] = data;
  822. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  823. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr] = Eeprom_Rbuf[ERom_RL_TonN_Addr];
  824. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  825. AT24CxxWriteOneByte(ERom_RL_TonN_Addr,Eeprom_Rbuf[ERom_RL_TonN_Addr]);
  826. }
  827. break;
  828. case Mb_Dbuff_RL_Toff1_Addr ... Mb_Dbuff_RL_ToffN_Addr: //set off status delay for 1,2,3,4,5,6,7,8,9,N channels
  829. {
  830. temp_addr = base_addr - Mb_Dbuff_RL_Toff1_Addr;
  831. if(temp_addr == 9){
  832. AC3PPDU_RL_N_time.RL_offtime = data;
  833. }else {
  834. AC3PPDU_RL_time[temp_addr + CH1_out].RL_offtime = data;
  835. }
  836. AC3PPDU_RL_N_time.RL_offtime = data;
  837. temp_addr += ERom_RL_Toff1_Addr;
  838. Eeprom_Rbuf[temp_addr] = data;
  839. Eeprom_Rbuf[ERom_RL_ToffN_Addr] = data;
  840. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  841. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_ToffN_Addr] = Eeprom_Rbuf[ERom_RL_ToffN_Addr];
  842. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  843. AT24CxxWriteOneByte(ERom_RL_ToffN_Addr,Eeprom_Rbuf[ERom_RL_ToffN_Addr]);
  844. }
  845. break;
  846. case Mb_Dbuff_RL_Over_Ch1_Func ... Mb_Dbuff_RL_Over_Ch9_Func: //threod over limit operation
  847. {
  848. temp_addr = base_addr - Mb_Dbuff_RL_Over_Ch1_Func;
  849. temp_addr += ERom_RL_Over_Ch1_Addr;
  850. Eeprom_Rbuf[temp_addr] = data;
  851. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  852. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  853. }
  854. break;
  855. case Mb_Dbuff_Clear_Chn1_Consumer ... Mb_Dbuff_Clear_Chn9_Consumer:
  856. {
  857. if(data)
  858. {
  859. temp_addr = base_addr - Mb_Dbuff_Clear_Chn1_Consumer;
  860. hlw8110_base[temp_addr+CH1_out] = 0;
  861. hlw8110_store[temp_addr+CH1_out] = 0.0;
  862. }
  863. }
  864. case Mb_Dbuff_Clear_Chnall_Consumer:
  865. {
  866. if(data){
  867. for(i = 0; i < Output_ChN_default;i++)
  868. {
  869. hlw8110_base[i+CH1_out] = 0;
  870. hlw8110_store[i+CH1_out] = 0.0;
  871. }
  872. }
  873. }
  874. break;
  875. case Mb_Dbuff_All_ViLit_Max ... Mb_Dbuff_All_kWhiLit_Max:
  876. {
  877. temp_addr = base_addr - Mb_Dbuff_All_ViLit_Max;
  878. temp_addr = temp_addr << 2;
  879. temp_addr += ERom_VILit_All_max_Addr;
  880. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  881. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  882. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  883. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  884. AC3PPDU_Modbus_Reg[base_addr] = data;
  885. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  886. switch (base_addr - Mb_Dbuff_All_ViLit_Max)
  887. {
  888. case 0:
  889. {
  890. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  891. {
  892. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Vmax_Threshould_Disable);
  893. }else
  894. {
  895. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Vmax_Threshould_enable);
  896. }
  897. }
  898. break;
  899. case 1:
  900. {
  901. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  902. {
  903. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Vmin_Threshould_Disable);
  904. }else
  905. {
  906. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Vmin_Threshould_enable);
  907. }
  908. }
  909. break;
  910. case 2:
  911. {
  912. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  913. {
  914. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Imax_Threshould_Disable);
  915. }else
  916. {
  917. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Imax_Threshould_enable);
  918. }
  919. }
  920. break;
  921. case 3:
  922. {
  923. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  924. {
  925. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Wmax_Threshould_Disable);
  926. }else
  927. {
  928. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Wmax_Threshould_enable);
  929. }
  930. }
  931. break;
  932. case 4:
  933. {
  934. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  935. {
  936. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Kwhmax_Threshould_Disable);
  937. }else
  938. {
  939. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_kWhmax_Threshould_enable);
  940. }
  941. }
  942. break;
  943. }
  944. }
  945. break;
  946. case Mb_Dbuff_All_OverFunc:
  947. {
  948. temp_addr = base_addr - Mb_Dbuff_All_OverFunc;
  949. temp_addr += Mb_Dbuff_All_OverFunc;
  950. Eeprom_Rbuf[temp_addr] = data;
  951. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  952. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  953. }
  954. break;
  955. case Mb_Dbuff_break_Addr:
  956. {
  957. break_2_boot_upgreade();
  958. }
  959. break;
  960. default:
  961. break;
  962. }
  963. Modbus_Wr_buff[Wr_eeprom_cnt][0] = 0;
  964. //Wr_eeprom_begin_flag = true;
  965. }
  966. Wr_eeprom_cnt++;
  967. if(Wr_eeprom_cnt >= Mb_Wcmd_Width)
  968. {
  969. Wr_eeprom_cnt = 0;
  970. }
  971. }
  972. //static void MODbus_CMD_New(void)
  973. //{
  974. // if(Modbus_Wr_buff[Wr_eeprom_cnt][0] > 0)
  975. // {
  976. // uint8_t i = 0;
  977. // uint32_t temp_addr;
  978. // uint32_t base_addr = Modbus_Wr_buff[Wr_eeprom_cnt][1];
  979. // uint32_t data = Modbus_Wr_buff[Wr_eeprom_cnt][2];
  980. // uint32_t value = 0;
  981. //
  982. // switch(base_addr)
  983. // {
  984. // case Mb_Dbuff_RL_Allon_Addr:
  985. // {
  986. // DB_Out1_H;
  987. // DB_Out2_H;
  988. // DB_Out3_H;
  989. // BUFF_Data;
  990. // LOCK_Data;
  991. // }
  992. // break;
  993. // case Mb_Dbuff_RL_Alloff_Addr:
  994. // {
  995. // DB_Out1_L;
  996. // DB_Out2_L;
  997. // DB_Out3_L;
  998. // BUFF_Data;
  999. // LOCK_Data;
  1000. // }
  1001. // break;
  1002. // }
  1003. // Modbus_Wr_buff[Wr_eeprom_cnt][0] = 0;
  1004. // }
  1005. // Wr_eeprom_cnt++;
  1006. // if(Wr_eeprom_cnt >= Mb_Wcmd_Width)
  1007. // {
  1008. // Wr_eeprom_cnt = 0;
  1009. // }
  1010. //}
  1011. static void Fault_state_process(uint8_t ch_x)
  1012. {
  1013. uint16_t i = 0;
  1014. if(ch_x != CH_in)
  1015. i = (ch_x -1)<< 3;
  1016. if(ch_x == CH_in)
  1017. {
  1018. uint32_t sort_buff[3] = {0};
  1019. uint32_t Vmax = 0;
  1020. uint32_t Vmin = 0;
  1021. sort_buff[0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
  1022. sort_buff[1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
  1023. sort_buff[2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr];
  1024. Vmax = (sort_buff[0] >= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
  1025. Vmax = (Vmax >= sort_buff[2]) ? Vmax : sort_buff[2];
  1026. Vmin = (sort_buff[0] <= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
  1027. Vmin = (Vmin <= sort_buff[2]) ? Vmin : sort_buff[2];
  1028. if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
  1029. {
  1030. uint32_t v_mid = AC3PPDU_Lack_Voltage *2;
  1031. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
  1032. {
  1033. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
  1034. }
  1035. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
  1036. {
  1037. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
  1038. }
  1039. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
  1040. {
  1041. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] =1;
  1042. }
  1043. }else
  1044. {
  1045. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
  1046. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
  1047. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
  1048. }
  1049. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Vmax_Threshould_enable) > 0)
  1050. {
  1051. if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Max])
  1052. {
  1053. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmax_Fault;
  1054. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
  1055. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_V_Max_Func_enable)
  1056. {
  1057. RL_All_Func = 1;
  1058. }
  1059. }else if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Min])
  1060. {
  1061. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmax_NFault;
  1062. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
  1063. }else
  1064. {
  1065. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmax_NFault;
  1066. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmin_Fault;
  1067. }
  1068. }
  1069. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Vmin_Threshould_enable) > 0)
  1070. {
  1071. if(AC_BASE[0] < AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Min])
  1072. {
  1073. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmin_Fault;
  1074. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_V_Min_Func_enable)
  1075. {
  1076. RL_All_Func = 1;
  1077. }
  1078. }
  1079. else//小于最小
  1080. {
  1081. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
  1082. }
  1083. }
  1084. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Imax_Threshould_enable) > 0)
  1085. {
  1086. if(AC_BASE[1] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_IiLit_Max])
  1087. {
  1088. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Imax_Fault;
  1089. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_I_Max_Func_enable)
  1090. {
  1091. RL_All_Func = 1;
  1092. }
  1093. }
  1094. else
  1095. {
  1096. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Imax_NFault;
  1097. }
  1098. }
  1099. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Wmax_Threshould_enable) > 0)
  1100. {
  1101. if(AC_BASE[2] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_WiLit_Max])
  1102. {
  1103. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Wmax_Fault;
  1104. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_P_Max_Func_enable)
  1105. {
  1106. RL_All_Func = 1;
  1107. }
  1108. }
  1109. else
  1110. {
  1111. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Wmax_NFault;
  1112. }
  1113. }
  1114. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_kWhmax_Threshould_enable) > 0)
  1115. {
  1116. if(AC_BASE[3] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_kWhiLit_Max])
  1117. {
  1118. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_kWhmax_Fault;
  1119. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_C_Max_Func_enable)
  1120. {
  1121. RL_All_Func = 1;
  1122. }
  1123. }
  1124. else
  1125. {
  1126. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_kWhmax_NFault;
  1127. }
  1128. }
  1129. return;
  1130. }
  1131. ////电压最大、最小、缺相阈值使能,进行判断
  1132. if(AC3PPDU_Vmax_LTen_flag[ch_x] > 0)
  1133. {
  1134. if(ch_x > CH_in)//输出通道
  1135. {
  1136. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + ch_x-1])//大于最大
  1137. {
  1138. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmax_Fault;
  1139. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1140. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func+ch_x-1] & (AC3PPDU_Over_V_Max_Func_enable)) //is or not open func
  1141. {
  1142. RL_Func_statu[ch_x] = 1;
  1143. }
  1144. }
  1145. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + ch_x-1])//大于最小,小于最大,正常
  1146. {
  1147. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
  1148. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1149. }
  1150. else//小于最小
  1151. {
  1152. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
  1153. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmin_Fault;
  1154. }
  1155. }
  1156. else//输入通道
  1157. {
  1158. //A相
  1159. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
  1160. {
  1161. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AVmax_Fault;
  1162. }
  1163. else
  1164. {
  1165. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmax_NFault;
  1166. }
  1167. //B相
  1168. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
  1169. {
  1170. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BVmax_Fault;
  1171. }
  1172. else
  1173. {
  1174. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmax_NFault;
  1175. }
  1176. //C相
  1177. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
  1178. {
  1179. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CVmax_Fault;
  1180. }
  1181. else
  1182. {
  1183. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmax_NFault;
  1184. }
  1185. }
  1186. }
  1187. else
  1188. {
  1189. if(ch_x > CH_in)
  1190. {
  1191. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
  1192. }
  1193. else
  1194. {
  1195. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmax_NFault;
  1196. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmax_NFault;
  1197. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmax_NFault;
  1198. }
  1199. }
  1200. //最小电压
  1201. if(AC3PPDU_Vmin_LTen_flag[ch_x] > 0)
  1202. {
  1203. if(ch_x > CH_in)//输出通道
  1204. {
  1205. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] < AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + ch_x -1])//大于最大 revice by liyi max -> min
  1206. {
  1207. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmin_Fault;
  1208. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x - 1] & (AC3PPDU_Over_V_Min_Func_enable)) //is or not open func add by liyi
  1209. {
  1210. RL_Func_statu[ch_x] = 1;
  1211. }
  1212. }
  1213. else//小于最小
  1214. {
  1215. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1216. }
  1217. }
  1218. else//输入通道
  1219. {
  1220. //A相
  1221. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//
  1222. {
  1223. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
  1224. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
  1225. }
  1226. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > 1000)
  1227. {
  1228. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AVmin_Fault;
  1229. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
  1230. }
  1231. else
  1232. {
  1233. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
  1234. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_APlack_Fault;
  1235. }
  1236. //B相
  1237. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//
  1238. {
  1239. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
  1240. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
  1241. }
  1242. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > 1000)
  1243. {
  1244. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BVmin_Fault;
  1245. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
  1246. }
  1247. else
  1248. {
  1249. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
  1250. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BPlack_Fault;
  1251. }
  1252. //C相
  1253. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//超限
  1254. {
  1255. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
  1256. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
  1257. }
  1258. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > 1000)
  1259. {
  1260. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CVmin_Fault;
  1261. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
  1262. }
  1263. else
  1264. {
  1265. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
  1266. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CPlack_Fault;
  1267. }
  1268. }
  1269. }
  1270. else
  1271. {
  1272. if(ch_x > CH_in)
  1273. {
  1274. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1275. }
  1276. else
  1277. {
  1278. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
  1279. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
  1280. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
  1281. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > 1000)
  1282. {
  1283. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
  1284. }
  1285. else
  1286. {
  1287. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_APlack_Fault;
  1288. }
  1289. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > 1000)
  1290. {
  1291. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
  1292. }
  1293. else
  1294. {
  1295. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BPlack_Fault;
  1296. }
  1297. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > 1000)
  1298. {
  1299. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
  1300. }
  1301. else
  1302. {
  1303. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CPlack_Fault;
  1304. }
  1305. }
  1306. }
  1307. //电流最大
  1308. if(AC3PPDU_Imax_LTen_flag[ch_x] > 0)
  1309. {
  1310. if(ch_x > CH_in)//输出通道
  1311. {
  1312. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 1 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + ch_x -1])
  1313. {
  1314. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Imax_Fault;
  1315. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_I_Max_Func_enable)) //is or not open func add by liyi
  1316. {
  1317. RL_Func_statu[ch_x] = 1;
  1318. }
  1319. }
  1320. else
  1321. {
  1322. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Imax_NFault;
  1323. }
  1324. }
  1325. else//输入通道
  1326. {
  1327. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
  1328. {
  1329. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AImax_Fault;
  1330. }
  1331. else
  1332. {
  1333. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AImax_NFault;
  1334. }
  1335. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
  1336. {
  1337. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BImax_Fault;
  1338. }
  1339. else
  1340. {
  1341. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BImax_NFault;
  1342. }
  1343. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
  1344. {
  1345. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CImax_Fault;
  1346. }
  1347. else
  1348. {
  1349. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CImax_NFault;
  1350. }
  1351. }
  1352. }
  1353. else
  1354. {
  1355. if(ch_x > CH_in)
  1356. {
  1357. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Imax_NFault;
  1358. }
  1359. else
  1360. {
  1361. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AImax_NFault;
  1362. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BImax_NFault;
  1363. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CImax_NFault;
  1364. }
  1365. }
  1366. //功率最大
  1367. if(AC3PPDU_Wmax_LTen_flag[ch_x] > 0)
  1368. {
  1369. if(ch_x > CH_in)//输出通道
  1370. {
  1371. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 2 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + ch_x -1])
  1372. {
  1373. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Wmax_Fault;
  1374. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_P_Max_Func_enable)) //is or not open func add by liyi
  1375. {
  1376. RL_Func_statu[ch_x] = 1;
  1377. }
  1378. }
  1379. else
  1380. {
  1381. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Wmax_NFault;
  1382. }
  1383. }
  1384. else//输入通道
  1385. {
  1386. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1387. {
  1388. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AWmax_Fault;
  1389. }
  1390. else
  1391. {
  1392. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AWmax_NFault;
  1393. }
  1394. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1395. {
  1396. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BWmax_Fault;
  1397. }
  1398. else
  1399. {
  1400. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BWmax_NFault;
  1401. }
  1402. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1403. {
  1404. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CWmax_Fault;
  1405. }
  1406. else
  1407. {
  1408. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CWmax_NFault;
  1409. }
  1410. }
  1411. }
  1412. else
  1413. {
  1414. if(ch_x > CH_in)
  1415. {
  1416. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Wmax_NFault;
  1417. }
  1418. else
  1419. {
  1420. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AWmax_NFault;
  1421. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BWmax_NFault;
  1422. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CWmax_NFault;
  1423. }
  1424. }
  1425. //电量最大
  1426. if(AC3PPDU_kWhmax_LTen_flag[ch_x] > 0)
  1427. {
  1428. if(ch_x > CH_in)//输出通道
  1429. {
  1430. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 6 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + ch_x-1])
  1431. {
  1432. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_kWhmax_Fault;
  1433. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_C_Max_Func_enable)) //is or not open func add by liyi
  1434. {
  1435. RL_Func_statu[ch_x] = 1;
  1436. }
  1437. }
  1438. else
  1439. {
  1440. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_kWhmax_NFault;
  1441. }
  1442. }
  1443. else//输入通道
  1444. {
  1445. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1446. {
  1447. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AkWhmax_Fault;
  1448. }
  1449. else
  1450. {
  1451. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AkWhmax_NFault;
  1452. }
  1453. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1454. {
  1455. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BkWhmax_Fault;
  1456. }
  1457. else
  1458. {
  1459. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BkWhmax_NFault;
  1460. }
  1461. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1462. {
  1463. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CkWhmax_Fault;
  1464. }
  1465. else
  1466. {
  1467. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CkWhmax_NFault;
  1468. }
  1469. }
  1470. }
  1471. else
  1472. {
  1473. if(ch_x > CH_in)
  1474. {
  1475. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_kWhmax_NFault;
  1476. }
  1477. else
  1478. {
  1479. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AkWhmax_NFault;
  1480. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BkWhmax_NFault;
  1481. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CkWhmax_NFault;
  1482. }
  1483. }
  1484. }
  1485. #ifdef USE_FULL_ASSERT
  1486. void assert_failed(uint8_t* file, uint32_t line)
  1487. {
  1488. while (1);
  1489. }
  1490. #else
  1491. void __aeabi_assert(const char * x1, const char * x2, int x3)
  1492. {
  1493. (void)x3;
  1494. }
  1495. #endif