SmartPDCode/GD32F427/hardware/ctrl_board/bsp_ctrl.c

#include "bsp_ctrl.h"
#include "stdint.h"
#include "string.h"






static uint8_t dma_send[512] = {0};
static uint8_t dma_recive[2][512] = {0};



static usart_t ctrl_uart={0};

static int usart0_recive(uint8_t *recive);
static int usart0_send(uint8_t *send,uint16_t len);


usart_t* get_ctrl()
{
	return &ctrl_uart;
}


static void ctrl_gpio(void)
{
		rcu_periph_clock_enable(RCU_GPIOA);  

    gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_9);
    gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_10);
  
		gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_9);
    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9);

	  gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_10);
    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_10);
	

}

static void ctrl_usart(uint32_t baund)
{
		rcu_periph_clock_enable(RCU_USART0);
		usart_deinit(USART0);
	  usart_baudrate_set(USART0, baund);         
    usart_word_length_set(USART0, USART_WL_8BIT); 
    usart_stop_bit_set(USART0, USART_STB_1BIT);   
    usart_parity_config(USART0, USART_PM_NONE);  
    usart_transmit_config(USART0, USART_TRANSMIT_ENABLE);
		usart_receive_config(USART0,USART_RECEIVE_ENABLE);
		usart_interrupt_enable(USART0,USART_INT_IDLE);
		usart_interrupt_flag_clear(USART0,USART_INT_FLAG_IDLE);
		nvic_irq_enable(USART0_IRQn, 5, 2);
    usart_enable(USART0);
}

static void dma_config(void)
{
	rcu_periph_clock_enable(RCU_DMA1);
	dma_single_data_parameter_struct dma_init_struct;

  dma_single_data_para_struct_init(&dma_init_struct);
  dma_deinit(DMA1, DMA_CH7);
  dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
  dma_init_struct.memory0_addr = (uint32_t)(&dma_send);
  dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
  dma_init_struct.number = (uint32_t)(512);
  dma_init_struct.periph_addr = ((uint32_t)&USART_DATA(USART0));
  dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  dma_init_struct.priority = DMA_PRIORITY_LOW;
  dma_single_data_mode_init(DMA1, DMA_CH7, &dma_init_struct);	
	
	
	dma_deinit(DMA1, DMA_CH2);
  dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
  dma_init_struct.memory0_addr = (uint32_t)(&dma_recive[0][0]);
  dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
  dma_init_struct.number = (512);
  dma_init_struct.periph_addr = ((uint32_t)&USART_DATA(USART0));
  dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  dma_init_struct.priority = DMA_PRIORITY_LOW;
	dma_single_data_mode_init(DMA1, DMA_CH2, &dma_init_struct);	
	
	
	dma_circulation_disable(DMA1, DMA_CH2);
  dma_channel_subperipheral_select(DMA1, DMA_CH2, DMA_SUBPERI4);
	usart_dma_receive_config(USART0,USART_RECEIVE_DMA_ENABLE);
	
	dma_circulation_disable(DMA1, DMA_CH7);
  dma_channel_subperipheral_select(DMA1, DMA_CH7, DMA_SUBPERI4);
	usart_dma_transmit_config(USART0,USART_TRANSMIT_DMA_ENABLE);
	
//	dma_flag_clear(DMA0,DMA_CH5,DMA_FLAG_FTF);
//	dma_flag_clear(DMA0,DMA_CH6,DMA_FLAG_FTF);
	
	//dma_channel_enable(DMA0, DMA_CH6);
	dma_channel_enable(DMA1, DMA_CH2);
}



void bsp_ctrl_init(void)
{
		ctrl_gpio();
		ctrl_usart(38400);
		dma_config();
		ctrl_uart.send = usart0_send;
		ctrl_uart.recive = usart0_recive;
}

void USART0_IRQHandler(void)
{
	uint16_t len= 0;
	if(usart_interrupt_flag_get(USART0, USART_INT_FLAG_IDLE)) {
		USART_STAT0(USART0);
		USART_DATA(USART0);
		dma_channel_disable(DMA1, DMA_CH2);
		ctrl_uart.recive_len = 512 - dma_transfer_number_get(DMA1, DMA_CH2);
		ctrl_uart.recive_complete = SET;
		ctrl_uart.curent_recive_id = (ctrl_uart.curent_recive_id == 0) ? 1 : 0;
		dma_memory_address_config(DMA1, DMA_CH2,DMA_MEMORY_0,(uint32_t)(&dma_recive[ctrl_uart.curent_recive_id][0]));
    dma_transfer_number_config(DMA1, DMA_CH2, 512);
		//usart_dma_receive_config(USART0, USART_RECEIVE_DMA_ENABLE);
		dma_flag_clear(DMA1,DMA_CH2,DMA_FLAG_FTF);
    dma_channel_enable(DMA1, DMA_CH2);
	}
}

static int usart0_send(uint8_t *send,uint16_t len)
{
	dma_channel_disable(DMA1,DMA_CH7);
	memcpy(dma_send,send,len);
	dma_transfer_number_config(DMA1, DMA_CH7,len);
	dma_channel_enable(DMA1,DMA_CH7);
	while(!dma_flag_get(DMA1, DMA_CH7, DMA_FLAG_FTF)){
		vTaskDelay(1);
	}
	dma_flag_clear(DMA1, DMA_CH7, DMA_FLAG_FTF);
	ctrl_uart.recive_complete = RESET;
	return 0;
}


static int usart0_recive(uint8_t *recive)
{
	uint8_t id = ctrl_uart.curent_recive_id == 1 ? 0 : 1;
	memcpy(recive,&dma_recive[id][0],ctrl_uart.recive_len);
	
	return ctrl_uart.recive_len;
}