main.c 51 KB

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  1. #include "gd32e23x.h"
  2. #include "systick.h"
  3. #include <stdio.h>
  4. #include "main.h"
  5. #include "Fwdgt.h"
  6. #include "mb.h"
  7. #include "Led.h"
  8. #include "Key.h"
  9. #include "cfg.h"
  10. #include "gd32e23x_fmc.h"
  11. #include "string.h"
  12. #include "Timer.h"
  13. #include "Fwdgt.h"
  14. #include "stdbool.h"
  15. #include "At24cxx.h"
  16. #include "Sn74hc573.h"
  17. #include "Relay.h"
  18. #include "ReadEeprom.h"
  19. #include "Uart1.h"
  20. #include "Hlw8110.h"
  21. #include "key_io.h"
  22. AC_Output_struct_Reg AC3PPDU_Output[Output_ChN_default + 2] = {0};
  23. AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_time[Output_ChN_default + 2] = {0};
  24. AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_N_time;
  25. static uint8_t AC3PPDU_SlaveAddress = 0x00;
  26. uint16_t Devid_IDChalNum = 0;
  27. bool RL_Allon_flag = false;
  28. bool RL_Alloff_flag = false;
  29. bool Start_Read_Flag = false;
  30. uint16_t CurrentAddr = 0;
  31. uint8_t flash_flag = 0;
  32. uint32_t AC3PPDU_Modbus_Reg[AC3PPDU_Modbus_Reg_len] = {0};
  33. uint8_t AC3PPDU_active_chn;
  34. information_t infomation;
  35. uint32_t hlw8110_base[Output_ChN_default + 1] = {0}; //add by liyi
  36. uint8_t Wr_eeprom_cnt = 0;
  37. uint8_t RL_begin_delay_flag[Output_ChN_default+1] = {0x00};
  38. uint8_t RL_end_delay_flag[Output_ChN_default+1] = {0x00};
  39. uint8_t RL_ON_flag[Output_ChN_default+1] = {0x00};
  40. uint8_t RL_OFF_flag[Output_ChN_default+1] = {0x00};
  41. uint8_t RL_last_state[Output_ChN_default+1] = {0x00};
  42. uint8_t RL_now_state[Output_ChN_default+1] = {0x00};
  43. uint8_t RL_Func_statu[Output_ChN_default + 1] = {0x00};
  44. uint8_t RL_All_Func = 0x0;
  45. uint32_t normal_running_time = 0;
  46. uint8_t RL_N_begin_delay_flag = 0x0; // add by liyi
  47. uint8_t RL_N_end_delay_flag = 0x0; // add by liyi
  48. uint8_t RL_N_ON_flag = 0x0; // add by liyi
  49. uint8_t RL_N_OFF_flag = 0x0; // add by liyi
  50. uint8_t RL_N_last_state = 0x0; // add by liyi
  51. uint8_t RL_N_now_state = 0x0; // add by liyi
  52. uint8_t AC3PPDU_Vmax_LTen_flag[Output_ChN_default+1] = {0x01};
  53. uint8_t AC3PPDU_Vmin_LTen_flag[Output_ChN_default+1] = {0x01};
  54. uint8_t AC3PPDU_Imax_LTen_flag[Output_ChN_default+1] = {0x01};
  55. uint8_t AC3PPDU_Wmax_LTen_flag[Output_ChN_default+1] = {0x01};
  56. uint8_t AC3PPDU_kWhmax_LTen_flag[Output_ChN_default+1] = {0x01};
  57. uint32_t AC_BASE[4] = {0};
  58. META_DATA_S meta_data = {0};
  59. uint8_t write_kwh2Eeprom_flag = 0;
  60. extern float hlw8110_store[Output_ChN_default + 1];
  61. extern uint32_t Modbus_Wr_buff[Mb_Wcmd_Width][Mb_Wcmd_len];
  62. extern uint32_t RL_N_delay_cnt; // add by liyi
  63. extern uint32_t RL_N_delay_Limit; // add by liyi
  64. extern uint32_t RL_delay_Limit[Output_ChN_default + 1];
  65. static void MODbus_CMD_New(void);
  66. static void Fault_state_process(uint8_t ch_x);
  67. void flash_erase_meta()
  68. {
  69. fmc_unlock();
  70. fmc_flag_clear(FMC_FLAG_END | FMC_FLAG_WPERR | FMC_FLAG_PGERR);
  71. fmc_page_erase(META_DATA);
  72. fmc_flag_clear(FMC_FLAG_END | FMC_FLAG_WPERR | FMC_FLAG_PGERR);
  73. fmc_lock();
  74. }
  75. void flash_write_meta(const META_DATA_S *meta_data)
  76. {
  77. fmc_unlock();
  78. uint32_t address = META_DATA;
  79. uint32_t *data = (uint32_t*)(meta_data);
  80. uint32_t data0 = 0;
  81. for(int i = 0; i < sizeof(META_DATA_S);i++)
  82. {
  83. data0 = *data;
  84. fmc_word_program(address,data0);
  85. data ++;
  86. fmc_flag_clear(FMC_FLAG_END | FMC_FLAG_WPERR | FMC_FLAG_PGERR);
  87. address +=4;
  88. }
  89. fmc_lock();
  90. }
  91. static void break_2_boot_upgreade(void)
  92. {
  93. meta_data.errno = 0;
  94. meta_data.operation_flag = 1;
  95. meta_data.recent_running_time = normal_running_time;
  96. flash_erase_meta();
  97. flash_write_meta(&meta_data);
  98. __disable_irq();
  99. //__set_FAULTMASK(1);
  100. NVIC_SystemReset();
  101. }
  102. void get_meta_data_from_flash(META_DATA_S *meta)
  103. {
  104. meta->operation_flag = *(uint32_t*)(UPGRADE_FLAG_ADDR);
  105. meta->partition = *(uint32_t*)(STARTUP_PARTATION);
  106. meta->errno = *(uint32_t*)(STARTUP_ERROR);
  107. meta->error_count = *(uint32_t*)(STARTUP_NUMBEAR);
  108. meta->rom_addr = *(uint32_t*)(STARTUP_ROM_ADDR);
  109. meta->recent_running_time = *(uint32_t*)(STARTUP_LAST_RUNNING_TIME);
  110. meta->running_app_version = *(uint32_t*)(STARTUP_APP_VERSION);
  111. meta->app1_version = *(uint32_t*)(APP1_VERSION);
  112. meta->app1_rom_addr = *(uint32_t*)(APP1_ROM_ADDR);
  113. meta->app1_partition = *(uint32_t*)(APP1_PARTATION);
  114. meta->app2_version = *(uint32_t*)(APP2_VERSION);
  115. meta->app2_rom_addr = *(uint32_t*)(APP2_ROM_ADDR);
  116. meta->app2_partition = *(uint32_t*)(APP2_PARTATION);
  117. }
  118. void flash_get_infomation(information_t *info)
  119. {
  120. info->uniq_ID_64_95 = *(uint32_t*)(UNIQU_3);
  121. info->uniq_ID_32_63 = *(uint32_t*)(UNIQU_2);
  122. info->uniq_ID_00_31 = *(uint32_t*)(UNIQU_1);
  123. }
  124. static void app_init(META_DATA_S *meta)
  125. {
  126. get_meta_data_from_flash(meta);
  127. nvic_vector_table_set(NVIC_VECTTAB_FLASH,meta->rom_addr - NVIC_VECTTAB_FLASH);
  128. __enable_irq();
  129. }
  130. static bool select_channel(uint8_t ch_x)
  131. {
  132. if(ch_x == 0)
  133. return false;
  134. switch(ch_x)
  135. {
  136. case CH1_out:
  137. {
  138. SEL_0_H;
  139. SEL_1_H;
  140. SEL_2_H;
  141. }
  142. break;
  143. case CH2_out:
  144. {
  145. SEL_0_L;
  146. SEL_1_H;
  147. SEL_2_H;
  148. }
  149. break;
  150. case CH3_out:
  151. {
  152. SEL_0_H;
  153. SEL_1_L;
  154. SEL_2_H;
  155. }
  156. break;
  157. default:
  158. return false;
  159. }
  160. return true;
  161. }
  162. void hlw8110_init(uint8_t ch_x)
  163. {
  164. if(select_channel(ch_x) == false)
  165. return;
  166. Init_HLW8110();
  167. }
  168. static void CHK_JLINK(void)
  169. {
  170. uint8_t i = 0;
  171. uint8_t j = 0;
  172. uint8_t temp0 = 0;
  173. uint8_t t_RL_state = 0;
  174. if(Chk_Jlink_conn() == false)//如果有jlink接入,则不会动作继电器,直接跳出进入主函数
  175. {
  176. //if(Fault_lack_phase_flag == false)//无缺相故障才能操作继电器
  177. {
  178. // DB_Out1_H;
  179. // DB_Out2_H;
  180. // DB_Out3_H;
  181. // DB_Out4_H ;
  182. // delay_ms(100);
  183. // DB_Out1_L;
  184. // DB_Out2_L;
  185. // DB_Out3_L;
  186. // DB_Out4_L;
  187. //
  188. // BUFF_Data;
  189. // LOCK_Data;
  190. // Ch N
  191. RL_N_now_state = AC3PPDU_RL_N_time.LT_state & 0x01;
  192. if(RL_N_now_state != RL_N_last_state)
  193. {
  194. if(RL_N_now_state > 0) { //open
  195. RL_N_ON_flag = 1; // Ch N open flag
  196. RL_N_OFF_flag = 0;
  197. if((AC3PPDU_RL_N_time.LT_state & 0x40) > 0){ // Ch N have delay
  198. RL_N_begin_delay_flag = 1;
  199. RL_N_end_delay_flag = 0;
  200. RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_ontime * 1000; // exchange to ms
  201. }else {
  202. RL_N_begin_delay_flag = 0;
  203. RL_N_end_delay_flag = 1;
  204. RL_N_delay_Limit = 0;
  205. }
  206. }else { //close
  207. RL_N_ON_flag = 0;
  208. RL_N_OFF_flag = 1; // Ch N close flag
  209. if((AC3PPDU_RL_N_time.LT_state & 0x80) > 0)//有延时
  210. {
  211. RL_N_begin_delay_flag = 1;
  212. RL_N_end_delay_flag = 0;
  213. RL_N_delay_Limit = AC3PPDU_RL_N_time.RL_offtime * 1000;//秒转成毫秒
  214. }
  215. else//无延时
  216. {
  217. RL_N_begin_delay_flag = 0;
  218. RL_N_end_delay_flag = 1;
  219. RL_N_delay_Limit = 0;
  220. }
  221. }
  222. RL_N_last_state = RL_N_now_state;
  223. }else{
  224. //OutUnit_N_control_flag = 0;
  225. }
  226. if(RL_N_end_delay_flag > 0){
  227. RL_N_begin_delay_flag = 0;
  228. RL_N_end_delay_flag = 0;
  229. if(RL_N_ON_flag > 0){
  230. DB_Out4_H;
  231. RL_N_ON_flag = 0;
  232. AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] = AC3PPDU_RL_N_time.LT_state | 0x00000001;
  233. }else if(RL_N_OFF_flag > 0)
  234. {
  235. DB_Out4_L;
  236. RL_N_OFF_flag = 0;
  237. AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] = AC3PPDU_RL_N_time.LT_state | 0xfffffffe;
  238. }else{
  239. }
  240. //lock
  241. BUFF_Data;
  242. LOCK_Data;
  243. }
  244. for(i = 0;i < Output_ChN_default;i++)
  245. {
  246. RL_now_state[i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0x01;
  247. if(RL_last_state[i] != RL_now_state[i])
  248. {
  249. if(RL_now_state[i] > 0)//开启
  250. {
  251. RL_ON_flag[i] = 1;
  252. RL_OFF_flag[i] = 0;
  253. if((AC3PPDU_RL_time[i + CH1_out].LT_state & 0x40) > 0)//有延时
  254. {
  255. RL_begin_delay_flag[i] = 1;
  256. RL_end_delay_flag[i] = 0;
  257. RL_delay_Limit[i] = AC3PPDU_RL_time[i + CH1_out].RL_ontime * 1000;//秒转成毫秒
  258. }
  259. else//无延时
  260. {
  261. RL_begin_delay_flag[i] = 0;
  262. RL_end_delay_flag[i] = 1;
  263. RL_delay_Limit[i] = 0;
  264. }
  265. }
  266. else//断开
  267. {
  268. RL_OFF_flag[i] = 1;
  269. RL_ON_flag[i] = 0;
  270. if((AC3PPDU_RL_time[i + CH1_out].LT_state & 0x80) > 0)//有延时
  271. {
  272. RL_begin_delay_flag[i] = 1;
  273. RL_end_delay_flag[i] = 0;
  274. RL_delay_Limit[i] = AC3PPDU_RL_time[i + CH1_out].RL_offtime * 1000;//秒转成毫秒
  275. }
  276. else//无延时
  277. {
  278. RL_begin_delay_flag[i] = 0;
  279. RL_end_delay_flag[i] = 1;
  280. }
  281. }
  282. RL_last_state[i] = RL_now_state[i];
  283. }
  284. else
  285. {
  286. // if(OutUnit_control_flag[i] > 0)
  287. // {
  288. // OutUnit_control_flag[i] = 0;
  289. // }
  290. }
  291. ///////
  292. if(RL_end_delay_flag[i] > 0)
  293. {
  294. RL_begin_delay_flag[i] = 0;
  295. RL_end_delay_flag[i] = 0;
  296. if(RL_ON_flag[i] > 0)
  297. {
  298. //Relayx_Onoff_state(i,RELAY_ON);
  299. // setting relay status
  300. switch (i)
  301. {
  302. case 0:
  303. DB_Out1_H;
  304. break;
  305. case 1:
  306. DB_Out2_H;
  307. break;
  308. case 2:
  309. DB_Out3_H;
  310. break;
  311. }
  312. RL_ON_flag[i] = 0;
  313. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
  314. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
  315. }
  316. else if(RL_OFF_flag[i] > 0)
  317. {
  318. //Relayx_Onoff_state(i,RELAY_OFF);
  319. RL_OFF_flag[i] = 0;
  320. switch (i)
  321. {
  322. case 0:
  323. DB_Out1_L;
  324. break;
  325. case 1:
  326. DB_Out2_L;
  327. break;
  328. case 2:
  329. DB_Out3_L;
  330. break;
  331. }
  332. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe;
  333. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe;
  334. }
  335. //Write_74hc573(LK_Relay_D,Relay_state);
  336. BUFF_Data;
  337. LOCK_Data;
  338. }
  339. }
  340. RL_Allon_flag = false;
  341. RL_Alloff_flag = false;
  342. }
  343. }
  344. }
  345. static void LimiT_enable_check(uint8_t ch_x,uint32_t Lt_v)
  346. {
  347. uint16_t temp0 = 0;
  348. temp0 = Lt_v >> 1;
  349. if(ch_x > 3)
  350. {
  351. return;
  352. }
  353. //通道最大电压
  354. if((temp0 & AC3PPDU_Vmax_LT_enable) == AC3PPDU_Vmax_LT_enable)
  355. {
  356. AC3PPDU_Vmax_LTen_flag[ch_x] = 1;
  357. }
  358. else
  359. {
  360. AC3PPDU_Vmax_LTen_flag[ch_x] = 0;
  361. }
  362. //最小电压
  363. if((temp0 & AC3PPDU_Vmin_LT_enable) == AC3PPDU_Vmin_LT_enable)
  364. {
  365. AC3PPDU_Vmin_LTen_flag[ch_x] = 1;
  366. }
  367. else
  368. {
  369. AC3PPDU_Vmin_LTen_flag[ch_x] = 0;
  370. }
  371. //最大电流
  372. if((temp0 & AC3PPDU_Imax_LT_enable) == AC3PPDU_Imax_LT_enable)
  373. {
  374. AC3PPDU_Imax_LTen_flag[ch_x] = 1;
  375. }
  376. else
  377. {
  378. AC3PPDU_Imax_LTen_flag[ch_x] = 0;
  379. }
  380. //最大功率
  381. if((temp0 & AC3PPDU_Wmax_LT_enable) == AC3PPDU_Wmax_LT_enable)
  382. {
  383. AC3PPDU_Wmax_LTen_flag[ch_x] = 1;
  384. }
  385. else
  386. {
  387. AC3PPDU_Wmax_LTen_flag[ch_x] = 0;
  388. }
  389. //最大电量
  390. if((temp0 & AC3PPDU_kWhmax_LT_enable) == AC3PPDU_kWhmax_LT_enable)
  391. {
  392. AC3PPDU_kWhmax_LTen_flag[ch_x] = 1;
  393. }
  394. else
  395. {
  396. AC3PPDU_kWhmax_LTen_flag[ch_x] = 0;
  397. }
  398. }
  399. static void check_3_phse()
  400. {
  401. uint8_t Phase_3_Close_flag=0;
  402. if(3 == Phase_N){
  403. for(int i = 0 ; i < Output_ChN_default; i += 3 )
  404. {
  405. Phase_3_Close_flag = 0;
  406. for(int j = 1;j <= 3;j++)
  407. {
  408. if(RL_Func_statu[j+i] == 1)
  409. {
  410. Phase_3_Close_flag = 1;
  411. break;
  412. }
  413. }
  414. if(Phase_3_Close_flag)
  415. {
  416. for(int j = 1;j <= 3;j++)
  417. {
  418. RL_Func_statu[j+i] = 1;
  419. }
  420. }
  421. Phase_3_Close_flag = 0;
  422. }
  423. }
  424. }
  425. static void RL_Over_Func()
  426. {
  427. check_3_phse();
  428. if(RL_All_Func)
  429. {
  430. DB_Out1_L;
  431. DB_Out2_L;
  432. DB_Out3_L;
  433. for(int i = 0; i < Output_ChN_default;i++)
  434. {
  435. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xfffffffe;
  436. RL_now_state[i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0x01;
  437. if(RL_now_state[i] != RL_last_state[i])
  438. {
  439. RL_last_state[i] = RL_now_state[i];
  440. }
  441. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  442. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  443. }
  444. RL_All_Func = 0;
  445. BUFF_Data;
  446. LOCK_Data;
  447. return;
  448. }
  449. for(int i = 0; i < Output_ChN_default;i++)
  450. {
  451. if(RL_Func_statu[i+1])
  452. {
  453. switch(i)
  454. {
  455. case 0:
  456. DB_Out1_L;
  457. break;
  458. case 1:
  459. DB_Out2_L;
  460. break;
  461. case 2:
  462. DB_Out3_L;
  463. break;
  464. case 3:
  465. case 4:
  466. case 5:
  467. case 6:
  468. case 7:
  469. case 8:
  470. default:
  471. break;
  472. }
  473. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xfffffffe;
  474. RL_now_state[i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0x01;
  475. if(RL_now_state[i] != RL_last_state[i])
  476. {
  477. RL_last_state[i] = RL_now_state[i];
  478. }
  479. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  480. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  481. RL_Func_statu[i+1] = 0;
  482. }
  483. }
  484. BUFF_Data;
  485. LOCK_Data;
  486. }
  487. static void key_io_control()
  488. {
  489. bool rst = false;
  490. bool test = false;
  491. //
  492. rst = get_rst();
  493. test = get_test();
  494. if(get_detection())
  495. {
  496. AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = 0x1;
  497. }else
  498. {
  499. AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = 0x0;
  500. //close
  501. DB_Out1_L;
  502. DB_Out2_L;
  503. DB_Out3_L;
  504. for(uint8_t i = 0; i < Output_ChN_default;i++)
  505. {
  506. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xfffffffe;
  507. RL_now_state[i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0x01;
  508. uint8_t stat = AC3PPDU_RL_time[i + CH1_out].LT_state;
  509. if(RL_now_state[i] != RL_last_state[i])
  510. {
  511. RL_last_state[i] = RL_now_state[i];
  512. }
  513. // save value to eeprom
  514. AT24CxxWriteOneByte(ERom_CH1LT_ST_Addr+i,stat);
  515. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  516. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  517. }
  518. }
  519. if(rst != test)
  520. {
  521. if(rst)
  522. {
  523. DB_Out1_L;
  524. DB_Out2_L;
  525. DB_Out3_L;
  526. for(uint8_t i = 0; i < Output_ChN_default;i++)
  527. {
  528. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state &0xfffffffe;
  529. RL_now_state[i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0x01;
  530. uint8_t stat = AC3PPDU_RL_time[i + CH1_out].LT_state;
  531. if(RL_now_state[i] != RL_last_state[i])
  532. {
  533. RL_last_state[i] = RL_now_state[i];
  534. }
  535. // save value to eeprom
  536. AT24CxxWriteOneByte(ERom_CH1LT_ST_Addr+i,stat);
  537. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  538. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  539. }
  540. }else
  541. {
  542. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] == 0x1)
  543. {
  544. DB_Out1_H;
  545. DB_Out2_H;
  546. DB_Out3_H;
  547. for(uint8_t i = 0; i < Output_ChN_default;i++)
  548. {
  549. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
  550. RL_now_state[i] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0x01;
  551. if(RL_now_state[i] != RL_last_state[i])
  552. {
  553. RL_last_state[i] = RL_now_state[i];
  554. }
  555. // save value to eeprom
  556. uint8_t stat = AC3PPDU_RL_time[i + CH1_out].LT_state;
  557. AT24CxxWriteOneByte(ERom_CH1LT_ST_Addr+i,stat);
  558. AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = AC3PPDU_RL_time[i + CH1_out].LT_state;
  559. AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
  560. }
  561. }
  562. }
  563. }
  564. BUFF_Data;
  565. LOCK_Data;
  566. }
  567. int main(void)
  568. {
  569. app_init(&meta_data);
  570. InitSysTick();
  571. InitLED();
  572. InitKey();
  573. InitTimer();
  574. InitRelay();
  575. Init_74hc573();
  576. InitAT24Cxx();
  577. InitUART1(9600);
  578. InitCH448F();
  579. AC3PPDU_SlaveAddress = ReadKeyValue();
  580. eMBInit(MB_RTU, AC3PPDU_SlaveAddress, 0, 115200, MB_PAR_NONE);
  581. eMBEnable();
  582. key_io_init(NULL);
  583. for(int i = 1; i <= AC3PPDU_active_chn;i++)
  584. {
  585. hlw8110_init(i);
  586. }
  587. ReadEeprom();
  588. AC3PPDU_active_chn = Output_ChN_default;
  589. strcpy(infomation.date,__DATE__);
  590. strcat(infomation.date," ");
  591. strcat(infomation.date,__TIME__);
  592. strcpy(infomation.ver,VERSION);
  593. int size = sizeof(infomation);
  594. Devid_IDChalNum = AC3PPDU_Device_ID;
  595. Devid_IDChalNum = Devid_IDChalNum << 8;
  596. Devid_IDChalNum += Output_ChN_default;
  597. AC3PPDU_Modbus_Reg[Mb_Dbuff_DevAddr] = Devid_IDChalNum;
  598. infomation.channels = Output_ChN_default;
  599. flash_get_infomation(&infomation);
  600. AC3PPDU_RL_time[CH_in].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_LT_ST_Addr];
  601. AC3PPDU_RL_time[CH_in].FT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr];
  602. LimiT_enable_check(CH_in,AC3PPDU_RL_time[CH_in].LT_state);
  603. Enable_74hc573_Output;
  604. // Fault_state_Last = Fault_state_Reg;
  605. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] = AC3PPDU_APlack_Fault + AC3PPDU_BPlack_Fault;
  606. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] += AC3PPDU_CPlack_Fault;
  607. for(int i = 0;i < Output_ChN_default;i++)
  608. {
  609. RL_last_state[i] = 0;
  610. AC3PPDU_RL_time[i + CH1_out].LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i];
  611. AC3PPDU_RL_time[i + CH1_out].RL_ontime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Ton1_Addr + i];
  612. AC3PPDU_RL_time[i + CH1_out].RL_offtime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Toff1_Addr + i];
  613. LimiT_enable_check((i + CH1_out),AC3PPDU_RL_time[i + CH1_out].LT_state);
  614. }
  615. RL_N_last_state = 0;
  616. AC3PPDU_RL_N_time.LT_state = AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr]; // add by liyi
  617. AC3PPDU_RL_N_time.RL_offtime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_ToffN_Addr]; // add by liyi
  618. AC3PPDU_RL_N_time.RL_ontime = AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr]; // add by liyi
  619. Fwdgt_Init();
  620. while(1)
  621. {
  622. CHK_JLINK();
  623. eMBPoll();
  624. Fwdgt_reload();
  625. if(flash_flag == 1){
  626. LEDFlicker2();
  627. flash_flag = 0;
  628. for(int j = 0 ; j < Hlw8110_CS;j++)
  629. read_Hlw8110(j,0);
  630. normal_running_time+=2;
  631. }
  632. if(write_kwh2Eeprom_flag) // 120 second recode
  633. {
  634. write_kwh2Eeprom_flag = 0;
  635. for(int i = 0; i < Output_ChN_default ;i++)
  636. {
  637. int temp = i << 2;
  638. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 24;
  639. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 16;
  640. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i] >> 8;
  641. Eeprom_Rbuf[ERom_TotalWh1_Addr+temp+3] = AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr+i];
  642. }
  643. AT24CxxWrite(ERom_TotalWh1_Addr,(Eeprom_Rbuf + ERom_TotalWh1_Addr),4*Output_ChN_default);
  644. }
  645. AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
  646. AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
  647. AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
  648. AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
  649. AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
  650. AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
  651. AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
  652. AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
  653. AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
  654. AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
  655. AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] = hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
  656. AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
  657. for(int i = 0;i < (Output_ChN_default + 1);i++)
  658. {
  659. Fault_state_process(i);
  660. }
  661. RL_Over_Func();
  662. MODbus_CMD_New();
  663. }
  664. }
  665. static void MODbus_CMD_New(void)
  666. {
  667. if(Modbus_Wr_buff[Wr_eeprom_cnt][0] > 0)
  668. {
  669. uint8_t i = 0;
  670. uint32_t temp_addr;
  671. uint32_t base_addr = Modbus_Wr_buff[Wr_eeprom_cnt][1];
  672. uint32_t data = Modbus_Wr_buff[Wr_eeprom_cnt][2];
  673. uint32_t value = 0;
  674. switch(base_addr)
  675. {
  676. case Mb_Dbuff_ViLit_max_Addr ... Mb_Dbuff_kWhiLit_max_Addr: //input votage max votage min current power coustermer add by liyi
  677. {
  678. temp_addr = base_addr - Mb_Dbuff_ViLit_max_Addr;
  679. temp_addr = temp_addr << 2;
  680. temp_addr += ERom_ViLit_max_Addr;
  681. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  682. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  683. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  684. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  685. AC3PPDU_Modbus_Reg[base_addr] = data;
  686. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  687. }
  688. break;
  689. case Mb_Dbuff_VLit1_max_Addr ... Mb_Dbuff_VLit9_max_Addr: //output voltage max threod for 1,2,3,4,5,6,7,8,9 channels
  690. {
  691. temp_addr = base_addr - Mb_Dbuff_VLit1_max_Addr;
  692. value = temp_addr;
  693. temp_addr = temp_addr << 2;
  694. temp_addr += ERom_VLit1_max_Addr;
  695. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  696. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  697. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  698. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  699. AC3PPDU_Modbus_Reg[base_addr] = data;
  700. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  701. {
  702. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Vmax_Threshould_Disable);
  703. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  704. }
  705. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  706. }
  707. break;
  708. case Mb_Dbuff_VLit1_min_Addr ... Mb_Dbuff_VLit9_min_Addr: //output voltage min thred for 1,2,3,4,5,6,7,8,9 channels
  709. {
  710. temp_addr = base_addr - Mb_Dbuff_VLit1_min_Addr;
  711. value = temp_addr;
  712. temp_addr = temp_addr << 2;
  713. temp_addr += ERom_VLit1_min_Addr;
  714. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  715. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  716. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  717. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  718. AC3PPDU_Modbus_Reg[base_addr] = data;
  719. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  720. {
  721. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Vmin_Threshould_Disable);
  722. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  723. }
  724. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  725. }
  726. break;
  727. case Mb_Dbuff_ILit1_max_Addr ... Mb_Dbuff_ILit9_max_Addr: // output current max throud for 1,2,3,4,5,6,7,8,9 channels
  728. {
  729. temp_addr = base_addr - Mb_Dbuff_ILit1_max_Addr;
  730. value = temp_addr;
  731. temp_addr = temp_addr << 2;
  732. temp_addr += ERom_ILit1_max_Addr;
  733. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  734. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  735. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  736. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  737. AC3PPDU_Modbus_Reg[base_addr] = data;
  738. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  739. {
  740. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Imax_Threshould_Disable);
  741. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  742. }
  743. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  744. }
  745. break;
  746. case Mb_Dbuff_WLit1_max_Addr ... Mb_Dbuff_WLit9_max_Addr: //output power max .....
  747. {
  748. temp_addr = base_addr - Mb_Dbuff_WLit1_max_Addr;
  749. value = temp_addr;
  750. temp_addr = temp_addr << 2;
  751. temp_addr += ERom_WLit1_max_Addr;
  752. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  753. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  754. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  755. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  756. AC3PPDU_Modbus_Reg[base_addr] = data;
  757. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  758. {
  759. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Wmax_Threshould_Disable);
  760. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  761. }
  762. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  763. }
  764. break;
  765. case Mb_Dbuff_kWhLit1_max_Addr ... Mb_Dbuff_kWhLit9_max_Addr: //output customers max .....
  766. {
  767. temp_addr = base_addr - Mb_Dbuff_kWhLit1_max_Addr;
  768. value = temp_addr;
  769. temp_addr = temp_addr << 2;
  770. temp_addr += ERom_kWhLit1_max_Addr;
  771. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  772. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  773. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  774. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  775. AC3PPDU_Modbus_Reg[base_addr] = data;
  776. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  777. {
  778. AC3PPDU_RL_time[value + CH1_out].LT_state &= (Shield_Kwhmax_Threshould_Disable);
  779. LimiT_enable_check((value + CH1_out),AC3PPDU_RL_time[value + CH1_out].LT_state);
  780. }
  781. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  782. }
  783. break;
  784. case Mb_Dbuff_RL_Allon_Addr: //relay all on
  785. {
  786. RL_Allon_flag = true;
  787. for(i = 0;i < Output_ChN_default;i++)
  788. {
  789. temp_addr = i << 1;
  790. Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x41;
  791. AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
  792. }
  793. AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
  794. Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x41;
  795. AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
  796. AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
  797. }
  798. break;
  799. case Mb_Dbuff_RL_Alloff_Addr: //relay all off
  800. {
  801. RL_Alloff_flag = true;
  802. for(i = 0;i < Output_ChN_default;i++)
  803. {
  804. temp_addr = i << 1;
  805. Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] | 0x80;
  806. Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr] & 0xfe;
  807. AC3PPDU_RL_time[i + CH1_out].LT_state = Eeprom_Rbuf[ERom_CH1LT_ST_Addr + temp_addr];
  808. }
  809. AT24CxxWrite(ERom_CH1LT_ST_Addr,(Eeprom_Rbuf + ERom_CH1LT_ST_Addr),(2*Output_ChN_default));
  810. Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] | 0x80;
  811. Eeprom_Rbuf[ERom_CHNLT_ST_Addr] = Eeprom_Rbuf[ERom_CHNLT_ST_Addr] & 0xfe;
  812. AC3PPDU_RL_N_time.LT_state = Eeprom_Rbuf[ERom_CHNLT_ST_Addr];
  813. AT24CxxWrite(ERom_CHNLT_ST_Addr,(Eeprom_Rbuf + ERom_CHNLT_ST_Addr),2);
  814. }
  815. break;
  816. case Mb_Dbuff_LT_ST_Addr: //set input status
  817. {
  818. AC3PPDU_RL_time[CH_in].LT_state = data;
  819. Eeprom_Rbuf[ERom_LT_ST_Addr] = data;
  820. AC3PPDU_Modbus_Reg[base_addr] = data;
  821. AT24CxxWriteOneByte(ERom_LT_ST_Addr,Eeprom_Rbuf[ERom_LT_ST_Addr]);
  822. LimiT_enable_check(CH_in,AC3PPDU_RL_time[CH_in].LT_state);
  823. }
  824. break;
  825. case Mb_Dbuff_CH1LT_ST_Addr ... Mb_Dbuff_CHNLT_ST_Addr: //set output relay statues
  826. {
  827. temp_addr = base_addr - Mb_Dbuff_CH1LT_ST_Addr;
  828. // if(temp_addr == 9) { //Ch N
  829. // AC3PPDU_RL_N_time.LT_state = data;
  830. // }else{
  831. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  832. {
  833. data &= (Shield_Vmax_Threshould_Disable);
  834. }
  835. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  836. {
  837. data &= (Shield_Vmin_Threshould_Disable);
  838. }
  839. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  840. {
  841. data &= (Shield_Imax_Threshould_Disable);
  842. }
  843. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  844. {
  845. data &= (Shield_Wmax_Threshould_Disable);
  846. }
  847. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  848. {
  849. data &= (Shield_Kwhmax_Threshould_Disable);
  850. }
  851. AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
  852. LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
  853. // }
  854. temp_addr = temp_addr << 1;
  855. temp_addr += ERom_CH1LT_ST_Addr;
  856. Eeprom_Rbuf[temp_addr] = data;
  857. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  858. }
  859. break;
  860. case Mb_Dbuff_OUTCH1_ST_Addr ... Mb_Dbuff_OUTCH3_ST_Addr: //set output channel relay's status
  861. {
  862. temp_addr = base_addr - Mb_Dbuff_OUTCH1_ST_Addr;
  863. //OutUnit_control_flag[temp_addr] = 1;
  864. temp_addr *= 3;
  865. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  866. {
  867. data &= (Shield_Vmax_Threshould_Disable);
  868. }
  869. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  870. {
  871. data &= (Shield_Vmin_Threshould_Disable);
  872. }
  873. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  874. {
  875. data &= (Shield_Imax_Threshould_Disable);
  876. }
  877. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  878. {
  879. data &= (Shield_Wmax_Threshould_Disable);
  880. }
  881. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + temp_addr] <= THRESHOULD_JUDGMENT)
  882. {
  883. data &= (Shield_Kwhmax_Threshould_Disable);
  884. }
  885. AC3PPDU_RL_time[temp_addr + CH1_out].LT_state = data;
  886. AC3PPDU_RL_time[temp_addr + CH2_out].LT_state = data;
  887. AC3PPDU_RL_time[temp_addr + CH3_out].LT_state = data;
  888. LimiT_enable_check((temp_addr + CH1_out),AC3PPDU_RL_time[temp_addr + CH1_out].LT_state);
  889. LimiT_enable_check((temp_addr + CH2_out),AC3PPDU_RL_time[temp_addr + CH2_out].LT_state);
  890. LimiT_enable_check((temp_addr + CH3_out),AC3PPDU_RL_time[temp_addr + CH3_out].LT_state);
  891. temp_addr = temp_addr << 1;
  892. Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr] = data;
  893. Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr] = data;
  894. Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr] = data;
  895. AT24CxxWriteOneByte(temp_addr + ERom_CH1LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH1LT_ST_Addr]);
  896. AT24CxxWriteOneByte(temp_addr + ERom_CH2LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH2LT_ST_Addr]);
  897. AT24CxxWriteOneByte(temp_addr + ERom_CH3LT_ST_Addr,Eeprom_Rbuf[temp_addr + ERom_CH3LT_ST_Addr]);
  898. }
  899. break;
  900. case Mb_Dbuff_RL_Ton1_Addr ... Mb_Dbuff_RL_TonN_Addr: //set on status delay for 1,2,3,4,5,6,7,8,9,N channels
  901. {
  902. temp_addr = base_addr - Mb_Dbuff_RL_Ton1_Addr;
  903. if(temp_addr == 9){ //Ch N add by liyi
  904. AC3PPDU_RL_N_time.RL_ontime = data;
  905. }else
  906. {
  907. AC3PPDU_RL_time[temp_addr + CH1_out].RL_ontime = data;
  908. }
  909. AC3PPDU_RL_N_time.RL_ontime = data;
  910. temp_addr += ERom_RL_Ton1_Addr;
  911. Eeprom_Rbuf[temp_addr] = data;
  912. Eeprom_Rbuf[ERom_RL_TonN_Addr] = data;
  913. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  914. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_TonN_Addr] = Eeprom_Rbuf[ERom_RL_TonN_Addr];
  915. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  916. AT24CxxWriteOneByte(ERom_RL_TonN_Addr,Eeprom_Rbuf[ERom_RL_TonN_Addr]);
  917. }
  918. break;
  919. case Mb_Dbuff_RL_Toff1_Addr ... Mb_Dbuff_RL_ToffN_Addr: //set off status delay for 1,2,3,4,5,6,7,8,9,N channels
  920. {
  921. temp_addr = base_addr - Mb_Dbuff_RL_Toff1_Addr;
  922. if(temp_addr == 9){
  923. AC3PPDU_RL_N_time.RL_offtime = data;
  924. }else {
  925. AC3PPDU_RL_time[temp_addr + CH1_out].RL_offtime = data;
  926. }
  927. AC3PPDU_RL_N_time.RL_offtime = data;
  928. temp_addr += ERom_RL_Toff1_Addr;
  929. Eeprom_Rbuf[temp_addr] = data;
  930. Eeprom_Rbuf[ERom_RL_ToffN_Addr] = data;
  931. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  932. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_ToffN_Addr] = Eeprom_Rbuf[ERom_RL_ToffN_Addr];
  933. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  934. AT24CxxWriteOneByte(ERom_RL_ToffN_Addr,Eeprom_Rbuf[ERom_RL_ToffN_Addr]);
  935. }
  936. break;
  937. case Mb_Dbuff_RL_Over_Ch1_Func ... Mb_Dbuff_RL_Over_Ch9_Func: //threod over limit operation
  938. {
  939. temp_addr = base_addr - Mb_Dbuff_RL_Over_Ch1_Func;
  940. temp_addr += ERom_RL_Over_Ch1_Addr;
  941. Eeprom_Rbuf[temp_addr] = data;
  942. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  943. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  944. }
  945. break;
  946. case Mb_Dbuff_Clear_Chn1_Consumer ... Mb_Dbuff_Clear_Chn9_Consumer:
  947. {
  948. if(data)
  949. {
  950. temp_addr = base_addr - Mb_Dbuff_Clear_Chn1_Consumer;
  951. hlw8110_base[temp_addr+CH1_out] = 0;
  952. hlw8110_store[temp_addr+CH1_out] = 0.0;
  953. }
  954. }
  955. case Mb_Dbuff_Clear_Chnall_Consumer:
  956. {
  957. if(data){
  958. for(i = 0; i < Output_ChN_default;i++)
  959. {
  960. hlw8110_base[i+CH1_out] = 0;
  961. hlw8110_store[i+CH1_out] = 0.0;
  962. }
  963. }
  964. }
  965. break;
  966. case Mb_Dbuff_All_ViLit_Max ... Mb_Dbuff_All_kWhiLit_Max:
  967. {
  968. temp_addr = base_addr - Mb_Dbuff_All_ViLit_Max;
  969. temp_addr = temp_addr << 2;
  970. temp_addr += ERom_VILit_All_max_Addr;
  971. Eeprom_Rbuf[temp_addr + 0] = data >> 24;
  972. Eeprom_Rbuf[temp_addr + 1] = data >> 16;
  973. Eeprom_Rbuf[temp_addr + 2] = data >> 8;
  974. Eeprom_Rbuf[temp_addr + 3] = data >> 0;
  975. AC3PPDU_Modbus_Reg[base_addr] = data;
  976. AT24CxxWrite(temp_addr,(Eeprom_Rbuf + temp_addr),4);
  977. switch (base_addr - Mb_Dbuff_All_ViLit_Max)
  978. {
  979. case 0:
  980. {
  981. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  982. {
  983. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Vmax_Threshould_Disable);
  984. }else
  985. {
  986. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Vmax_Threshould_enable);
  987. }
  988. }
  989. break;
  990. case 1:
  991. {
  992. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  993. {
  994. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Vmin_Threshould_Disable);
  995. }else
  996. {
  997. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Vmin_Threshould_enable);
  998. }
  999. }
  1000. break;
  1001. case 2:
  1002. {
  1003. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  1004. {
  1005. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Imax_Threshould_Disable);
  1006. }else
  1007. {
  1008. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Imax_Threshould_enable);
  1009. }
  1010. }
  1011. break;
  1012. case 3:
  1013. {
  1014. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  1015. {
  1016. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Wmax_Threshould_Disable);
  1017. }else
  1018. {
  1019. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_Wmax_Threshould_enable);
  1020. }
  1021. }
  1022. break;
  1023. case 4:
  1024. {
  1025. if(AC3PPDU_Modbus_Reg[base_addr] <= THRESHOULD_JUDGMENT)
  1026. {
  1027. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] &= (Shield_Kwhmax_Threshould_Disable);
  1028. }else
  1029. {
  1030. AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] |= (Shield_kWhmax_Threshould_enable);
  1031. }
  1032. }
  1033. break;
  1034. }
  1035. }
  1036. break;
  1037. case Mb_Dbuff_All_OverFunc:
  1038. {
  1039. temp_addr = base_addr - Mb_Dbuff_All_OverFunc;
  1040. temp_addr += Mb_Dbuff_All_OverFunc;
  1041. Eeprom_Rbuf[temp_addr] = data;
  1042. AC3PPDU_Modbus_Reg[base_addr] = Eeprom_Rbuf[temp_addr];
  1043. AT24CxxWriteOneByte(temp_addr,Eeprom_Rbuf[temp_addr]);
  1044. }
  1045. break;
  1046. case Mb_Dbuff_break_Addr:
  1047. {
  1048. break_2_boot_upgreade();
  1049. }
  1050. break;
  1051. default:
  1052. break;
  1053. }
  1054. Modbus_Wr_buff[Wr_eeprom_cnt][0] = 0;
  1055. //Wr_eeprom_begin_flag = true;
  1056. }
  1057. Wr_eeprom_cnt++;
  1058. if(Wr_eeprom_cnt >= Mb_Wcmd_Width)
  1059. {
  1060. Wr_eeprom_cnt = 0;
  1061. }
  1062. }
  1063. //static void MODbus_CMD_New(void)
  1064. //{
  1065. // if(Modbus_Wr_buff[Wr_eeprom_cnt][0] > 0)
  1066. // {
  1067. // uint8_t i = 0;
  1068. // uint32_t temp_addr;
  1069. // uint32_t base_addr = Modbus_Wr_buff[Wr_eeprom_cnt][1];
  1070. // uint32_t data = Modbus_Wr_buff[Wr_eeprom_cnt][2];
  1071. // uint32_t value = 0;
  1072. //
  1073. // switch(base_addr)
  1074. // {
  1075. // case Mb_Dbuff_RL_Allon_Addr:
  1076. // {
  1077. // DB_Out1_H;
  1078. // DB_Out2_H;
  1079. // DB_Out3_H;
  1080. // BUFF_Data;
  1081. // LOCK_Data;
  1082. // }
  1083. // break;
  1084. // case Mb_Dbuff_RL_Alloff_Addr:
  1085. // {
  1086. // DB_Out1_L;
  1087. // DB_Out2_L;
  1088. // DB_Out3_L;
  1089. // BUFF_Data;
  1090. // LOCK_Data;
  1091. // }
  1092. // break;
  1093. // }
  1094. // Modbus_Wr_buff[Wr_eeprom_cnt][0] = 0;
  1095. // }
  1096. // Wr_eeprom_cnt++;
  1097. // if(Wr_eeprom_cnt >= Mb_Wcmd_Width)
  1098. // {
  1099. // Wr_eeprom_cnt = 0;
  1100. // }
  1101. //}
  1102. static void Fault_state_process(uint8_t ch_x)
  1103. {
  1104. uint16_t i = 0;
  1105. if(ch_x != CH_in)
  1106. i = (ch_x -1)<< 3;
  1107. if(ch_x == CH_in)
  1108. {
  1109. uint32_t sort_buff[3] = {0};
  1110. uint32_t Vmax = 0;
  1111. uint32_t Vmin = 0;
  1112. sort_buff[0] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
  1113. sort_buff[1] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
  1114. sort_buff[2] = AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr];
  1115. Vmax = (sort_buff[0] >= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
  1116. Vmax = (Vmax >= sort_buff[2]) ? Vmax : sort_buff[2];
  1117. Vmin = (sort_buff[0] <= sort_buff[1]) ? sort_buff[0] :sort_buff[1];
  1118. Vmin = (Vmin <= sort_buff[2]) ? Vmin : sort_buff[2];
  1119. if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
  1120. {
  1121. uint32_t v_mid = AC3PPDU_Lack_Voltage *2;
  1122. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
  1123. {
  1124. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
  1125. }
  1126. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
  1127. {
  1128. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
  1129. }
  1130. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
  1131. {
  1132. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] =1;
  1133. }
  1134. }else
  1135. {
  1136. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
  1137. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
  1138. AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
  1139. }
  1140. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Vmax_Threshould_enable) > 0)
  1141. {
  1142. if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Max])
  1143. {
  1144. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmax_Fault;
  1145. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
  1146. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_V_Max_Func_enable)
  1147. {
  1148. RL_All_Func = 1;
  1149. }
  1150. }else if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Min])
  1151. {
  1152. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmax_NFault;
  1153. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
  1154. }else
  1155. {
  1156. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmax_NFault;
  1157. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmin_Fault;
  1158. }
  1159. }
  1160. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Vmin_Threshould_enable) > 0)
  1161. {
  1162. if(AC_BASE[0] < AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Min])
  1163. {
  1164. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Vmin_Fault;
  1165. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_V_Min_Func_enable)
  1166. {
  1167. RL_All_Func = 1;
  1168. }
  1169. }
  1170. else//小于最小
  1171. {
  1172. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Vmin_NFault;
  1173. }
  1174. }
  1175. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Imax_Threshould_enable) > 0)
  1176. {
  1177. if(AC_BASE[1] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_IiLit_Max])
  1178. {
  1179. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Imax_Fault;
  1180. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_I_Max_Func_enable)
  1181. {
  1182. RL_All_Func = 1;
  1183. }
  1184. }
  1185. else
  1186. {
  1187. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Imax_NFault;
  1188. }
  1189. }
  1190. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Wmax_Threshould_enable) > 0)
  1191. {
  1192. if(AC_BASE[2] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_WiLit_Max])
  1193. {
  1194. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_Wmax_Fault;
  1195. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_P_Max_Func_enable)
  1196. {
  1197. RL_All_Func = 1;
  1198. }
  1199. }
  1200. else
  1201. {
  1202. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_Wmax_NFault;
  1203. }
  1204. }
  1205. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_kWhmax_Threshould_enable) > 0)
  1206. {
  1207. if(AC_BASE[3] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_kWhiLit_Max])
  1208. {
  1209. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] |= AC3PPDU_kWhmax_Fault;
  1210. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_All_OverFunc] & AC3PPDU_Over_C_Max_Func_enable)
  1211. {
  1212. RL_All_Func = 1;
  1213. }
  1214. }
  1215. else
  1216. {
  1217. AC3PPDU_Modbus_Reg[Mb_Dbuff_Tr_All_FT_ST_Addr] &= AC3PPDU_kWhmax_NFault;
  1218. }
  1219. }
  1220. return;
  1221. }
  1222. ////电压最大、最小、缺相阈值使能,进行判断
  1223. if(AC3PPDU_Vmax_LTen_flag[ch_x] > 0)
  1224. {
  1225. if(ch_x > CH_in)//输出通道
  1226. {
  1227. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_max_Addr + ch_x-1])//大于最大
  1228. {
  1229. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmax_Fault;
  1230. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1231. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func+ch_x-1] & (AC3PPDU_Over_V_Max_Func_enable)) //is or not open func
  1232. {
  1233. RL_Func_statu[ch_x] = 1;
  1234. }
  1235. }
  1236. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + ch_x-1])//大于最小,小于最大,正常
  1237. {
  1238. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
  1239. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1240. }
  1241. else//小于最小
  1242. {
  1243. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
  1244. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmin_Fault;
  1245. }
  1246. }
  1247. else//输入通道
  1248. {
  1249. //A相
  1250. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
  1251. {
  1252. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AVmax_Fault;
  1253. }
  1254. else
  1255. {
  1256. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmax_NFault;
  1257. }
  1258. //B相
  1259. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
  1260. {
  1261. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BVmax_Fault;
  1262. }
  1263. else
  1264. {
  1265. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmax_NFault;
  1266. }
  1267. //C相
  1268. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_max_Addr])//超限
  1269. {
  1270. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CVmax_Fault;
  1271. }
  1272. else
  1273. {
  1274. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmax_NFault;
  1275. }
  1276. }
  1277. }
  1278. else
  1279. {
  1280. if(ch_x > CH_in)
  1281. {
  1282. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmax_NFault;
  1283. }
  1284. else
  1285. {
  1286. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmax_NFault;
  1287. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmax_NFault;
  1288. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmax_NFault;
  1289. }
  1290. }
  1291. //最小电压
  1292. if(AC3PPDU_Vmin_LTen_flag[ch_x] > 0)
  1293. {
  1294. if(ch_x > CH_in)//输出通道
  1295. {
  1296. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + i] < AC3PPDU_Modbus_Reg[Mb_Dbuff_VLit1_min_Addr + ch_x -1])//大于最大 revice by liyi max -> min
  1297. {
  1298. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Vmin_Fault;
  1299. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x - 1] & (AC3PPDU_Over_V_Min_Func_enable)) //is or not open func add by liyi
  1300. {
  1301. RL_Func_statu[ch_x] = 1;
  1302. }
  1303. }
  1304. else//小于最小
  1305. {
  1306. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1307. }
  1308. }
  1309. else//输入通道
  1310. {
  1311. //A相
  1312. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//
  1313. {
  1314. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
  1315. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
  1316. }
  1317. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > 1000)
  1318. {
  1319. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AVmin_Fault;
  1320. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
  1321. }
  1322. else
  1323. {
  1324. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
  1325. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_APlack_Fault;
  1326. }
  1327. //B相
  1328. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//
  1329. {
  1330. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
  1331. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
  1332. }
  1333. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > 1000)
  1334. {
  1335. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BVmin_Fault;
  1336. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
  1337. }
  1338. else
  1339. {
  1340. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
  1341. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BPlack_Fault;
  1342. }
  1343. //C相
  1344. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ViLit_min_Addr])//超限
  1345. {
  1346. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
  1347. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
  1348. }
  1349. else if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > 1000)
  1350. {
  1351. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CVmin_Fault;
  1352. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
  1353. }
  1354. else
  1355. {
  1356. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
  1357. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CPlack_Fault;
  1358. }
  1359. }
  1360. }
  1361. else
  1362. {
  1363. if(ch_x > CH_in)
  1364. {
  1365. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Vmin_NFault;
  1366. }
  1367. else
  1368. {
  1369. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AVmin_NFault;
  1370. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BVmin_NFault;
  1371. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CVmin_NFault;
  1372. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > 1000)
  1373. {
  1374. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_APlack_NFault;
  1375. }
  1376. else
  1377. {
  1378. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_APlack_Fault;
  1379. }
  1380. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] > 1000)
  1381. {
  1382. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BPlack_NFault;
  1383. }
  1384. else
  1385. {
  1386. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BPlack_Fault;
  1387. }
  1388. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] > 1000)
  1389. {
  1390. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CPlack_NFault;
  1391. }
  1392. else
  1393. {
  1394. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CPlack_Fault;
  1395. }
  1396. }
  1397. }
  1398. //电流最大
  1399. if(AC3PPDU_Imax_LTen_flag[ch_x] > 0)
  1400. {
  1401. if(ch_x > CH_in)//输出通道
  1402. {
  1403. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 1 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_ILit1_max_Addr + ch_x -1])
  1404. {
  1405. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Imax_Fault;
  1406. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_I_Max_Func_enable)) //is or not open func add by liyi
  1407. {
  1408. RL_Func_statu[ch_x] = 1;
  1409. }
  1410. }
  1411. else
  1412. {
  1413. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Imax_NFault;
  1414. }
  1415. }
  1416. else//输入通道
  1417. {
  1418. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
  1419. {
  1420. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AImax_Fault;
  1421. }
  1422. else
  1423. {
  1424. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AImax_NFault;
  1425. }
  1426. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
  1427. {
  1428. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BImax_Fault;
  1429. }
  1430. else
  1431. {
  1432. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BImax_NFault;
  1433. }
  1434. if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_IiLit_max_Addr]))//超限
  1435. {
  1436. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CImax_Fault;
  1437. }
  1438. else
  1439. {
  1440. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CImax_NFault;
  1441. }
  1442. }
  1443. }
  1444. else
  1445. {
  1446. if(ch_x > CH_in)
  1447. {
  1448. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Imax_NFault;
  1449. }
  1450. else
  1451. {
  1452. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AImax_NFault;
  1453. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BImax_NFault;
  1454. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CImax_NFault;
  1455. }
  1456. }
  1457. //功率最大
  1458. if(AC3PPDU_Wmax_LTen_flag[ch_x] > 0)
  1459. {
  1460. if(ch_x > CH_in)//输出通道
  1461. {
  1462. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 2 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WLit1_max_Addr + ch_x -1])
  1463. {
  1464. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_Wmax_Fault;
  1465. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_P_Max_Func_enable)) //is or not open func add by liyi
  1466. {
  1467. RL_Func_statu[ch_x] = 1;
  1468. }
  1469. }
  1470. else
  1471. {
  1472. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Wmax_NFault;
  1473. }
  1474. }
  1475. else//输入通道
  1476. {
  1477. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1478. {
  1479. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AWmax_Fault;
  1480. }
  1481. else
  1482. {
  1483. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AWmax_NFault;
  1484. }
  1485. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1486. {
  1487. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BWmax_Fault;
  1488. }
  1489. else
  1490. {
  1491. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BWmax_NFault;
  1492. }
  1493. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1494. {
  1495. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CWmax_Fault;
  1496. }
  1497. else
  1498. {
  1499. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CWmax_NFault;
  1500. }
  1501. }
  1502. }
  1503. else
  1504. {
  1505. if(ch_x > CH_in)
  1506. {
  1507. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_Wmax_NFault;
  1508. }
  1509. else
  1510. {
  1511. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AWmax_NFault;
  1512. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BWmax_NFault;
  1513. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CWmax_NFault;
  1514. }
  1515. }
  1516. //电量最大
  1517. if(AC3PPDU_kWhmax_LTen_flag[ch_x] > 0)
  1518. {
  1519. if(ch_x > CH_in)//输出通道
  1520. {
  1521. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_Out1Para_Addr + 6 + i] > AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhLit1_max_Addr + ch_x-1])
  1522. {
  1523. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] |= AC3PPDU_kWhmax_Fault;
  1524. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_Over_Ch1_Func + ch_x-1] & (AC3PPDU_Over_C_Max_Func_enable)) //is or not open func add by liyi
  1525. {
  1526. RL_Func_statu[ch_x] = 1;
  1527. }
  1528. }
  1529. else
  1530. {
  1531. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_kWhmax_NFault;
  1532. }
  1533. }
  1534. else//输入通道
  1535. {
  1536. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1537. {
  1538. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_AkWhmax_Fault;
  1539. }
  1540. else
  1541. {
  1542. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AkWhmax_NFault;
  1543. }
  1544. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1545. {
  1546. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_BkWhmax_Fault;
  1547. }
  1548. else
  1549. {
  1550. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BkWhmax_NFault;
  1551. }
  1552. if(AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_WiLit_max_Addr])//超限
  1553. {
  1554. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] |= AC3PPDU_CkWhmax_Fault;
  1555. }
  1556. else
  1557. {
  1558. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CkWhmax_NFault;
  1559. }
  1560. }
  1561. }
  1562. else
  1563. {
  1564. if(ch_x > CH_in)
  1565. {
  1566. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr + ch_x] &= AC3PPDU_kWhmax_NFault;
  1567. }
  1568. else
  1569. {
  1570. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_AkWhmax_NFault;
  1571. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_BkWhmax_NFault;
  1572. AC3PPDU_Modbus_Reg[Mb_Dbuff_FT_ST_Addr] &= AC3PPDU_CkWhmax_NFault;
  1573. }
  1574. }
  1575. }
  1576. #ifdef USE_FULL_ASSERT
  1577. void assert_failed(uint8_t* file, uint32_t line)
  1578. {
  1579. while (1);
  1580. }
  1581. #else
  1582. void __aeabi_assert(const char * x1, const char * x2, int x3)
  1583. {
  1584. (void)x3;
  1585. }
  1586. #endif