gd32e23x_pmu.c 8.6 KB

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  1. /*!
  2. \file gd32e23x_pmu.c
  3. \brief PMU driver
  4. \version 2023-09-04, V2.0.1, firmware for GD32E23x
  5. */
  6. /*
  7. Copyright (c) 2024, GigaDevice Semiconductor Inc.
  8. Redistribution and use in source and binary forms, with or without modification,
  9. are permitted provided that the following conditions are met:
  10. 1. Redistributions of source code must retain the above copyright notice, this
  11. list of conditions and the following disclaimer.
  12. 2. Redistributions in binary form must reproduce the above copyright notice,
  13. this list of conditions and the following disclaimer in the documentation
  14. and/or other materials provided with the distribution.
  15. 3. Neither the name of the copyright holder nor the names of its contributors
  16. may be used to endorse or promote products derived from this software without
  17. specific prior written permission.
  18. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  22. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  24. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  25. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  26. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  27. OF SUCH DAMAGE.
  28. */
  29. #include "gd32e23x_pmu.h"
  30. /*!
  31. \brief reset PMU register
  32. \param[in] none
  33. \param[out] none
  34. \retval none
  35. */
  36. void pmu_deinit(void)
  37. {
  38. /* reset PMU */
  39. rcu_periph_reset_enable(RCU_PMURST);
  40. rcu_periph_reset_disable(RCU_PMURST);
  41. }
  42. /*!
  43. \brief select low voltage detector threshold
  44. \param[in] lvdt_n:
  45. only one parameter can be selected which is shown as below:
  46. \arg PMU_LVDT_0: voltage threshold is 2.1V
  47. \arg PMU_LVDT_1: voltage threshold is 2.3V
  48. \arg PMU_LVDT_2: voltage threshold is 2.4V
  49. \arg PMU_LVDT_3: voltage threshold is 2.6V
  50. \arg PMU_LVDT_4: voltage threshold is 2.7V
  51. \arg PMU_LVDT_5: voltage threshold is 2.9V
  52. \arg PMU_LVDT_6: voltage threshold is 3.0V
  53. \arg PMU_LVDT_7: voltage threshold is 3.1V
  54. \param[out] none
  55. \retval none
  56. */
  57. void pmu_lvd_select(uint32_t lvdt_n)
  58. {
  59. /* disable LVD */
  60. PMU_CTL &= ~PMU_CTL_LVDEN;
  61. /* clear LVDT bits */
  62. PMU_CTL &= ~PMU_CTL_LVDT;
  63. /* set LVDT bits according to lvdt_n */
  64. PMU_CTL |= lvdt_n;
  65. /* enable LVD */
  66. PMU_CTL |= PMU_CTL_LVDEN;
  67. }
  68. /*!
  69. \brief select LDO output voltage
  70. these bits set by software when the main PLL closed
  71. \param[in] ldo_output:
  72. only one parameter can be selected which is shown as below:
  73. \arg PMU_LDOVS_LOW: LDO output voltage low mode
  74. \arg PMU_LDOVS_HIGH: LDO output voltage high mode
  75. \param[out] none
  76. \retval none
  77. */
  78. void pmu_ldo_output_select(uint32_t ldo_output)
  79. {
  80. PMU_CTL &= ~PMU_CTL_LDOVS;
  81. PMU_CTL |= ldo_output;
  82. }
  83. /*!
  84. \brief disable PMU lvd
  85. \param[in] none
  86. \param[out] none
  87. \retval none
  88. */
  89. void pmu_lvd_disable(void)
  90. {
  91. /* disable LVD */
  92. PMU_CTL &= ~PMU_CTL_LVDEN;
  93. }
  94. /*!
  95. \brief PMU work at sleep mode
  96. \param[in] sleepmodecmd:
  97. only one parameter can be selected which is shown as below:
  98. \arg WFI_CMD: use WFI command
  99. \arg WFE_CMD: use WFE command
  100. \param[out] none
  101. \retval none
  102. */
  103. void pmu_to_sleepmode(uint8_t sleepmodecmd)
  104. {
  105. /* clear sleepdeep bit of Cortex-M23 system control register */
  106. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  107. /* select WFI or WFE command to enter sleep mode */
  108. if(WFI_CMD == sleepmodecmd){
  109. __WFI();
  110. }else{
  111. __WFE();
  112. __WFE();
  113. }
  114. }
  115. /*!
  116. \brief PMU work at deepsleep mode
  117. \param[in] ldo:
  118. only one parameter can be selected which is shown as below:
  119. \arg PMU_LDO_NORMAL: LDO operates normally when pmu enter deepsleep mode
  120. \arg PMU_LDO_LOWPOWER: LDO work at low power mode when pmu enter deepsleep mode
  121. \param[in] deepsleepmodecmd:
  122. only one parameter can be selected which is shown as below:
  123. \arg WFI_CMD: use WFI command
  124. \arg WFE_CMD: use WFE command
  125. \param[out] none
  126. \retval none
  127. */
  128. void pmu_to_deepsleepmode(uint32_t ldo,uint8_t deepsleepmodecmd)
  129. {
  130. /* clear stbmod and ldolp bits */
  131. PMU_CTL &= ~((uint32_t)(PMU_CTL_STBMOD | PMU_CTL_LDOLP));
  132. /* set ldolp bit according to pmu_ldo */
  133. PMU_CTL |= ldo;
  134. /* set sleepdeep bit of Cortex-M23 system control register */
  135. SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  136. /* select WFI or WFE command to enter deepsleep mode */
  137. if(WFI_CMD == deepsleepmodecmd){
  138. __WFI();
  139. }else{
  140. __SEV();
  141. __WFE();
  142. __WFE();
  143. }
  144. /* reset sleepdeep bit of Cortex-M23 system control register */
  145. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  146. }
  147. /*!
  148. \brief pmu work at standby mode
  149. \param[in] none
  150. \param[out] none
  151. \retval none
  152. */
  153. void pmu_to_standbymode(void)
  154. {
  155. /* switch to IRC8M clock as system clock, close HXTAL */
  156. RCU_CFG0 &= ~RCU_CFG0_SCS;
  157. RCU_CTL0 &= ~RCU_CTL0_HXTALEN;
  158. /* set stbmod bit */
  159. PMU_CTL |= PMU_CTL_STBMOD;
  160. /* reset wakeup flag */
  161. PMU_CTL |= PMU_CTL_WURST;
  162. /* set sleepdeep bit of Cortex-M23 system control register */
  163. SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  164. REG32( 0xE000E010U ) &= 0x00010004U;
  165. REG32( 0xE000E180U ) = 0XFFFFFFFBU;
  166. REG32( 0xE000E184U ) = 0XFFFFFFFFU;
  167. REG32( 0xE000E188U ) = 0xFFFFFFFFU;
  168. /* select WFI command to enter standby mode */
  169. __WFI();
  170. }
  171. /*!
  172. \brief enable wakeup pin
  173. \param[in] wakeup_pin:
  174. one or more parameters can be selected which are shown as below:
  175. \arg PMU_WAKEUP_PIN0: WKUP Pin 0 (PA0)
  176. \arg PMU_WAKEUP_PIN1: WKUP Pin 1 (PC13)
  177. \arg PMU_WAKEUP_PIN5: WKUP Pin 5 (PB5)
  178. \arg PMU_WAKEUP_PIN6: WKUP Pin 6 (PB15)
  179. \param[out] none
  180. \retval none
  181. */
  182. void pmu_wakeup_pin_enable(uint32_t wakeup_pin)
  183. {
  184. PMU_CS |= wakeup_pin;
  185. }
  186. /*!
  187. \brief disable wakeup pin
  188. \param[in] wakeup_pin:
  189. one or more parameters can be selected which are shown as below:
  190. \arg PMU_WAKEUP_PIN0: WKUP Pin 0 (PA0)
  191. \arg PMU_WAKEUP_PIN1: WKUP Pin 1 (PC13)
  192. \arg PMU_WAKEUP_PIN5: WKUP Pin 5 (PB5)
  193. \arg PMU_WAKEUP_PIN6: WKUP Pin 6 (PB15)
  194. \param[out] none
  195. \retval none
  196. */
  197. void pmu_wakeup_pin_disable(uint32_t wakeup_pin)
  198. {
  199. PMU_CS &= ~(wakeup_pin);
  200. }
  201. /*!
  202. \brief enable backup domain write
  203. \param[in] none
  204. \param[out] none
  205. \retval none
  206. */
  207. void pmu_backup_write_enable(void)
  208. {
  209. PMU_CTL |= PMU_CTL_BKPWEN;
  210. }
  211. /*!
  212. \brief disable backup domain write
  213. \param[in] none
  214. \param[out] none
  215. \retval none
  216. */
  217. void pmu_backup_write_disable(void)
  218. {
  219. PMU_CTL &= ~PMU_CTL_BKPWEN;
  220. }
  221. /*!
  222. \brief get flag state
  223. \param[in] flag:
  224. only one parameter can be selected which is shown as below:
  225. \arg PMU_FLAG_WAKEUP: wakeup flag
  226. \arg PMU_FLAG_STANDBY: standby flag
  227. \arg PMU_FLAG_LVD: lvd flag
  228. \param[out] none
  229. \retval FlagStatus SET or RESET
  230. */
  231. FlagStatus pmu_flag_get(uint32_t flag)
  232. {
  233. FlagStatus ret_status = RESET;
  234. if(PMU_CS & flag){
  235. ret_status = SET;
  236. }
  237. return ret_status;
  238. }
  239. /*!
  240. \brief clear flag bit
  241. \param[in] flag:
  242. one or more parameters can be selected which are shown as below:
  243. \arg PMU_FLAG_RESET_WAKEUP: reset wakeup flag
  244. \arg PMU_FLAG_RESET_STANDBY: reset standby flag
  245. \param[out] none
  246. \retval none
  247. */
  248. void pmu_flag_clear(uint32_t flag)
  249. {
  250. if(RESET != (flag & PMU_FLAG_RESET_WAKEUP)){
  251. /* reset wakeup flag */
  252. PMU_CTL |= PMU_CTL_WURST;
  253. }
  254. if(RESET != (flag & PMU_FLAG_RESET_STANDBY)){
  255. /* reset standby flag */
  256. PMU_CTL |= PMU_CTL_STBRST;
  257. }
  258. }