SmartPDCode/truing_control/STS_FreeRTOS/HARDWARE/SPI/spi.c

#include "spi.h"
#include "gd32f30x_libopt.h"

#define arraysize         11520

//uint16_t spi1_send_array[arraysize / 2] = {0};

#define SET_SPI1_NSS_HIGH          gpio_bit_set(GPIOB,GPIO_PIN_12);
#define SET_SPI1_NSS_LOW           gpio_bit_reset(GPIOB,GPIO_PIN_12);

void spix_init(void)
{
	rcu_periph_clock_enable(RCU_SPI1);
	rcu_periph_clock_enable(RCU_GPIOB);
	rcu_periph_clock_enable(RCU_DMA0);
	
	gpio_init(GPIOB, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_13 |GPIO_PIN_15);
	gpio_init(GPIOB, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_12);
//  i2s_init(SPI1, I2S_MODE_MASTERTX, I2S_STD_PHILLIPS, I2S_CKPL_LOW);
//  i2s_psc_config(SPI1, I2S_AUDIOSAMPLE_11K, I2S_FRAMEFORMAT_DT16B_CH16B, I2S_MCKOUT_DISABLE);
//	i2s_enable(SPI1);
//	
	
	spi_i2s_deinit(SPI1);
	spi_parameter_struct spi1_init = {0};
	
	spi1_init.device_mode = SPI_MASTER;
	spi1_init.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
	spi1_init.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
	spi1_init.frame_size = SPI_FRAMESIZE_8BIT;
	spi1_init.nss = SPI_NSS_SOFT;
	spi1_init.prescale = SPI_PSC_2;
	spi1_init.endian = SPI_ENDIAN_MSB;
	
	spi_init(SPI1,&spi1_init);
	
	
	//spi_nssp_mode_enable(SPI1);
  //spi_nss_output_enable(SPI1);
	spi_enable(SPI1);
	
	
	dma_parameter_struct dma_init_struct;
  dma_deinit(DMA0, DMA_CH4);
	dma_init_struct.direction    = DMA_MEMORY_TO_PERIPHERAL;
	
  
  dma_init_struct.memory_addr  = (uint32_t)0;
  dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
	dma_init_struct.memory_inc   = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.number       = 0;
	
	dma_init_struct.periph_addr  = (uint32_t)&SPI_DATA(SPI1);
	dma_init_struct.periph_inc   = DMA_PERIPH_INCREASE_DISABLE;
  dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_32BIT;
  dma_init_struct.priority     = DMA_PRIORITY_LOW;
  
  
  dma_init(DMA0, DMA_CH4, &dma_init_struct);

//    /* configure DMA mode */
  dma_circulation_disable(DMA0, DMA_CH4);
  dma_memory_to_memory_disable(DMA0, DMA_CH4);

	dma_channel_disable(DMA0, DMA_CH4);
	//SET_SPI1_NSS_LOW
	spi_dma_enable(SPI1, SPI_DMA_TRANSMIT);
	
}

void spix_send(void *buff,int size)
{

	dma_channel_disable(DMA0,DMA_CH4);
	dma_memory_address_config(DMA0,DMA_CH4,(uint32_t)(buff));
	dma_transfer_number_config(DMA0,DMA_CH4,size);
	dma_channel_enable(DMA0,DMA_CH4);
	spi_dma_enable(SPI1, SPI_DMA_TRANSMIT);
	while(!dma_flag_get(DMA0, DMA_CH4, DMA_FLAG_FTF));
	dma_flag_clear(DMA0, DMA_CH4, DMA_FLAG_FTF);

}