gd32e23x_rtc.c 36 KB

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  1. /*!
  2. \file gd32e23x_rtc.c
  3. \brief RTC driver
  4. \version 2024-02-22, V2.1.0, firmware for GD32E23x
  5. */
  6. /*
  7. Copyright (c) 2024, GigaDevice Semiconductor Inc.
  8. Redistribution and use in source and binary forms, with or without modification,
  9. are permitted provided that the following conditions are met:
  10. 1. Redistributions of source code must retain the above copyright notice, this
  11. list of conditions and the following disclaimer.
  12. 2. Redistributions in binary form must reproduce the above copyright notice,
  13. this list of conditions and the following disclaimer in the documentation
  14. and/or other materials provided with the distribution.
  15. 3. Neither the name of the copyright holder nor the names of its contributors
  16. may be used to endorse or promote products derived from this software without
  17. specific prior written permission.
  18. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  22. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  24. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  25. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  26. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  27. OF SUCH DAMAGE.
  28. */
  29. #include "gd32e23x_rtc.h"
  30. /*!
  31. \brief reset most of the RTC registers
  32. \param[in] none
  33. \param[out] none
  34. \retval ErrStatus: ERROR or SUCCESS
  35. */
  36. ErrStatus rtc_deinit(void)
  37. {
  38. ErrStatus error_status = ERROR;
  39. /* RTC_TAMP register is not under write protection */
  40. RTC_TAMP = RTC_REGISTER_RESET;
  41. /* disable the write protection */
  42. RTC_WPK = RTC_UNLOCK_KEY1;
  43. RTC_WPK = RTC_UNLOCK_KEY2;
  44. /* reset RTC_CTL register, this can be done without the init mode */
  45. RTC_CTL &= RTC_REGISTER_RESET;
  46. /* enter init mode */
  47. error_status = rtc_init_mode_enter();
  48. if(ERROR != error_status){
  49. /* before reset RTC_TIME and RTC_DATE, BPSHAD bit in RTC_CTL should be reset as the condition.
  50. in order to read calendar from shadow register, not the real registers being reset */
  51. RTC_TIME = RTC_REGISTER_RESET;
  52. RTC_DATE = RTC_DATE_RESET;
  53. RTC_PSC = RTC_PSC_RESET;
  54. /* reset RTC_STAT register, also exit init mode.
  55. at the same time, RTC_STAT_SOPF bit is reset, as the condition to reset RTC_SHIFTCTL register later */
  56. RTC_STAT = RTC_STAT_RESET;
  57. /* to write RTC_ALRM0SS register, ALRM0EN bit in RTC_CTL register should be reset as the condition */
  58. RTC_ALRM0TD = RTC_REGISTER_RESET;
  59. RTC_ALRM0SS = RTC_REGISTER_RESET;
  60. /* reset RTC_SHIFTCTL and RTC_HRFC register, this can be done without the init mode */
  61. RTC_SHIFTCTL = RTC_REGISTER_RESET;
  62. RTC_HRFC = RTC_REGISTER_RESET;
  63. error_status = rtc_register_sync_wait();
  64. }
  65. /* enable the write protection */
  66. RTC_WPK = RTC_LOCK_KEY;
  67. return error_status;
  68. }
  69. /*!
  70. \brief initialize RTC registers
  71. \param[in] rtc_initpara_struct: pointer to a rtc_parameter_struct structure which contains
  72. parameters for initialization of the rtc peripheral
  73. members of the structure and the member values are shown as below:
  74. rtc_year: 0x0 - 0x99(BCD format)
  75. rtc_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
  76. RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
  77. rtc_date: 0x1 - 0x31(BCD format)
  78. rtc_day_of_week: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY
  79. RTC_FRIDAY, RTC_SATURDAY, RTC_SUNDAY
  80. rtc_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format chose
  81. rtc_minute: 0x0 - 0x59(BCD format)
  82. rtc_second: 0x0 - 0x59(BCD format)
  83. rtc_factor_asyn: 0x0 - 0x7F
  84. rtc_factor_syn: 0x0 - 0x7FFF
  85. rtc_am_pm: RTC_AM, RTC_PM
  86. rtc_display_format: RTC_24HOUR, RTC_12HOUR
  87. \param[out] none
  88. \retval ErrStatus: ERROR or SUCCESS
  89. */
  90. ErrStatus rtc_init(rtc_parameter_struct* rtc_initpara_struct)
  91. {
  92. ErrStatus error_status = ERROR;
  93. uint32_t reg_time = 0x00U, reg_date = 0x00U;
  94. reg_date = (DATE_YR(rtc_initpara_struct->rtc_year) | \
  95. DATE_DOW(rtc_initpara_struct->rtc_day_of_week) | \
  96. DATE_MON(rtc_initpara_struct->rtc_month) | \
  97. DATE_DAY(rtc_initpara_struct->rtc_date));
  98. reg_time = (rtc_initpara_struct->rtc_am_pm| \
  99. TIME_HR(rtc_initpara_struct->rtc_hour) | \
  100. TIME_MN(rtc_initpara_struct->rtc_minute) | \
  101. TIME_SC(rtc_initpara_struct->rtc_second));
  102. /* 1st: disable the write protection */
  103. RTC_WPK = RTC_UNLOCK_KEY1;
  104. RTC_WPK = RTC_UNLOCK_KEY2;
  105. /* 2nd: enter init mode */
  106. error_status = rtc_init_mode_enter();
  107. if(ERROR != error_status){
  108. RTC_PSC = (uint32_t)(PSC_FACTOR_A(rtc_initpara_struct->rtc_factor_asyn)| \
  109. PSC_FACTOR_S(rtc_initpara_struct->rtc_factor_syn));
  110. RTC_TIME = (uint32_t)reg_time;
  111. RTC_DATE = (uint32_t)reg_date;
  112. RTC_CTL &= (uint32_t)(~RTC_CTL_CS);
  113. RTC_CTL |= rtc_initpara_struct->rtc_display_format;
  114. /* 3rd: exit init mode */
  115. rtc_init_mode_exit();
  116. /* 4th: wait the RSYNF flag to set */
  117. error_status = rtc_register_sync_wait();
  118. }
  119. /* 5th: enable the write protection */
  120. RTC_WPK = RTC_LOCK_KEY;
  121. return error_status;
  122. }
  123. /*!
  124. \brief enter RTC init mode
  125. \param[in] none
  126. \param[out] none
  127. \retval ErrStatus: ERROR or SUCCESS
  128. */
  129. ErrStatus rtc_init_mode_enter(void)
  130. {
  131. uint32_t time_index = RTC_INITM_TIMEOUT;
  132. uint32_t flag_status = RESET;
  133. ErrStatus error_status = ERROR;
  134. /* check whether it has been in init mode */
  135. if((uint32_t)RESET == (RTC_STAT & RTC_STAT_INITF)){
  136. RTC_STAT |= RTC_STAT_INITM;
  137. /* wait until the INITF flag to be set */
  138. do{
  139. flag_status = RTC_STAT & RTC_STAT_INITF;
  140. }while((--time_index > 0x00U) && ((uint32_t)RESET == flag_status));
  141. if((uint32_t)RESET != flag_status){
  142. error_status = SUCCESS;
  143. }
  144. }else{
  145. error_status = SUCCESS;
  146. }
  147. return error_status;
  148. }
  149. /*!
  150. \brief exit RTC init mode
  151. \param[in] none
  152. \param[out] none
  153. \retval none
  154. */
  155. void rtc_init_mode_exit(void)
  156. {
  157. RTC_STAT &= (uint32_t)(~RTC_STAT_INITM);
  158. }
  159. /*!
  160. \brief wait until RTC_TIME and RTC_DATE registers are synchronized with APB clock, and the shadow
  161. registers are updated
  162. \param[in] none
  163. \param[out] none
  164. \retval ErrStatus: ERROR or SUCCESS
  165. */
  166. ErrStatus rtc_register_sync_wait(void)
  167. {
  168. volatile uint32_t time_index = RTC_RSYNF_TIMEOUT;
  169. uint32_t flag_status = RESET;
  170. ErrStatus error_status = ERROR;
  171. if((uint32_t)RESET == (RTC_CTL & RTC_CTL_BPSHAD)){
  172. /* disable the write protection */
  173. RTC_WPK = RTC_UNLOCK_KEY1;
  174. RTC_WPK = RTC_UNLOCK_KEY2;
  175. /* firstly clear RSYNF flag */
  176. RTC_STAT &= (uint32_t)(~RTC_STAT_RSYNF);
  177. /* wait until RSYNF flag to be set */
  178. do{
  179. flag_status = RTC_STAT & RTC_STAT_RSYNF;
  180. }while((--time_index > 0x00U) && ((uint32_t)RESET == flag_status));
  181. if((uint32_t)RESET != flag_status){
  182. error_status = SUCCESS;
  183. }
  184. /* enable the write protection */
  185. RTC_WPK = RTC_LOCK_KEY;
  186. }else{
  187. error_status = SUCCESS;
  188. }
  189. return error_status;
  190. }
  191. /*!
  192. \brief get current time and date
  193. \param[in] none
  194. \param[out] rtc_initpara_struct: pointer to a rtc_parameter_struct structure which contains
  195. parameters for initialization of the rtc peripheral
  196. members of the structure and the member values are shown as below:
  197. rtc_year: 0x0 - 0x99(BCD format)
  198. rtc_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
  199. RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
  200. rtc_date: 0x1 - 0x31(BCD format)
  201. rtc_day_of_week: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY
  202. RTC_FRIDAY, RTC_SATURDAY, RTC_SUNDAY
  203. rtc_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format chose
  204. rtc_minute: 0x0 - 0x59(BCD format)
  205. rtc_second: 0x0 - 0x59(BCD format)
  206. rtc_factor_asyn: 0x0 - 0x7F
  207. rtc_factor_syn: 0x0 - 0x7FFF
  208. rtc_am_pm: RTC_AM, RTC_PM
  209. rtc_display_format: RTC_24HOUR, RTC_12HOUR
  210. \retval none
  211. */
  212. void rtc_current_time_get(rtc_parameter_struct* rtc_initpara_struct)
  213. {
  214. uint32_t temp_tr = 0x00U, temp_dr = 0x00U, temp_pscr = 0x00U, temp_ctlr = 0x00U;
  215. temp_tr = (uint32_t)RTC_TIME;
  216. temp_dr = (uint32_t)RTC_DATE;
  217. temp_pscr = (uint32_t)RTC_PSC;
  218. temp_ctlr = (uint32_t)RTC_CTL;
  219. /* get current time and construct rtc_parameter_struct structure */
  220. rtc_initpara_struct->rtc_year = (uint8_t)GET_DATE_YR(temp_dr);
  221. rtc_initpara_struct->rtc_month = (uint8_t)GET_DATE_MON(temp_dr);
  222. rtc_initpara_struct->rtc_date = (uint8_t)GET_DATE_DAY(temp_dr);
  223. rtc_initpara_struct->rtc_day_of_week = (uint8_t)GET_DATE_DOW(temp_dr);
  224. rtc_initpara_struct->rtc_hour = (uint8_t)GET_TIME_HR(temp_tr);
  225. rtc_initpara_struct->rtc_minute = (uint8_t)GET_TIME_MN(temp_tr);
  226. rtc_initpara_struct->rtc_second = (uint8_t)GET_TIME_SC(temp_tr);
  227. rtc_initpara_struct->rtc_factor_asyn = (uint16_t)GET_PSC_FACTOR_A(temp_pscr);
  228. rtc_initpara_struct->rtc_factor_syn = (uint16_t)GET_PSC_FACTOR_S(temp_pscr);
  229. rtc_initpara_struct->rtc_am_pm = (uint32_t)(temp_tr & RTC_TIME_PM);
  230. rtc_initpara_struct->rtc_display_format = (uint32_t)(temp_ctlr & RTC_CTL_CS);
  231. }
  232. /*!
  233. \brief get current subsecond value
  234. \param[in] none
  235. \param[out] none
  236. \retval current subsecond value
  237. */
  238. uint32_t rtc_subsecond_get(void)
  239. {
  240. uint32_t reg = 0x00U;
  241. /* if BPSHAD bit is reset, reading RTC_SS will lock RTC_TIME and RTC_DATE automatically */
  242. reg = (uint32_t)RTC_SS;
  243. /* read RTC_DATE to unlock the 3 shadow registers */
  244. (void) (RTC_DATE);
  245. return reg;
  246. }
  247. /*!
  248. \brief configure RTC alarm
  249. \param[in] rtc_alarm_time: pointer to a rtc_alarm_struct structure which contains
  250. parameters for RTC alarm configuration
  251. members of the structure and the member values are shown as below:
  252. rtc_alarm_mask: RTC_ALARM_NONE_MASK, RTC_ALARM_DATE_MASK, RTC_ALARM_HOUR_MASK
  253. RTC_ALARM_MINUTE_MASK, RTC_ALARM_SECOND_MASK, RTC_ALARM_ALL_MASK
  254. rtc_weekday_or_date: RTC_ALARM_DATE_SELECTED, RTC_ALARM_WEEKDAY_SELECTED
  255. rtc_alarm_day: 1) 0x1 - 0x31(BCD format) if RTC_ALARM_DATE_SELECTED is set
  256. 2) RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
  257. RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
  258. rtc_alarm_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
  259. rtc_alarm_minute: 0x0 - 0x59(BCD format)
  260. rtc_alarm_second: 0x0 - 0x59(BCD format)
  261. rtc_am_pm: RTC_AM, RTC_PM
  262. \param[out] none
  263. \retval none
  264. */
  265. void rtc_alarm_config(rtc_alarm_struct* rtc_alarm_time)
  266. {
  267. uint32_t reg_alrm0td = 0x00U;
  268. reg_alrm0td = (rtc_alarm_time->rtc_alarm_mask | \
  269. rtc_alarm_time->rtc_weekday_or_date | \
  270. rtc_alarm_time->rtc_am_pm | \
  271. ALRM0TD_DAY(rtc_alarm_time->rtc_alarm_day) | \
  272. ALRM0TD_HR(rtc_alarm_time->rtc_alarm_hour) | \
  273. ALRM0TD_MN(rtc_alarm_time->rtc_alarm_minute) | \
  274. ALRM0TD_SC(rtc_alarm_time->rtc_alarm_second));
  275. /* disable the write protection */
  276. RTC_WPK = RTC_UNLOCK_KEY1;
  277. RTC_WPK = RTC_UNLOCK_KEY2;
  278. RTC_ALRM0TD = (uint32_t)reg_alrm0td;
  279. /* enable the write protection */
  280. RTC_WPK = RTC_LOCK_KEY;
  281. }
  282. /*!
  283. \brief configure subsecond of RTC alarm
  284. \param[in] mask_subsecond: alarm subsecond mask
  285. only one parameter can be selected which is shown as below:
  286. \arg RTC_MASKSSC_0_14: mask alarm subsecond configuration
  287. \arg RTC_MASKSSC_1_14: mask RTC_ALRM0SS_SSC[14:1], and RTC_ALRM0SS_SSC[0] is to be compared
  288. \arg RTC_MASKSSC_2_14: mask RTC_ALRM0SS_SSC[14:2], and RTC_ALRM0SS_SSC[1:0] is to be compared
  289. \arg RTC_MASKSSC_3_14: mask RTC_ALRM0SS_SSC[14:3], and RTC_ALRM0SS_SSC[2:0] is to be compared
  290. \arg RTC_MASKSSC_4_14: mask RTC_ALRM0SS_SSC[14:4], and RTC_ALRM0SS_SSC[3:0] is to be compared
  291. \arg RTC_MASKSSC_5_14: mask RTC_ALRM0SS_SSC[14:5], and RTC_ALRM0SS_SSC[4:0] is to be compared
  292. \arg RTC_MASKSSC_6_14: mask RTC_ALRM0SS_SSC[14:6], and RTC_ALRM0SS_SSC[5:0] is to be compared
  293. \arg RTC_MASKSSC_7_14: mask RTC_ALRM0SS_SSC[14:7], and RTC_ALRM0SS_SSC[6:0] is to be compared
  294. \arg RTC_MASKSSC_8_14: mask RTC_ALRM0SS_SSC[14:8], and RTC_ALRM0SS_SSC[7:0] is to be compared
  295. \arg RTC_MASKSSC_9_14: mask RTC_ALRM0SS_SSC[14:9], and RTC_ALRM0SS_SSC[8:0] is to be compared
  296. \arg RTC_MASKSSC_10_14: mask RTC_ALRM0SS_SSC[14:10], and RTC_ALRM0SS_SSC[9:0] is to be compared
  297. \arg RTC_MASKSSC_11_14: mask RTC_ALRM0SS_SSC[14:11], and RTC_ALRM0SS_SSC[10:0] is to be compared
  298. \arg RTC_MASKSSC_12_14: mask RTC_ALRM0SS_SSC[14:12], and RTC_ALRM0SS_SSC[11:0] is to be compared
  299. \arg RTC_MASKSSC_13_14: mask RTC_ALRM0SS_SSC[14:13], and RTC_ALRM0SS_SSC[12:0] is to be compared
  300. \arg RTC_MASKSSC_14: mask RTC_ALRM0SS_SSC[14], and RTC_ALRM0SS_SSC[13:0] is to be compared
  301. \arg RTC_MASKSSC_NONE: mask none, and RTC_ALRM0SS_SSC[14:0] is to be compared
  302. \param[in] subsecond: alarm subsecond value(0x000 - 0x7FFF)
  303. \param[out] none
  304. \retval none
  305. */
  306. void rtc_alarm_subsecond_config(uint32_t mask_subsecond, uint32_t subsecond)
  307. {
  308. /* disable the write protection */
  309. RTC_WPK = RTC_UNLOCK_KEY1;
  310. RTC_WPK = RTC_UNLOCK_KEY2;
  311. RTC_ALRM0SS = mask_subsecond | subsecond;
  312. /* enable the write protection */
  313. RTC_WPK = RTC_LOCK_KEY;
  314. }
  315. /*!
  316. \brief enable RTC alarm
  317. \param[in] none
  318. \param[out] none
  319. \retval none
  320. */
  321. void rtc_alarm_enable(void)
  322. {
  323. /* disable the write protection */
  324. RTC_WPK = RTC_UNLOCK_KEY1;
  325. RTC_WPK = RTC_UNLOCK_KEY2;
  326. RTC_CTL |= RTC_CTL_ALRM0EN;
  327. /* enable the write protection */
  328. RTC_WPK = RTC_LOCK_KEY;
  329. }
  330. /*!
  331. \brief disable RTC alarm
  332. \param[in] none
  333. \param[out] none
  334. \retval ErrStatus: ERROR or SUCCESS
  335. */
  336. ErrStatus rtc_alarm_disable(void)
  337. {
  338. volatile uint32_t time_index = RTC_ALRM0WF_TIMEOUT;
  339. ErrStatus error_status = ERROR;
  340. uint32_t flag_status = RESET;
  341. /* disable the write protection */
  342. RTC_WPK = RTC_UNLOCK_KEY1;
  343. RTC_WPK = RTC_UNLOCK_KEY2;
  344. /* clear the state of alarm */
  345. RTC_CTL &= (uint32_t)(~RTC_CTL_ALRM0EN);
  346. /* wait until ALRM0WF flag to be set after the alarm is disabled */
  347. do{
  348. flag_status = RTC_STAT & RTC_STAT_ALRM0WF;
  349. }while((--time_index > 0x00U) && ((uint32_t)RESET == flag_status));
  350. if((uint32_t)RESET != flag_status){
  351. error_status = SUCCESS;
  352. }
  353. /* enable the write protection */
  354. RTC_WPK = RTC_LOCK_KEY;
  355. return error_status;
  356. }
  357. /*!
  358. \brief get RTC alarm
  359. \param[in] none
  360. \param[out] rtc_alarm_time: pointer to a rtc_alarm_struct structure which contains
  361. parameters for RTC alarm configuration
  362. members of the structure and the member values are shown as below:
  363. rtc_alarm_mask: RTC_ALARM_NONE_MASK, RTC_ALARM_DATE_MASK, RTC_ALARM_HOUR_MASK
  364. RTC_ALARM_MINUTE_MASK, RTC_ALARM_SECOND_MASK, RTC_ALARM_ALL_MASK
  365. rtc_weekday_or_date: RTC_ALARM_DATE_SELECTED, RTC_ALARM_WEEKDAY_SELECTED
  366. rtc_alarm_day: 1) 0x1 - 0x31(BCD format) if RTC_ALARM_DATE_SELECTED is set
  367. 2) RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
  368. RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
  369. rtc_alarm_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
  370. rtc_alarm_minute: 0x0 - 0x59(BCD format)
  371. rtc_alarm_second: 0x0 - 0x59(BCD format)
  372. rtc_am_pm: RTC_AM, RTC_PM
  373. \retval none
  374. */
  375. void rtc_alarm_get(rtc_alarm_struct* rtc_alarm_time)
  376. {
  377. uint32_t reg_alrm0td = 0x00U;
  378. /* get the value of RTC_ALRM0TD register */
  379. reg_alrm0td = RTC_ALRM0TD;
  380. /* get alarm parameters and construct the rtc_alarm_struct structure */
  381. rtc_alarm_time->rtc_alarm_mask = reg_alrm0td & RTC_ALARM_ALL_MASK;
  382. rtc_alarm_time->rtc_am_pm = (uint32_t)(reg_alrm0td & RTC_ALRM0TD_PM);
  383. rtc_alarm_time->rtc_weekday_or_date = (uint32_t)(reg_alrm0td & RTC_ALRM0TD_DOWS);
  384. rtc_alarm_time->rtc_alarm_day = (uint8_t)GET_ALRM0TD_DAY(reg_alrm0td);
  385. rtc_alarm_time->rtc_alarm_hour = (uint8_t)GET_ALRM0TD_HR(reg_alrm0td);
  386. rtc_alarm_time->rtc_alarm_minute = (uint8_t)GET_ALRM0TD_MN(reg_alrm0td);
  387. rtc_alarm_time->rtc_alarm_second = (uint8_t)GET_ALRM0TD_SC(reg_alrm0td);
  388. }
  389. /*!
  390. \brief get RTC alarm subsecond
  391. \param[in] none
  392. \param[out] none
  393. \retval RTC alarm subsecond value
  394. */
  395. uint32_t rtc_alarm_subsecond_get(void)
  396. {
  397. return ((uint32_t)(RTC_ALRM0SS & RTC_ALRM0SS_SSC));
  398. }
  399. /*!
  400. \brief enable RTC time-stamp
  401. \param[in] edge: specify which edge to detect of time-stamp
  402. only one parameter can be selected which is shown as below:
  403. \arg RTC_TIMESTAMP_RISING_EDGE: rising edge is valid event edge for timestamp event
  404. \arg RTC_TIMESTAMP_FALLING_EDGE: falling edge is valid event edge for timestamp event
  405. \param[out] none
  406. \retval none
  407. */
  408. void rtc_timestamp_enable(uint32_t edge)
  409. {
  410. uint32_t reg_ctl = 0x00U;
  411. /* clear the bits to be configured in RTC_CTL */
  412. reg_ctl = (uint32_t)(RTC_CTL & (uint32_t)(~(RTC_CTL_TSEG | RTC_CTL_TSEN)));
  413. /* new configuration */
  414. reg_ctl |= (uint32_t)(edge | RTC_CTL_TSEN);
  415. /* disable the write protection */
  416. RTC_WPK = RTC_UNLOCK_KEY1;
  417. RTC_WPK = RTC_UNLOCK_KEY2;
  418. RTC_CTL = (uint32_t)reg_ctl;
  419. /* enable the write protection */
  420. RTC_WPK = RTC_LOCK_KEY;
  421. }
  422. /*!
  423. \brief disable RTC time-stamp
  424. \param[in] none
  425. \param[out] none
  426. \retval none
  427. */
  428. void rtc_timestamp_disable(void)
  429. {
  430. /* disable the write protection */
  431. RTC_WPK = RTC_UNLOCK_KEY1;
  432. RTC_WPK = RTC_UNLOCK_KEY2;
  433. /* clear the TSEN bit */
  434. RTC_CTL &= (uint32_t)(~ RTC_CTL_TSEN);
  435. /* enable the write protection */
  436. RTC_WPK = RTC_LOCK_KEY;
  437. }
  438. /*!
  439. \brief get RTC timestamp time and date
  440. \param[in] none
  441. \param[out] rtc_timestamp: pointer to a rtc_timestamp_struct structure which contains
  442. parameters for RTC time-stamp configuration
  443. members of the structure and the member values are shown as below:
  444. rtc_timestamp_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
  445. RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
  446. rtc_timestamp_date: 0x1 - 0x31(BCD format)
  447. rtc_timestamp_day: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
  448. RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
  449. rtc_timestamp_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
  450. rtc_timestamp_minute: 0x0 - 0x59(BCD format)
  451. rtc_timestamp_second: 0x0 - 0x59(BCD format)
  452. rtc_am_pm: RTC_AM, RTC_PM
  453. \retval none
  454. */
  455. void rtc_timestamp_get(rtc_timestamp_struct* rtc_timestamp)
  456. {
  457. uint32_t temp_tts = 0x00U, temp_dts = 0x00U;
  458. /* get the value of time_stamp registers */
  459. temp_tts = (uint32_t)RTC_TTS;
  460. temp_dts = (uint32_t)RTC_DTS;
  461. /* get timestamp time and construct the rtc_timestamp_struct structure */
  462. rtc_timestamp->rtc_am_pm = (uint32_t)(temp_tts & RTC_TTS_PM);
  463. rtc_timestamp->rtc_timestamp_month = (uint8_t)GET_DTS_MON(temp_dts);
  464. rtc_timestamp->rtc_timestamp_date = (uint8_t)GET_DTS_DAY(temp_dts);
  465. rtc_timestamp->rtc_timestamp_day = (uint8_t)GET_DTS_DOW(temp_dts);
  466. rtc_timestamp->rtc_timestamp_hour = (uint8_t)GET_TTS_HR(temp_tts);
  467. rtc_timestamp->rtc_timestamp_minute = (uint8_t)GET_TTS_MN(temp_tts);
  468. rtc_timestamp->rtc_timestamp_second = (uint8_t)GET_TTS_SC(temp_tts);
  469. }
  470. /*!
  471. \brief get RTC time-stamp subsecond
  472. \param[in] none
  473. \param[out] none
  474. \retval RTC time-stamp subsecond value
  475. */
  476. uint32_t rtc_timestamp_subsecond_get(void)
  477. {
  478. return ((uint32_t)RTC_SSTS);
  479. }
  480. /*!
  481. \brief enable RTC tamper
  482. \param[in] rtc_tamper: pointer to a rtc_tamper_struct structure which contains
  483. parameters for RTC tamper configuration
  484. members of the structure and the member values are shown as below:
  485. rtc_tamper_source: RTC_TAMPER0, RTC_TAMPER1
  486. rtc_tamper_trigger: RTC_TAMPER_TRIGGER_EDGE_RISING, RTC_TAMPER_TRIGGER_EDGE_FALLING
  487. RTC_TAMPER_TRIGGER_LEVEL_LOW, RTC_TAMPER_TRIGGER_LEVEL_HIGH
  488. rtc_tamper_filter: RTC_FLT_EDGE, RTC_FLT_2S, RTC_FLT_4S, RTC_FLT_8S
  489. rtc_tamper_sample_frequency: RTC_FREQ_DIV32768, RTC_FREQ_DIV16384, RTC_FREQ_DIV8192,
  490. RTC_FREQ_DIV4096, RTC_FREQ_DIV2048, RTC_FREQ_DIV1024,
  491. RTC_FREQ_DIV512, RTC_FREQ_DIV256
  492. rtc_tamper_precharge_enable: DISABLE, ENABLE
  493. rtc_tamper_precharge_time: RTC_PRCH_1C, RTC_PRCH_2C, RTC_PRCH_4C, RTC_PRCH_8C
  494. rtc_tamper_with_timestamp: DISABLE, ENABLE
  495. \param[out] none
  496. \retval none
  497. */
  498. void rtc_tamper_enable(rtc_tamper_struct* rtc_tamper)
  499. {
  500. /* disable tamper */
  501. RTC_TAMP &= (uint32_t)~(rtc_tamper->rtc_tamper_source);
  502. /* tamper filter must be used when the tamper source is voltage level detection */
  503. RTC_TAMP &= (uint32_t)~RTC_TAMP_FLT;
  504. /* the tamper source is voltage level detection */
  505. if(rtc_tamper->rtc_tamper_filter != RTC_FLT_EDGE ){
  506. RTC_TAMP &= (uint32_t)~(RTC_TAMP_DISPU | RTC_TAMP_PRCH | RTC_TAMP_FREQ | RTC_TAMP_FLT);
  507. /* check if the tamper pin need precharge, if need, then configure the precharge time */
  508. if(DISABLE == rtc_tamper->rtc_tamper_precharge_enable){
  509. RTC_TAMP |= (uint32_t)RTC_TAMP_DISPU;
  510. }else{
  511. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_precharge_time);
  512. }
  513. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_sample_frequency);
  514. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_filter);
  515. }
  516. RTC_TAMP &= (uint32_t)~RTC_TAMP_TPTS;
  517. if(DISABLE != rtc_tamper->rtc_tamper_with_timestamp){
  518. /* the tamper event also cause a time-stamp event */
  519. RTC_TAMP |= (uint32_t)RTC_TAMP_TPTS;
  520. }
  521. /* configure the tamper trigger */
  522. RTC_TAMP &= ((uint32_t)~((rtc_tamper->rtc_tamper_source) << RTC_TAMPER_TRIGGER_POS));
  523. if(RTC_TAMPER_TRIGGER_EDGE_RISING != rtc_tamper->rtc_tamper_trigger){
  524. RTC_TAMP |= (uint32_t)((rtc_tamper->rtc_tamper_source)<< RTC_TAMPER_TRIGGER_POS);
  525. }
  526. /* enable tamper */
  527. RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_source);
  528. }
  529. /*!
  530. \brief disable RTC tamper
  531. \param[in] source: specify which tamper source to be disabled
  532. only one parameter can be selected which is shown as below:
  533. \arg RTC_TAMPER0
  534. \arg RTC_TAMPER1
  535. \param[out] none
  536. \retval none
  537. */
  538. void rtc_tamper_disable(uint32_t source)
  539. {
  540. /* disable tamper */
  541. RTC_TAMP &= (uint32_t)~source;
  542. }
  543. /*!
  544. \brief enable specified RTC interrupt
  545. \param[in] interrupt: specify which interrupt source to be enabled
  546. only one parameter can be selected which is shown as below:
  547. \arg RTC_INT_TIMESTAMP: timestamp interrupt
  548. \arg RTC_INT_ALARM: alarm interrupt
  549. \arg RTC_INT_TAMP: tamp interrupt
  550. \param[out] none
  551. \retval none
  552. */
  553. void rtc_interrupt_enable(uint32_t interrupt)
  554. {
  555. /* disable the write protection */
  556. RTC_WPK = RTC_UNLOCK_KEY1;
  557. RTC_WPK = RTC_UNLOCK_KEY2;
  558. /* enable the interrupts in RTC_CTL register */
  559. RTC_CTL |= (uint32_t)(interrupt & (uint32_t)~RTC_TAMP_TPIE);
  560. /* enable the interrupts in RTC_TAMP register */
  561. RTC_TAMP |= (uint32_t)(interrupt & RTC_TAMP_TPIE);
  562. /* enable the write protection */
  563. RTC_WPK = RTC_LOCK_KEY;
  564. }
  565. /*!
  566. \brief disble specified RTC interrupt
  567. \param[in] interrupt: specify which interrupt source to be disabled
  568. only one parameter can be selected which is shown as below:
  569. \arg RTC_INT_TIMESTAMP: timestamp interrupt
  570. \arg RTC_INT_ALARM: alarm interrupt
  571. \arg RTC_INT_TAMP: tamp interrupt
  572. \param[out] none
  573. \retval none
  574. */
  575. void rtc_interrupt_disable(uint32_t interrupt)
  576. {
  577. /* disable the write protection */
  578. RTC_WPK = RTC_UNLOCK_KEY1;
  579. RTC_WPK = RTC_UNLOCK_KEY2;
  580. /* disable the interrupts in RTC_CTL register */
  581. RTC_CTL &= (uint32_t)~(interrupt & (uint32_t)~RTC_TAMP_TPIE);
  582. /* disable the interrupts in RTC_TAMP register */
  583. RTC_TAMP &= (uint32_t)~(interrupt & RTC_TAMP_TPIE);
  584. /* enable the write protection */
  585. RTC_WPK = RTC_LOCK_KEY;
  586. }
  587. /*!
  588. \brief check specified flag
  589. \param[in] flag: specify which flag to check
  590. only one parameter can be selected which is shown as below:
  591. \arg RTC_FLAG_RECALIBRATION: recalibration pending flag
  592. \arg RTC_FLAG_TAMP1: tamper 1 event flag
  593. \arg RTC_FLAG_TAMP0: tamper 0 event flag
  594. \arg RTC_FLAG_TIMESTAMP_OVERFLOW: time-stamp overflow event flag
  595. \arg RTC_FLAG_TIMESTAMP: time-stamp event flag
  596. \arg RTC_FLAG_ALARM0: alarm event flag
  597. \arg RTC_FLAG_INIT: init mode event flag
  598. \arg RTC_FLAG_RSYN: time and date registers synchronized event flag
  599. \arg RTC_FLAG_YCM: year parameter configured event flag
  600. \arg RTC_FLAG_SHIFT: shift operation pending flag
  601. \arg RTC_FLAG_ALARM0_WRITTEN: alarm writen available flag
  602. \param[out] none
  603. \retval FlagStatus: SET or RESET
  604. */
  605. FlagStatus rtc_flag_get(uint32_t flag)
  606. {
  607. FlagStatus flag_state = RESET;
  608. if((uint32_t)RESET != (RTC_STAT & flag)){
  609. flag_state = SET;
  610. }
  611. return flag_state;
  612. }
  613. /*!
  614. \brief clear specified flag
  615. \param[in] flag: specify which flag to clear
  616. only one parameter can be selected which is shown as below:
  617. \arg RTC_FLAG_TAMP1: tamper 1 event flag
  618. \arg RTC_FLAG_TAMP0: tamper 0 event flag
  619. \arg RTC_FLAG_TIMESTAMP_OVERFLOW: time-stamp overflow event flag
  620. \arg RTC_FLAG_TIMESTAMP: time-stamp event flag
  621. \arg RTC_FLAG_ALARM0: alarm event flag
  622. \arg RTC_FLAG_RSYN: time and date registers synchronized event flag
  623. \param[out] none
  624. \retval none
  625. */
  626. void rtc_flag_clear(uint32_t flag)
  627. {
  628. RTC_STAT &= (uint32_t)(~flag);
  629. }
  630. /*!
  631. \brief configure rtc alternate output source
  632. \param[in] source: specify signal to output
  633. only one parameter can be selected which is shown as below:
  634. \arg RTC_CALIBRATION_512HZ: when the LXTAL freqency is 32768Hz and the RTC_PSC
  635. is the default value, output 512Hz signal
  636. \arg RTC_CALIBRATION_1HZ: when the LXTAL freqency is 32768Hz and the RTC_PSC
  637. is the default value, output 512Hz signal
  638. \arg RTC_ALARM_HIGH: when the alarm flag is set, the output pin is high
  639. \arg RTC_ALARM_LOW: when the Alarm flag is set, the output pin is low
  640. \param[in] mode: specify the output pin (PC13) mode when output alarm signal
  641. only one parameter can be selected which is shown as below:
  642. \arg RTC_ALARM_OUTPUT_OD: open drain mode
  643. \arg RTC_ALARM_OUTPUT_PP: push pull mode
  644. \param[out] none
  645. \retval none
  646. */
  647. void rtc_alter_output_config(uint32_t source, uint32_t mode)
  648. {
  649. /* disable the write protection */
  650. RTC_WPK = RTC_UNLOCK_KEY1;
  651. RTC_WPK = RTC_UNLOCK_KEY2;
  652. RTC_CTL &= (uint32_t)~(RTC_CTL_COEN | RTC_CTL_OS | RTC_CTL_OPOL | RTC_CTL_COS);
  653. RTC_CTL |= (uint32_t)(source);
  654. /* alarm output */
  655. if((uint32_t)RESET != (source & RTC_OS_ENABLE)){
  656. RTC_TAMP &= (uint32_t)~(RTC_TAMP_PC13VAL);
  657. RTC_TAMP |= (uint32_t)(mode);
  658. }
  659. /* enable the write protection */
  660. RTC_WPK = RTC_LOCK_KEY;
  661. }
  662. /*!
  663. \brief configure RTC calibration register
  664. \param[in] window: select calibration window
  665. only one parameter can be selected which is shown as below:
  666. \arg RTC_CALIBRATION_WINDOW_32S: 2exp20 RTCCLK cycles, 32s if RTCCLK = 32768 Hz
  667. \arg RTC_CALIBRATION_WINDOW_16S: 2exp19 RTCCLK cycles, 16s if RTCCLK = 32768 Hz
  668. \arg RTC_CALIBRATION_WINDOW_8S: 2exp18 RTCCLK cycles, 8s if RTCCLK = 32768 Hz
  669. \param[in] plus: add RTC clock or not
  670. only one parameter can be selected which is shown as below:
  671. \arg RTC_CALIBRATION_PLUS_SET: add one RTC clock every 2048 rtc clock
  672. \arg RTC_CALIBRATION_PLUS_RESET: no effect
  673. \param[in] minus: the RTC clock to minus during the calibration window(0x0 - 0x1FF)
  674. \param[out] none
  675. \retval ErrStatus: ERROR or SUCCESS
  676. */
  677. ErrStatus rtc_calibration_config(uint32_t window, uint32_t plus, uint32_t minus)
  678. {
  679. uint32_t time_index = RTC_HRFC_TIMEOUT;
  680. ErrStatus error_status = ERROR;
  681. uint32_t flag_status = RESET;
  682. /* disable the write protection */
  683. RTC_WPK = RTC_UNLOCK_KEY1;
  684. RTC_WPK = RTC_UNLOCK_KEY2;
  685. /* check if a calibration operation is ongoing */
  686. do{
  687. flag_status = RTC_STAT & RTC_STAT_SCPF;
  688. }while((--time_index > 0x00U) && ((uint32_t)RESET != flag_status));
  689. if((uint32_t)RESET == flag_status){
  690. RTC_HRFC = (uint32_t)(window | plus | HRFC_CMSK(minus));
  691. error_status = SUCCESS;
  692. }
  693. /* enable the write protection */
  694. RTC_WPK = RTC_LOCK_KEY;
  695. return error_status;
  696. }
  697. /*!
  698. \brief adjust the daylight saving time by adding or substracting one hour from the current time
  699. \param[in] operation: hour ajustment operation
  700. only one parameter can be selected which is shown as below:
  701. \arg RTC_CTL_A1H: add one hour
  702. \arg RTC_CTL_S1H: substract one hour
  703. \param[out] none
  704. \retval none
  705. */
  706. void rtc_hour_adjust(uint32_t operation)
  707. {
  708. /* disable the write protection */
  709. RTC_WPK = RTC_UNLOCK_KEY1;
  710. RTC_WPK = RTC_UNLOCK_KEY2;
  711. RTC_CTL |= (uint32_t)(operation);
  712. /* enable the write protection */
  713. RTC_WPK = RTC_LOCK_KEY;
  714. }
  715. /*!
  716. \brief adjust RTC second or subsecond value of current time
  717. \param[in] add: add 1s to current time or not
  718. only one parameter can be selected which is shown as below:
  719. \arg RTC_SHIFT_ADD1S_RESET: no effect
  720. \arg RTC_SHIFT_ADD1S_SET: add 1s to current time
  721. \param[in] minus: number of subsecond to minus from current time(0x0 - 0x7FFF)
  722. \param[out] none
  723. \retval ErrStatus: ERROR or SUCCESS
  724. */
  725. ErrStatus rtc_second_adjust(uint32_t add, uint32_t minus)
  726. {
  727. uint32_t time_index = RTC_SHIFTCTL_TIMEOUT;
  728. ErrStatus error_status = ERROR;
  729. uint32_t flag_status = RESET;
  730. uint32_t temp=0U;
  731. /* disable the write protection */
  732. RTC_WPK = RTC_UNLOCK_KEY1;
  733. RTC_WPK = RTC_UNLOCK_KEY2;
  734. /* check if a shift operation is ongoing */
  735. do{
  736. flag_status = RTC_STAT & RTC_STAT_SOPF;
  737. }while((--time_index > 0x00U) && ((uint32_t)RESET != flag_status));
  738. temp = RTC_CTL & RTC_CTL_REFEN;
  739. /* check if the function of reference clock detection is disabled */
  740. if(((uint32_t)RESET == flag_status) && (RESET == temp)){
  741. RTC_SHIFTCTL = (uint32_t)(add | SHIFTCTL_SFS(minus));
  742. error_status = rtc_register_sync_wait();
  743. }
  744. /* enable the write protection */
  745. RTC_WPK = RTC_LOCK_KEY;
  746. return error_status;
  747. }
  748. /*!
  749. \brief enable RTC bypass shadow registers function
  750. \param[in] none
  751. \param[out] none
  752. \retval none
  753. */
  754. void rtc_bypass_shadow_enable(void)
  755. {
  756. /* disable the write protection */
  757. RTC_WPK = RTC_UNLOCK_KEY1;
  758. RTC_WPK = RTC_UNLOCK_KEY2;
  759. RTC_CTL |= (uint8_t)RTC_CTL_BPSHAD;
  760. /* enable the write protection */
  761. RTC_WPK = RTC_LOCK_KEY;
  762. }
  763. /*!
  764. \brief disable RTC bypass shadow registers function
  765. \param[in] none
  766. \param[out] none
  767. \retval none
  768. */
  769. void rtc_bypass_shadow_disable(void)
  770. {
  771. /* disable the write protection */
  772. RTC_WPK = RTC_UNLOCK_KEY1;
  773. RTC_WPK = RTC_UNLOCK_KEY2;
  774. RTC_CTL &= (uint8_t)~RTC_CTL_BPSHAD;
  775. /* enable the write protection */
  776. RTC_WPK = RTC_LOCK_KEY;
  777. }
  778. /*!
  779. \brief enable RTC reference clock detection function
  780. \param[in] none
  781. \param[out] none
  782. \retval ErrStatus: ERROR or SUCCESS
  783. */
  784. ErrStatus rtc_refclock_detection_enable(void)
  785. {
  786. ErrStatus error_status = ERROR;
  787. /* disable the write protection */
  788. RTC_WPK = RTC_UNLOCK_KEY1;
  789. RTC_WPK = RTC_UNLOCK_KEY2;
  790. /* enter init mode */
  791. error_status = rtc_init_mode_enter();
  792. if(ERROR != error_status){
  793. RTC_CTL |= (uint32_t)RTC_CTL_REFEN;
  794. /* exit init mode */
  795. rtc_init_mode_exit();
  796. }
  797. /* enable the write protection */
  798. RTC_WPK = RTC_LOCK_KEY;
  799. return error_status;
  800. }
  801. /*!
  802. \brief disable RTC reference clock detection function
  803. \param[in] none
  804. \param[out] none
  805. \retval ErrStatus: ERROR or SUCCESS
  806. */
  807. ErrStatus rtc_refclock_detection_disable(void)
  808. {
  809. ErrStatus error_status = ERROR;
  810. /* disable the write protection */
  811. RTC_WPK = RTC_UNLOCK_KEY1;
  812. RTC_WPK = RTC_UNLOCK_KEY2;
  813. /* enter init mode */
  814. error_status = rtc_init_mode_enter();
  815. if(ERROR != error_status){
  816. RTC_CTL &= (uint32_t)~RTC_CTL_REFEN;
  817. /* exit init mode */
  818. rtc_init_mode_exit();
  819. }
  820. /* enable the write protection */
  821. RTC_WPK = RTC_LOCK_KEY;
  822. return error_status;
  823. }