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小廖提交高配表头的资料

huangchengzhou 2 年 前
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共有100 個のファイルを変更した、0 個の追加 と 0 個の削除を含む
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03-硬件原理及PCB资料/02-PCB板图/CON_4G_5G.rar → 03-硬件原理及PCB资料/02-PCB板图/V1.0/CON_4G_5G.rar


03-硬件原理及PCB资料/02-PCB板图/CON_EXPORT.rar → 03-硬件原理及PCB资料/02-PCB板图/V1.0/CON_EXPORT.rar


03-硬件原理及PCB资料/02-PCB板图/HEADER.rar → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER.rar


03-硬件原理及PCB资料/02-PCB板图/HEADER/P01_SYS_BLOCK.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P01_SYS_BLOCK.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P02_POWER_SEQUENCE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P02_POWER_SEQUENCE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P03_POWER_TREE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P03_POWER_TREE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P04_SOM_CON.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P04_SOM_CON.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P05_POWER.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P05_POWER.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P05_POWER_SAVE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P05_POWER_SAVE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P06_UART0_DEBUG.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P06_UART0_DEBUG.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P07_USB1_USB0_HUB.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P07_USB1_USB0_HUB.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P07_USB_HUB.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P07_USB_HUB.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P08_4G_5G_WIFI.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P08_4G_5G_WIFI.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P09_UART1_BLE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P09_UART1_BLE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P09_UART2_BLE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P09_UART2_BLE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P10_ETH0(RGMII).SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P10_ETH0(RGMII).SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P10_ETH0(RGMII)_SAVE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P10_ETH0(RGMII)_SAVE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P11_ETH1(USB).SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P11_ETH1(USB).SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P12_UART(2_3_4_5)_RS485.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P12_UART(2_3_4_5)_RS485.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P12_UART(3_4_5)_RS485.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P12_UART(3_4_5)_RS485.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P12_UART(3_4_5)_RS485_SAVE.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P12_UART(3_4_5)_RS485_SAVE.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P13_UART_HUB(1_2_3_4).SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P13_UART_HUB(1_2_3_4).SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P14_RTC_WATCHDOGS_KEY.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P14_RTC_WATCHDOGS_KEY.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P15_MICRO_SD_JTAG.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P15_MICRO_SD_JTAG.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/P16_EXPORT_SPI.SchDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/P16_EXPORT_SPI.SchDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.OutJob → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.OutJob


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.PDF → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.PDF


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.PcbDoc → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.PcbDoc


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.PrjPCB → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.PrjPCB


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.PrjPCBStructure → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.PrjPCBStructure


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.RUL → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.RUL


03-硬件原理及PCB资料/02-PCB板图/HEADER/PDU.rar → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/PDU.rar


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-15 23-09-19.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-15 23-09-19.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 14-58-05.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 14-58-05.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 15-46-04.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 15-46-04.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 16-06-33.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 16-06-33.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 17-02-27.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 17-02-27.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 17-37-35.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 17-37-35.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 22-47-28.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-16 22-47-28.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-19 15-51-10.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P04_SOM_CON SCH ECO 2024-01-19 15-51-10.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-15 23-09-19.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-15 23-09-19.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 10-04-15.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 10-04-15.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 14-49-50.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 14-49-50.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 14-58-05.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 14-58-05.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 15-22-10.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 15-22-10.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 15-44-00.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 15-44-00.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 15-46-04.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 15-46-04.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 16-06-33.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 16-06-33.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 17-02-27.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 17-02-27.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 17-56-21.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 17-56-21.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 18-01-20.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 18-01-20.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 21-41-14.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 21-41-14.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 21-43-46.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 21-43-46.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-06-01.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-06-01.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-47-28.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-47-28.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-53-48.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-53-48.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-58-56.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 22-58-56.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 23-04-21.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 23-04-21.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 23-45-23.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 23-45-23.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 23-57-09.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 23-57-09.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 9-48-31.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-16 9-48-31.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-17 9-24-47.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-17 9-24-47.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-19 15-51-10.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P05_POWER SCH ECO 2024-01-19 15-51-10.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-15 23-09-19.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-15 23-09-19.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 10-04-15.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 10-04-15.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 14-58-05.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 14-58-05.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 15-46-04.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 15-46-04.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 16-06-33.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 16-06-33.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-05-24.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-05-24.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-20-30.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-20-30.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-34-44.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-34-44.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-56-21.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 17-56-21.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 21-54-07.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 21-54-07.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 21-57-25.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 21-57-25.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 22-06-01.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 22-06-01.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 9-48-31.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-16 9-48-31.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-17 9-28-12.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-17 9-28-12.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 15-51-10.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 15-51-10.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 15-55-53.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 15-55-53.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 15-58-39.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 15-58-39.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-04-40.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-04-40.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-11-57.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-11-57.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-13-53.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-13-53.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-22-20.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-19 16-22-20.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-23 0-12-49.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-23 0-12-49.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-23 11-10-01.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-23 11-10-01.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-23 11-10-33.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P06_UART0_DEBUG SCH ECO 2024-01-23 11-10-33.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-15 23-09-19.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-15 23-09-19.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 10-04-15.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 10-04-15.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 14-49-50.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 14-49-50.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 14-58-05.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 14-58-05.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 16-00-19.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 16-00-19.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 16-06-33.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 16-06-33.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 17-05-24.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 17-05-24.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 17-20-30.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 17-20-30.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 21-54-07.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 21-54-07.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 21-57-25.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 21-57-25.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 22-53-48.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 22-53-48.LOG


03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 9-48-31.LOG → 03-硬件原理及PCB资料/02-PCB板图/V1.0/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-16 9-48-31.LOG


+ 0 - 0
03-硬件原理及PCB资料/02-PCB板图/HEADER/Project Logs for PDU/P07_USB1_USB0_HUB SCH ECO 2024-01-18 0-00-38.LOG


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