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@@ -23,8 +23,8 @@
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-AC_Output_struct_Reg AC3PPDU_Output[Output_ChN_default + 2] = {0};
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-AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_time[Output_ChN_default + 2] = {0};
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+AC_Output_struct_Reg AC3PPDU_Output[Output_ChN_default + 1] = {0};
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+AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_time[Output_ChN_default + 1] = {0};
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AC3PPDU_RELAY_Para_Reg AC3PPDU_RL_N_time;
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@@ -41,7 +41,7 @@ uint8_t flash_flag = 0;
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uint32_t AC3PPDU_Modbus_Reg[AC3PPDU_Modbus_Reg_len] = {0};
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uint8_t AC3PPDU_active_chn;
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information_t infomation;
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-uint32_t hlw8110_base[Output_ChN_default + 1] = {0}; //add by liyi
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+uint32_t hlw8110_base[Output_ChN_default+1] = {0}; //add by liyi
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uint8_t Wr_eeprom_cnt = 0;
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uint8_t read_ele_flag = 0;
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@@ -67,13 +67,13 @@ bool orderFlag[Output_ChN_default] ={0};
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#endif
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-uint8_t RL_begin_delay_flag[Output_ChN_default+1] = {0x00};
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-uint8_t RL_end_delay_flag[Output_ChN_default+1] = {0x00};
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-uint8_t RL_ON_flag[Output_ChN_default+1] = {0x00};
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-uint8_t RL_OFF_flag[Output_ChN_default+1] = {0x00};
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-uint8_t RL_last_state[Output_ChN_default+1] = {0x00};
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-uint8_t RL_now_state[Output_ChN_default+1] = {0x00};
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-uint8_t RL_Func_statu[Output_ChN_default + 1] = {0x00};
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+uint8_t RL_begin_delay_flag[Output_ChN_default] = {0x00};
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+uint8_t RL_end_delay_flag[Output_ChN_default] = {0x00};
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+uint8_t RL_ON_flag[Output_ChN_default] = {0x00};
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+uint8_t RL_OFF_flag[Output_ChN_default] = {0x00};
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+uint8_t RL_last_state[Output_ChN_default] = {0x00};
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+uint8_t RL_now_state[Output_ChN_default] = {0x00};
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+uint8_t RL_Func_statu[Output_ChN_default] = {0x00};
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uint8_t RL_All_Func = 0x0;
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uint32_t normal_running_time = 0;
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@@ -102,10 +102,10 @@ uint8_t write_kwh2Eeprom_flag = 0;
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-extern float hlw8110_store[Output_ChN_default + 1];
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+extern float hlw8110_store[Output_ChN_default+1];
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extern uint32_t Modbus_Wr_buff[Mb_Wcmd_Width][Mb_Wcmd_len];
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-extern uint32_t RL_delay_Limit[Output_ChN_default + 1];
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+extern uint32_t RL_delay_Limit[Output_ChN_default];
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static void MODbus_CMD_New(void);
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@@ -135,31 +135,64 @@ static void app_init(META_DATA_S *meta)
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static bool select_channel(uint8_t ch_x)
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{
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- if(ch_x == 0)
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- return false;
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switch(ch_x)
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{
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- case CH1_out:
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+ case 0:
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{
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SEL_0_L;
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SEL_1_L;
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SEL_2_L;
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}
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break;
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- case CH2_out:
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+ case 1:
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{
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SEL_0_H;
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SEL_1_L;
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SEL_2_L;
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}
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break;
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- case CH3_out:
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+ case 2:
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{
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SEL_0_L;
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SEL_1_H;
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SEL_2_L;
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}
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break;
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+ case 3:
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+ {
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+ SEL_0_H;
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+ SEL_1_H;
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+ SEL_2_L;
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+ }
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+ break;
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+ case 4:
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+ {
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+ SEL_0_L;
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+ SEL_1_L;
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+ SEL_2_H;
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+ }
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+ break;
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+ case 5:
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+ {
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+ SEL_0_H;
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+ SEL_1_L;
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+ SEL_2_H;
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+ }
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+ break;
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+ case 6:
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+ {
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+ SEL_0_L;
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+ SEL_1_H;
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+ SEL_2_H;
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+ }
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+ break;
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+ case 7:
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+ {
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+ SEL_0_H;
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+ SEL_1_H;
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+ SEL_2_H;
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+ }
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+ break;
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default:
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return false;
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}
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@@ -187,11 +220,11 @@ static void check_jlink()
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#if SUPPORT_DETECTION
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if(detection_value == 0) // duan lu qi shi fou zai xian
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{
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- for(int i = 0; i < Output_ChN_default;i++)
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- {
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- AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
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- orderFlag[i]=true;
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- }
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+// for(int i = 0; i < Output_ChN_default;i++)
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+// {
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+// AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
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+// orderFlag[i]=true;
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+// }
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}else
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#endif
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{
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@@ -217,18 +250,29 @@ static void check_jlink()
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}
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#else
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#if SUPPORT_DETECTION
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- if(detection_value == 0)
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- {
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- for(int i = 0; i < Output_ChN_default;i++)
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- {
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- AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
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- orderFlag[i]=true;
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- }
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- #if SUPPORT_ZERO_LINE
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- AC3PPDU_RL_N_time.LT_state &= 0xffffff7e;
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- orderFlag_N = true;
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+ #if SUPPORT_DOUBLE_FIRE
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+// if(detection_value != 0x3)
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+// {
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+// for(int i = 0; i < Output_ChN_default;i++)
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+// {
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+// AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
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+// orderFlag[i]=true;
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+// }
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+// }
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+ #else
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+// if(detection_value == 0)
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+// {
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+// for(int i = 0; i < Output_ChN_default;i++)
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+// {
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+// AC3PPDU_RL_time[i + CH1_out].LT_state &=0xffffff7e;
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+// orderFlag[i]=true;
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+// }
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+// #if SUPPORT_ZERO_LINE
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+// AC3PPDU_RL_N_time.LT_state &= 0xffffff7e;
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+// orderFlag_N = true;
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+// #endif
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+// }
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#endif
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- }
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#endif
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#endif
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@@ -361,40 +405,42 @@ static void check_jlink()
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if(RL_ON_flag[i] > 0)
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{
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RL_ON_flag[i] = 0;
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- switch (i)
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- {
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- case 0:
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- DB_Out1_H;
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- break;
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- case 1:
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- DB_Out2_H;
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- break;
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- case 2:
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- DB_Out3_H;
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- break;
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- default:
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- return;
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- }
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+ set_relay_state(i,1);
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+// switch (i)
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+// {
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+// case 0:
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+// DB_Out1_H;
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+// break;
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+// case 1:
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+// DB_Out2_H;
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+// break;
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+// case 2:
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+// DB_Out3_H;
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+// break;
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+// default:
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+// return;
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+// }
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AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = (AC3PPDU_RL_time[i + CH1_out].LT_state | 0x01);
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AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state | 0x00000001;
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}else if(RL_OFF_flag[i] > 0)
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{
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RL_OFF_flag[i] = 0;
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- switch (i)
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- {
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- case 0:
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- DB_Out1_L;
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- break;
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- case 1:
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- DB_Out2_L;
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- break;
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- case 2:
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- DB_Out3_L;
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- break;
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- default:
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- return;
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- }
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+ set_relay_state(i,0);
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+// switch (i)
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+// {
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+// case 0:
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+// DB_Out1_L;
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+// break;
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+// case 1:
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+// DB_Out2_L;
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+// break;
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+// case 2:
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+// DB_Out3_L;
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+// break;
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+// default:
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+// return;
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+// }
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AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] = (AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe);
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AC3PPDU_Modbus_Reg[Mb_Dbuff_OUTCH1_ST_Addr + (i % 3)] = AC3PPDU_RL_time[i + CH1_out].LT_state & 0xfffffffe;
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}else
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@@ -415,10 +461,11 @@ static void LimiT_enable_check(uint8_t ch_x,uint32_t Lt_v)
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{
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uint16_t temp0 = 0;
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temp0 = Lt_v >> 1;
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+#if (!SUPPORT_DOUBLE_FIRE)
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if(ch_x > 3)
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{
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return;
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- }
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+#endif
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//ͨµÀ×î´óµçѹ
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if((temp0 & AC3PPDU_Vmax_LT_enable) == AC3PPDU_Vmax_LT_enable)
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{
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@@ -493,19 +540,40 @@ static void RL_Over_Func()
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static void key_io_control()
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{
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-
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- if(get_detection())
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- {
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- AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = 0x1;
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- }else
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- {
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- AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = 0x0;
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- }
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+ AC3PPDU_Modbus_Reg[Mb_Dbuff_Detection] = detection_value;
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}
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void switch_recode()
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{
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#if SUPPORT_DETECT_REMENBER
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+ #if SUPPORT_DOUBLE_FIRE
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+ if(detection_value != 0x3)
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+ {
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+ if(handle_detection[0] == 1)
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+ {
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+ for(int i = 0; i < Output_ChN_default;i++)
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+ {
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+ handle_status[i] = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CH1LT_ST_Addr + i] & 0x1);
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+ AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
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+ orderFlag[i]=true;
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+ }
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+ handle_detection[0] = 0;
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+ }
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+ }else
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+ {
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+ if(handle_detection[0] == 0)
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+ {
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+ for(int i = 0; i < Output_ChN_default;i++)
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+ {
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+ uint32_t data = (AC3PPDU_RL_time[i + CH1_out].LT_state & (~0x40));
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+ AC3PPDU_RL_time[i + CH1_out].LT_state = (data & 0x40);
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+ AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
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+ orderFlag[i]=true;
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+ }
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+ handle_detection[0] = 1;
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+ }
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+ }
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+ #else
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if(detection_value == 0)
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{
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if(handle_detection[0] == 1)
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@@ -516,9 +584,9 @@ void switch_recode()
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AC3PPDU_RL_time[i + CH1_out].LT_state &= 0xffffff7e;
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orderFlag[i]=true;
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}
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-#if SUPPORT_ZERO_LINE
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- handle_status_N = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x1);
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-#endif
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+ #if SUPPORT_ZERO_LINE
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+ handle_status_N = (AC3PPDU_Modbus_Reg[Mb_Dbuff_CHNLT_ST_Addr] & 0x1);
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+ #endif
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handle_detection[0] = 0;
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}
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}else
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@@ -532,21 +600,117 @@ void switch_recode()
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AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
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orderFlag[i]=true;
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}
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-#if SUPPORT_ZERO_LINE
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- uint32_t data = (AC3PPDU_RL_N_time.LT_state & (~0x40));
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- AC3PPDU_RL_time[i + CH1_out].LT_state = (data & 0x40);
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- AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
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- orderFlag_N = true;
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-#endif
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+ #if SUPPORT_ZERO_LINE
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+ uint32_t data = (AC3PPDU_RL_N_time.LT_state & (~0x40));
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+ AC3PPDU_RL_time[i + CH1_out].LT_state = (data & 0x40);
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+ AC3PPDU_RL_time[i + CH1_out].LT_state |= handle_status[i];
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+ orderFlag_N = true;
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+ #endif
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handle_detection[0] = 1;
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}
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}
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+ #endif
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#endif
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}
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+static void read_ele(void)
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+{
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+#if SUPPORT_DOUBLE_FIRE
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+ static uint8_t channel = 0;
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+ read_Hlw8110(channel,0);
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+ channel ++;
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+ if(channel == Output_ChN_default)
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+ {
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+ channel = 0;
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+ //
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+ uint32_t _data = 0;
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+ _data = AC3PPDU_Output[CH1_out].AC_V > _data ? AC3PPDU_Output[CH1_out].AC_V :_data;
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+ _data = AC3PPDU_Output[CH2_out].AC_V > _data ? AC3PPDU_Output[CH2_out].AC_V :_data;
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+ _data = AC3PPDU_Output[CH3_out].AC_V > _data ? AC3PPDU_Output[CH3_out].AC_V :_data;
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+ _data = AC3PPDU_Output[CH4_out].AC_V > _data ? AC3PPDU_Output[CH4_out].AC_V :_data;
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+ AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = _data;
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+ _data = 0;
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+ _data = AC3PPDU_Output[CH5_out].AC_V > _data ? AC3PPDU_Output[CH5_out].AC_V :_data;
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+ _data = AC3PPDU_Output[CH6_out].AC_V > _data ? AC3PPDU_Output[CH6_out].AC_V :_data;
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+ _data = AC3PPDU_Output[CH7_out].AC_V > _data ? AC3PPDU_Output[CH7_out].AC_V :_data;
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+ _data = AC3PPDU_Output[CH8_out].AC_V > _data ? AC3PPDU_Output[CH8_out].AC_V :_data;
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+ AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = _data;
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+
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+ _data = AC3PPDU_Output[CH1_out].AC_I;
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+ _data += AC3PPDU_Output[CH2_out].AC_I;
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+ _data += AC3PPDU_Output[CH3_out].AC_I;
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+ _data += AC3PPDU_Output[CH4_out].AC_I;
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+ AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = _data;
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+
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+ _data = AC3PPDU_Output[CH5_out].AC_I;
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+ _data += AC3PPDU_Output[CH6_out].AC_I;
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+ _data += AC3PPDU_Output[CH7_out].AC_I;
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|
+ _data += AC3PPDU_Output[CH8_out].AC_I;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = _data;
|
|
|
+
|
|
|
+ _data = AC3PPDU_Output[CH1_out].AC_P;
|
|
|
+ _data += AC3PPDU_Output[CH2_out].AC_P;
|
|
|
+ _data += AC3PPDU_Output[CH3_out].AC_P;
|
|
|
+ _data += AC3PPDU_Output[CH4_out].AC_P;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = _data;
|
|
|
+
|
|
|
+ _data = AC3PPDU_Output[CH5_out].AC_P;
|
|
|
+ _data += AC3PPDU_Output[CH6_out].AC_P;
|
|
|
+ _data += AC3PPDU_Output[CH7_out].AC_P;
|
|
|
+ _data += AC3PPDU_Output[CH8_out].AC_P;
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|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = _data;
|
|
|
+
|
|
|
+ _data = AC3PPDU_Output[CH1_out].AC_kWh;
|
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|
+ _data += AC3PPDU_Output[CH2_out].AC_kWh;
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|
+ _data += AC3PPDU_Output[CH3_out].AC_kWh;
|
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|
+ _data += AC3PPDU_Output[CH4_out].AC_kWh;
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|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = _data;
|
|
|
+
|
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|
+ _data = AC3PPDU_Output[CH5_out].AC_kWh;
|
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|
+ _data += AC3PPDU_Output[CH6_out].AC_kWh;
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|
+ _data += AC3PPDU_Output[CH7_out].AC_kWh;
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|
+ _data += AC3PPDU_Output[CH8_out].AC_kWh;
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+ AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] = _data;
|
|
|
+
|
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|
+ for(int i = 0;i < (Output_ChN_default + 1);i++)
|
|
|
+ {
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|
|
+ Fault_state_process(i);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
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+
|
|
|
+#else
|
|
|
+ for(int j = 0 ; j < Hlw8110_CS;j++)
|
|
|
+ read_Hlw8110(j,0);
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
|
|
|
+
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
|
|
|
+
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
|
|
|
+
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] = hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
|
|
|
+ for(int i = 0;i < (Output_ChN_default + 1);i++)
|
|
|
+ {
|
|
|
+ Fault_state_process(i);
|
|
|
+ }
|
|
|
+#endif
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
|
|
|
int main(void)
|
|
|
{
|
|
|
@@ -566,7 +730,7 @@ int main(void)
|
|
|
eMBEnable();
|
|
|
key_io_init(NULL);
|
|
|
AC3PPDU_active_chn = Output_ChN_default;
|
|
|
- for(int i = 1; i <= AC3PPDU_active_chn;i++)
|
|
|
+ for(int i = 0; i < AC3PPDU_active_chn;i++)
|
|
|
{
|
|
|
hlw8110_init(i);
|
|
|
}
|
|
|
@@ -635,30 +799,14 @@ int main(void)
|
|
|
#if SUPPORT_DETECTION
|
|
|
detection_value = get_detection();
|
|
|
#endif
|
|
|
- for(int j = 0 ; j < Hlw8110_CS;j++)
|
|
|
- read_Hlw8110(j,0);
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] = AC3PPDU_Output[CH1_out].AC_V;
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] = AC3PPDU_Output[CH2_out].AC_V;
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_VCP_Addr] = AC3PPDU_Output[CH3_out].AC_V;
|
|
|
-
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_IAP_Addr] = AC3PPDU_Output[CH1_out].AC_I;
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_IBP_Addr] = AC3PPDU_Output[CH2_out].AC_I;
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_ICP_Addr] = AC3PPDU_Output[CH3_out].AC_I;
|
|
|
-
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_WAP_Addr] = AC3PPDU_Output[CH1_out].AC_P;
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_WBP_Addr] = AC3PPDU_Output[CH2_out].AC_P;
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_WCP_Addr] = AC3PPDU_Output[CH3_out].AC_P;
|
|
|
-
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhAP_Addr] = hlw8110_base[CH1_out] + (hlw8110_store[CH1_out]*1000);
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhBP_Addr] = hlw8110_base[CH2_out] + (hlw8110_store[CH2_out]*1000);
|
|
|
- AC3PPDU_Modbus_Reg[Mb_Dbuff_kWhCP_Addr] = hlw8110_base[CH3_out] + (hlw8110_store[CH3_out]*1000);
|
|
|
- for(int i = 0;i < (Output_ChN_default + 1);i++)
|
|
|
- {
|
|
|
- Fault_state_process(i);
|
|
|
- }
|
|
|
normal_running_time+=2;
|
|
|
write_eep_count ++;
|
|
|
}
|
|
|
+ if(read_ele_flag)
|
|
|
+ {
|
|
|
+ read_ele_flag = 0;
|
|
|
+ read_ele();
|
|
|
+ }
|
|
|
switch_recode();
|
|
|
if(write_eep_count >= 120) // 120 second recode
|
|
|
{
|
|
|
@@ -1164,6 +1312,7 @@ static void Fault_state_process(uint8_t ch_x)
|
|
|
|
|
|
if(ch_x == CH_in)
|
|
|
{
|
|
|
+#if (!SUPPORT_DOUBLE_FIRE)
|
|
|
uint32_t sort_buff[3] = {0};
|
|
|
uint32_t Vmax = 0;
|
|
|
uint32_t Vmin = 0;
|
|
|
@@ -1180,7 +1329,7 @@ static void Fault_state_process(uint8_t ch_x)
|
|
|
{
|
|
|
uint32_t v_mid = AC3PPDU_Lack_Voltage *2;
|
|
|
count ++;
|
|
|
- if(count == 4)
|
|
|
+ if(count == 2)
|
|
|
{
|
|
|
if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
|
|
|
{
|
|
|
@@ -1203,7 +1352,42 @@ static void Fault_state_process(uint8_t ch_x)
|
|
|
AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
|
|
|
count = 0;
|
|
|
}
|
|
|
-
|
|
|
+#else
|
|
|
+ uint32_t Vmax = 0;
|
|
|
+ uint32_t Vmin = 0;
|
|
|
+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] > AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr])
|
|
|
+ {
|
|
|
+ Vmax = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
|
|
|
+ Vmin = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
|
|
|
+ }else
|
|
|
+ {
|
|
|
+ Vmax = AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr];
|
|
|
+ Vmin = AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr];
|
|
|
+ }
|
|
|
+ if((Vmin < AC3PPDU_Lack_Voltage) && (Vmax != 0) && (Vmax > (AC3PPDU_Lack_Voltage*2)))
|
|
|
+ {
|
|
|
+ uint32_t v_mid = AC3PPDU_Lack_Voltage *2;
|
|
|
+ count ++;
|
|
|
+ if(count == 2)
|
|
|
+ {
|
|
|
+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VAP_Addr] < v_mid)
|
|
|
+ {
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 1;
|
|
|
+ }
|
|
|
+ if(AC3PPDU_Modbus_Reg[Mb_Dbuff_VBP_Addr] < v_mid)
|
|
|
+ {
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 1;
|
|
|
+ }
|
|
|
+ count = 0;
|
|
|
+ }
|
|
|
+ }else
|
|
|
+ {
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackA_Addr] = 0;
|
|
|
+ AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackB_Addr] = 0;
|
|
|
+ //AC3PPDU_Modbus_Reg[Mb_Dbuff_RL_LackC_Addr] = 0;
|
|
|
+ count = 0;
|
|
|
+ }
|
|
|
+#endif
|
|
|
if((AC3PPDU_Modbus_Reg[Mb_Dbuff_ALL_LT_ST_Addr] & Shield_Vmax_Threshould_enable) > 0)
|
|
|
{
|
|
|
if(AC_BASE[0] > AC3PPDU_Modbus_Reg[Mb_Dbuff_All_ViLit_Max])
|